Rainbow Electronics MAXQ1103 User Manual
MAXQ1103
High-Performance Secure RISC Microcontroller
________________________________________________________________
Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
ABRIDGED DATA SHEET
Rev 2; 8/08
EVALUATION KIT
AVAILABLE
Note: Some revisions of this device may incorporate deviations from published specifications known as errata. Multiple revisions of any device may be
simultaneously available through various sales channels. For information about device errata, email microcontroller.support@maxim-ic.com
.
General Description
The MAXQ1103 microcontroller is a low-power, 32-bit
RISC device that combines high-performance, singlecycle processing, sophisticated tamper-detection technology, and cryptographic hardware. Advanced security
features are designed to meet the stringent requirements
of regulations such as ITSEC E3 High, FIPS 140-2 Level
3, and the Common Criteria Certifications. The
MAXQ1103 is targeted at electronic commerce, banking,
and data security systems that require the highest levels
of secure access control, secure data storage, digital
signature, or certificate authentication. A secure memory
protection unit protects critical internal and external
memory against tampering with triple-DES (3DES)
encryption. Tamper sensors instantly zeroize critical
encryption keys when physical intrusion is detected.
A 32-bit MAXQ30 core powers the cryptographically
secure MAXQ1103. Applications are supported with
512KB of high-performance internal flash memory for
code/data storage and 32KB SRAM. Up to 8MB of
additional external program and data memory is supported through a dedicated word-wide memory bus
with programmable wait states. Additional peripherals
such as serial I/O, 16-bit timers, hardware math accelerator, ISO 7816 UART, and a USB controller increase
system utility while reducing component count.
System security is enhanced by the addition of highspeed cryptographic hardware accelerators for
ECDSA, DSA, RSA, Secure Hash Algorithm, and triplekey 3DES. The embedded hash engine supports multiple hash functions recommended by the National
Institute of Standards and Technology (NIST). The true
hardware random-number generator (RNG) supports
FIPS 186-2 with an available software library.
Applications
Features
o High-Performance 32-Bit MAXQ30 RISC Core
o DC to 25MHz Operation, Approaching 1MIPS per MHz
o Dual 1.8V Core/3.3V I/O Enables Low Power/
Flexible Interfacing
o 5V Tolerant I/O
o Up to 32 General-Purpose I/O Pins
o 34 Instructions, Most Single Cycle
o Three Independent Data Pointers Accelerate Data
Movement with Automatic Increment/Decrement
o Virtually Unlimited Software Stack
o 16-Bit Instruction Word, 32-Bit Internal Data Bus
o 16 x 32-Bit Accumulators
o Security Features
3DES-Encrypted External Memory Bus
Prevents Eavesdropping
Tamper Sensors Instantaneously “Zeroize”
Internal Keys and User Data When:
Out-of-Range Temperature/Voltage Detected
User-Defined Self-Destruct Inputs (SDIx) Activated
Internal Cryptographic Hardware Includes:
DES Engine Supporting Single DES and 2/3-Key
3DES Operations
Public-Key Cryptographic Accelerator for
ECDSA (160-, 192-, and 256-Key Strength)
Public-Key Cryptographic Accelerator for
DSA and RSA (1024- and 2048-Key Strength)
Hardware Hash Engine Supports SHA-1,
SHA-224, and SHA-256
Unresettable True-Time Clock Self-Imposes
Expiration Dates and Date/Timestamping
o Memory Features
Secure Memory Protection Unit and 4KB
Instruction Cache
512KB of Internal Flash Program Memory
3KB Internal Program Memory SRAM
32KB Internal Data SRAM, Including 1KB Battery-
Backed NV SRAM
Linear Address Space Directly Accesses Up to
8MB of External Program/Data Memory
o Peripheral Features
USB Device Controller with Four Endpoint Buffers
ISO 7816 UART with FIFO with Two Physically
Separate Communication Buses
o Power Management Features
o In-System Programming Through Debug Port or
Serial Port
o Ultra-Low Battery Leakage to Support NV RAM
and Security Sensors (150nA)
Ordering Information
MAXQ is a registered trademark of Maxim Integrated Products, Inc.
EMV is a trademark owned by EMVCo. LLC.
See the
Detailed Features
section for complete list of features.
PART
TEMP
RANGE
PIN-
PACKAGE
TAMPER
RESPONSIVE
MAXQ1103-ENS+ 0°C to +70°C 144 TQFP Yes
+
Denotes a lead-free/RoHS-compliant package.
Pin Configuration and Typical Application Circuit appear at
end of data sheet.
Electronic Commerce
PCI Terminals
PIN Pads
ATM Keyboards
EMV™ Banking
Secure Access Control
Secure Data Storage
Pay-per-Play
Certificate Authentication
Electronic Signature
Generator
MAXQ1103
High-Performance Secure RISC Microcontroller
______________________________________________________________________________________ 15
ABRIDGED DATA SHEET
Functional Diagram
Note to readers: This document is an abridged version of the full data sheet. To request the full data sheet,
go to www.maxim-ic.com/MAXQ1103
.
32KOUT
V
(+3.3V)
DDIO
VDD (+1.8V)
V
BAT
SDI[1:7]
32KIN
GND2
(+3V)
GND
V
DDO
VRST
RESET
PROG
SDBE
RANDOM-NUMBER
GENERATOR (RNG)
REAL-TIME
CLOCK
POWERSUPPLY
MONITORING
PF
TEMPERATURE SENSORS
RESET AND
DESTRUCT
RESET
WATCHDOG
CRC-16/32
GENERATOR
16K x 16
ROM
256K x 16
FLASH
1.5K x 16
SRAM
INTERNAL PROGRAM
MEMORY
HIGH/LOW
EXTERNAL CODE
INTEGRITY CHECKER
INSTRUCTION
CACHE
2K x 16
DES/3DES
USER ENGINE
MULTIPLY-
ACCUMULATE UNIT
INTERNAL
55MHz OSC
2048-BIT MODULO
ARITHMETIC
ACCELERATOR
16K x 16
SRAM
512 x 16
SRAM
INTERNAL DATA MEMORY
MAXQ30
PIPELINED
RISC CORE
MMU
SHA
MAXQ1103
USB
USART 0
TIMER 2
JTAG
TIMER 1
TIMER 3
USART 1
PORT 3
PORT 2
EDGE INTERRUPTS
PORT 1
DCS1N
DATA MEMORY
ENCRYPTOR/
DECRYPTOR
DCS2
DCS2N
PES1
PES2
ED[31:0]
AD[19:0]
TIMER 0
ISO 7816
UART AND
FIFO
PORT 0
HFXIN
HFXOUT
PLL (4X/2X)
CLOCK
GENERATION
INTERNAL
20MHz OSC
BATTERY BACKED
DES/3DES
PROGRAM MEMORY
DECRYPTOR
EXTERNAL PROGRAM AND DATA MEMORY INTERFACE
R/W
B0B1B2
B3
PCS1
PCS1N
PCS2
DES KEYS
DCS1
PCS2N
Loading...