The MAX9995 dual, high-linearity, downconversion
mixer provides 6.1dB gain, +25.6dBm IIP3, and 9.8dB
NF for UMTS/WCDMA, DCS, and PCS base-station
applications. The MAX9995 is ideal for low-side LO
injection. (For a mixer variant optimized for high-side
LO injection, contact the factory.)
This device integrates baluns in the RF and LO ports, a
dual-input LO selectable switch, an LO buffer, two doublebalanced mixers, and a pair of differential IF output amplifiers. The MAX9995 requires a typical LO drive of 0dBm
and supply current is guaranteed to be below 380mA.
These devices are available in a compact 36-pin thin
QFN package (6mm × 6mm) with an exposed paddle.
Electrical performance is guaranteed over the extended
temperature range, from T
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
VCC........................................................................-0.3V to +5.5V
LO1, LO2 to GND ...............................................................±0.3V
IFM_, IFD_, IFM_SET, IFD_SET, LOSEL,
LO_ADJ_M, LO_ADJ_D to GND.............-0.3V to (V
CC
+ 0.3V)
RFMAIN, RFDIV, and LO_ Input Power ..........................+20dBm
RFMAIN, RFDIV Current (RF is DC shorted to GND through
Note 1: Guaranteed by design and characterization.
Note 2: All limits reflect losses of external components. Output measurements taken at IF outputs of Typical Application Circuit.
Note 3: Production tested.
Note 4: Two tones 3MHz spacing, -5dBm per tone at RF port.
Note 5: Measured at IF port at IF frequency. f
LO1
and f
LO2
are offset by 1MHz.
Note 6: IF return loss can be optimized by external matching components.
Note 7: Operation outside this frequency band is possible but has not been characterized. See the Typical Operating Characteristics.
(Typical Application Circuit, VCC= 5.0V, PRF= -5dBm, PLO= 0dBm, LO is low-side injected for a 200MHz IF, TC= +25°C.)
PINNAMEFUNCTION
1RFMAINMain Channel RF Input. Internally matched to 50Ω. Requires an input DC-blocking capacitor.
2TAPMAINMain Channel Balun Center Tap. Connect a 0.033µF capacitor from this pin to the board ground.
3, 5, 7, 12, 20, 22,
24, 25, 26, 34
4, 6, 10, 16, 21, 30,
36
8TAPDIVDiversity Channel Balun Center Tap. Connect a 0.033µF capacitor from this pin to the ground.
9RFDIVDiversity Channel RF Input. Internally matched to 50Ω. Requires an input DC-blocking capacitor.
11IFD_SET
13, 14IFD+, IFD-
15IND_EXTD Connect a 10nH inductor from this pin to ground to increase the RF-IF and LO-IF isolation.
17LO_ADJ_D
18, 28N.C.No Connection. Not internally connected.
19LO1
23LOSELLocal Oscillator Select. Set this pin to high to select LO1. Set to low to select LO2.
GNDGround
V
CC
Power Supply. Connect bypass capacitors as close to the pin as possible (see the TypicalApplication Circuit).
IF Diversity Amplifier Bias Control. Connect a 1.2kΩ resistor from this pin to ground to set the
bias current for the diversity IF amplifier.
Diversity Mixer Differential IF Output. Connect pullup inductors from each of these pins to V
(see the Typical Application Circuit).
LO Diversity Amplifier Bias Control. Connect a 392Ω resistor from this pin to ground to set the
bias current for the diversity LO amplifier.
Local Oscillator 1 Input. This input is internally matched to 50Ω. Requires an input DC-blocking
capacitor.
CC
Detailed Description
The MAX9995 dual, high-linearity, downconversion
mixer provides 6.1dB gain and +25.6dBm IIP3, with a
9.8dB noise figure. Integrated baluns and matching circuitry allow 50Ω single-ended interfaces to the RF and
LO ports. A single-pole, double-throw (SPDT) LO
switch provides 50ns switching time between LO
inputs, with 50dB LO-to-LO isolation. Furthermore, the
integrated LO buffer provides a high drive level to the
mixer core, reducing the LO drive required at the
MAX9995’s inputs to -3dBm. The IF port incorporates a
differential output, which is ideal for providing
enhanced 2RF-2LO performance.
Specifications are guaranteed over broad frequency
ranges to allow for use in UMTS/WCDMA and
2G/2.5G/3G DCS1800, PCS1900, and cdma2000 base
stations. The MAX9995 is specified to operate over an
RF input range of 1700MHz to 2200MHz, an LO range
of 1400MHz to 2000MHz, and an IF range of 40MHz to
350MHz. Operation beyond this is possible; however,
performance is not characterized. This device can
operate in high-side LO injection applications with an
extended LO range, but performance degrades as f
LO
continues to increase. For a device with better highside performance, contact the factory. This device is
available in a compact 6mm x 6mm, 36-pin thin QFN
package with an exposed paddle.
RF Input and Balun
The MAX9995’s two RF inputs (RFMAIN and RFDIV) are
internally matched to 50Ω, requiring no external matching components. DC-blocking capacitors are required
as the inputs are internally DC shorted to ground
through the on-chip baluns. Input return loss is typically
14dB over the entire RF frequency range of 1700MHz
to 2200MHz.
LO Input, Switch, Buffer, and Balun
The mixers can be used for either high-side or low-side
injection applications with an LO frequency range of
1400MHz to 2000MHz. For a device with an LO frequency range of 1900MHz to 2400MHz, contact the
factory. As an added feature, the MAX9995 includes an
internal LO SPDT switch that can be used for frequency-hopping applications. The switch selects one of the
two single-ended LO ports, allowing the external oscillator to settle on a particular frequency before it is
switched in. LO switching time is typically less than
50ns, which is more than adequate for virtually all GSM
applications. If frequency hopping is not employed, set
the switch to either of the LO inputs. The switch is controlled by a digital input (LOSEL): logic high selects
LO1, and logic low selects LO2. LO1 and LO2 inputs
are internally matched to 50Ω, requiring only a 22pF
DC-blocking capacitor.
A two-stage internal LO buffer allows a wide input
power range for the LO drive. All guaranteed specifications are for an LO signal power from -3dBm to +3dBm.
The on-chip low-loss balun, along with an LO buffer,
drives the double-balanced mixer. All interfacing and
matching components from the LO inputs to the IF outputs are integrated on-chip.
High Linearity Mixers
The core of the MAX9995 is a pair of double-balanced,
high-performance passive mixers. Exceptional linearity
is provided by the large LO swing from the on-chip LO
buffer. When combined with the integrated IF amplifiers, the cascaded IIP3, 2RF-2LO rejection, and NF
performance is typically +25.6dBm, 66dBc, and 9.8dB,
respectively.
Differential IF Output Amplifiers
The MAX9995 mixers have an IF frequency range of
40MHz to 350MHz. The differential, open-collector IF
output ports require external pullup inductors to VCC.
Note that these differential outputs are ideal for providing enhanced 2RF-2LO rejection performance. Singleended IF applications require a 4:1 balun to transform
the 200Ω differential output impedance to a 50Ω singleended output. After the balun, VSWR is typically 1.5:1.
Applications Information
Input and Output Matching
The RF and LO inputs are internally matched to 50Ω.
No matching components are required. Return loss at
each RF port is typically 14dB over the entire input
range (1700MHz to 2200MHz), and return loss at the
LO ports is typically 18dB (1400MHz to 2000MHz). RF
and LO inputs require only DC-blocking capacitors for
interfacing.
The IF output impedance is 200Ω (differential). For
evaluation, an external low-loss 4:1 (impedance ratio)
balun transforms this impedance down to a 50Ω singleended output (see the Typical Application Circuit).
Bias Resistors
Bias currents for the LO buffer and the IF amplifier are
optimized by fine tuning the resistors R1, R2, R4, and R5.
If reduced current is required at the expense of performance, contact factory. If the ±1% bias resistor values
are not readily available, substitute standard ±5% values.
Layout Considerations
A properly designed PC board is an essential part of
any RF/microwave circuit. Keep RF signal lines as short
as possible to reduce losses, radiation, and inductance. For the best performance, route the ground pin
traces directly to the exposed pad under the package.
The PC board exposed pad MUST be connected to the
ground plane of the PC board. It is suggested that multiple vias be used to connect this pad to the lower-level
ground planes. This method provides a good RF/thermal-conduction path for the device. Solder the exposed
pad on the bottom of the device package to the PC
board. The MAX9995 Evaluation Kit can be used as a
reference for board layout. Gerber files are available
upon request at www.maxim-ic.com.
Power-Supply Bypassing
Proper voltage-supply bypassing is essential for highfrequency circuit stability. Bypass each VCCpin with a
capacitor as close to the pin as possible (TypicalApplication Circuit).
Exposed Pad RF/Thermal Considerations
The exposed paddle (EP) of the MAX9995’s 36-pin thin
QFN-EP package provides a low thermal-resistance
path to the die. It is important that the PC board on
which the MAX9995 is mounted be designed to conduct heat from the EP. In addition, provide the EP with
a low-inductance path to electrical ground. The EP
MUST be soldered to a ground plane on the PC board,
either directly or through an array of plated via holes.
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,
go to www.maxim-ic.com/packages
.)
D
D/2
e
A1A2
E/2
E
A
(NE-1) X e
L
L1
k
D2
C
L
D2/2
(ND-1) X e
C
L
ee
b
e
E2/2
C
E2
L
k
L
C
L
LL
QFN THIN 6x6x0.8.EPS
PACKAGE OUTLINE
36, 40, 48L THIN QFN, 6x6x0.8mm
21-0141
1
E
2
MAX9995
Dual, SiGe, High-Linearity, 1700MHz to 2200MHz
Downconversion Mixer with LO Buffer/Switch
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 13
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,
go to www.maxim-ic.com/packages
.)
NOTES:
1. DIMENSIONING & TOLERANCING CONFORM TO ASME Y14.5M-1994.
2. ALL DIMENSIONS ARE IN MILLIMETERS. ANGLES ARE IN DEGREES.
3. N IS THE TOTAL NUMBER OF TERMINALS.
4. THE TERMINAL #1 IDENTIFIER AND TERMINAL NUMBERING CONVENTION SHALL CONFORM TO JESD 95-1
SPP-012. DETAILS OF TERMINAL #1 IDENTIFIER ARE OPTIONAL, BUT MUST BE LOCATED WITHIN THE
ZONE INDICATED. THE TERMINAL #1 IDENTIFIER MAY BE EITHER A MOLD OR MARKED FEATURE.
5. DIMENSION b APPLIES TO METALLIZED TERMINAL AND IS MEASURED BETWEEN 0.25 mm AND 0.30 mm
FROM TERMINAL TIP.
6. ND AND NE REFER TO THE NUMBER OF TERMINALS ON EACH D AND E SIDE RESPECTIVELY.
7. DEPOPULATION IS POSSIBLE IN A SYMMETRICAL FASHION.
8. COPLANARITY APPLIES TO THE EXPOSED HEAT SINK SLUG AS WELL AS THE TERMINALS.
9. DRAWING CONFORMS TO JEDEC MO220, EXCEPT FOR 0.4mm LEAD PITCH PACKAGE T4866-1.
10. WARPAGE SHALL NOT EXCEED 0.10 mm.
PACKAGE OUTLINE
36, 40, 48L THIN QFN, 6x6x0.8mm
21-0141
2
E
2
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