Rainbow Electronics MAX9877 User Manual

General Description

The MAX9877 combines a high-efficiency Class D
audio power amplifier with a stereo Class AB capacitor­less DirectDrive

®

headphone amplifier. Maxim’s 3rd
generation, filterless Class D amplifier with active emis­sions limiting technology provides Class AB perfor­mance with Class D efficiency.

The MAX9877 delivers up to 725mW from a 3.7V supply
into an 8Ω load with 87% efficiency to extend battery life.
The filterless modulation scheme combined with active
emissions limiting circuitry and spread-spectrum modu­lation greatly reduces EMI while eliminating the need for
output filtering used in traditional Class D devices.

The stereo Class AB headphone amplifier in the
MAX9877 uses Maxim’s patented DirectDrive architec­ture, that produces a ground-referenced output from a
single supply, eliminating the need for large DC-blocking
capacitors, saving cost, space, and component height.

The device utilizes a user-defined input architecture,
three preamplifier gain settings, an input mixer, volume
control, comprehensive click-and-pop suppression, and
I

2

C control. A bypass mode feature disables the integrat­ed Class D amplifier and utilizes an internal DPST switch
to allow an external amplifier to drive the speaker that is
connected at the outputs of the MAX9877.

The MAX9877 is available in a thermally efficient,
space-saving 20-bump WLP package.

Applications

Cell Phones

Portable Multimedia Players

Features

♦ Low Emissions, Filterless Class D Amplifier

Achieves Better than 10dB Margin Under EN55022
Class B Limits

♦ Low RF Susceptibility Design Rejects TDMA

Noise from GSM Radios

♦ Input Mixer with User-Defined Input Mode
♦ 725mW Speaker Output (R

SPK

= 8Ω, PVDD= 3.7V)

♦ 53mW Headphone Output (R

HP

= 16Ω, VDD= 3.7V)

♦ Low 0.05% THD+N at 1kHz (Class D Power

Amplifier)

♦ Low 0.016% THD+N at 1kHz (Headphone

Amplifier)

♦ 87% Efficiency (R

SPK

= 8Ω, P

OUT

= 750mW)

♦ 1.6

Ω

Ω

Analog Switch for Speaker Amplifier Bypass

♦ High Speaker Amplifier PSRR (72dB at 217Hz)
♦ High Headphone Amplifier PSRR (84dB at 217Hz)
♦ I

2

C Control

♦ Hardware and Software Shutdown Mode
♦ Click-and-Pop Suppression
♦ Current-Limit and Thermal Protection
♦ Available in a Space-Saving, 2.5mm x 2.0mm WLP

Package

MAX9877

Low RF Susceptibility, Mono Audio

Subsystem with DirectDrive Headphone Amplifier

________________________________________________________________

Maxim Integrated Products

1

Simplified Block Diagram

WLP

HPL V

SS

C1N

HPR

1

A

B

C

D

2

3

4

C1P

BIAS SDA

RXIN+

V

DD

OUT+

INB1 SCL

PGND

INB2

PV

DD

INA1 GND

RXIN-

INA2

OUT-

5

TOP VIEW

(BUMP SIDE DOWN)

Pin Configuration

19-4076; Rev 0; 7/08

For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.

EVALUATION KIT

AVAILABLE

Ordering Information

PART

PIN - PA C K A G E

MAX9877EWP+TG45

20 WLP (5x4)

+

Denotes a lead-free package.
T = Tape and reel.
G45 indicates protective die coating.

TEMP RANGE

-40°C to +85°C

PREAMPLIFIER

I2C

INTERFACE

SINGLE SUPPLY

2.7V TO 5.25V

VOLUME

CONTROL

MIXER/MUX

MAX9877

VOLUME

CONTROL

BYPASS

MAX9877

Low RF Susceptibility, Mono Audio
Subsystem with DirectDrive Headphone Amplifier

2 _______________________________________________________________________________________

ABSOLUTE MAXIMUM RATINGS

ELECTRICAL CHARACTERISTICS

(VDD= PVDD= 3.7V, V

GND

= V

PGND

= 0V. Single-ended inputs, preamp gain = 0dB, volume controls = 0dB, OSC = 00, BYPASS = 0,

SHDN = 1. Speaker loads (Z

SPK

) connected between OUT+ and OUT-. Headphone loads (RHP) connected from HPL or HPR to GND.

SDA and SCL pullup voltage = 3.3V. Z

SPK

= ∞, RHP= ∞. C1 = C2 = C

BIAS

= 1µF. TA= T

MIN

to T

MAX

, unless otherwise noted. Typical

values are at T

A

= +25°C.) (Note 3)

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.

Note 1: HPR and HPL should be limited to no more than 9V above VSS, or above PVDD+ 0.3V, whichever limits first.
Note 2: HPR and HPL should be limited to no more than 9V below PV

DD

, or below VSS- 0.3V, whichever limits first.

V

DD

, PVDDto PGND..............................................-0.3V to +5.5V

V

DD

to PVDD..........................................................-0.3V to +0.3V

V

SS

to PGND .........................................................-5.5V to +0.3V

C1N to PGND..............................................(V

SS

- 0.3V) to +0.3V

C1P to PGND ...........................................-0.3V to (PV

DD

+ 0.3V)

HPL, HPR to V

SS

(Note 1) ......-0.3V to the lower of (PVDD- (VSS+ 0.3V)) or +9V

HPL, HPR to PV

DD

(Note 2) ......+0.3V to the higher of (VSS- (PVDD- 0.3V)) or -9V

GND to PGND.....................................................................±0.3V

INA1, INA2, INB1, INB2, BIAS..................................-0.3V to +4V

SDA, SCL...............................................................-0.3V to +5.5V

All Other Pins to GND...............................-0.3V to (PV

DD

+ 0.3V)

Continuous Current In/Out of PV

DD

, PGND, OUT_.........±800mA

Continuous Current In/Out of HPR and HPL .....................140mA

Continuous Current In/Out of RXIN+ and RXIN- ...............150mA

Continuous Input Current V

SS

...........................................100mA

Continuous Input Current (all other pins) .........................±20mA

Duration of OUT_ Short Circuit to GND or PV

DD

........Continuous

Duration of Short Circuit Between OUT+ and OUT- ..Continuous
Duration of HP_ Short Circuit to GND or PV

DD

..........Continuous

Continuous Power Dissipation (T

A

= +70°C)
20-Bump WLP, 5 x 4, Multilayer Board

(derate 13.0mW/°C above +70°C)..................................1.04W

Junction Temperature......................................................+150°C

Operating Temperature Range ...........................-40°C to +85°C

Storage Temperature Range .............................-65°C to +150°C

Lead Temperature (soldering, 10s) .................................+300°C

Supply Voltage Range VDD, PVDDGuaranteed by PSRR test 2.7 5.25 V

Quiescent Current I

Shutdown Current I

Turn-On Time t

BIAS Release Time t

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

HP mode,
OUTMODE = 2

DD

SHDN

ON

BR

SPK mode,
OUTMODE = 7

SPK + HP mode,
OUTMODE = 9

I

= I

SHDN

V

Time from shutdown to
full operation

After forcing BIAS low, time from BIAS
released to I

VDD

= logic-high; TA = +25°C

SCL

+ I

2

C reset

; SHDN = 0; V

PVDD

OSC = 00 5.6 9.0

OSC = 10 5.5

OSC = 00 6.6 11.0

OSC = 10 5.7

OSC = 00 10.4 16.0

OSC = 10 9.3

OSC = 00 10

OSC = 01 10

OSC = 10 17.5

SDA

=

10 22 µA

25 80 ms

mA

ms

Input Resistance R

TA = +25°C, preamp gain = 0dB or +9dB 11 21 31

IN

TA = +25°C, preamp gain = +20dB 3 5.5 8

Preamp = 0dB 2.30

Preamp = +9dB 0.820Maximum Input Signal Swing

Preamp = +20dB 0.230

kΩ

V

P-P

MAX9877

Low RF Susceptibility, Mono Audio

Subsystem with DirectDrive Headphone Amplifier

_______________________________________________________________________________________ 3

ELECTRICAL CHARACTERISTICS (continued)

(VDD= PVDD= 3.7V, V

GND

= V

PGND

= 0V. Single-ended inputs, preamp gain = 0dB, volume controls = 0dB, OSC = 00, BYPASS = 0,

SHDN = 1. Speaker loads (Z

SPK

) connected between OUT+ and OUT-. Headphone loads (RHP) connected from HPL or HPR to GND.

SDA and SCL pullup voltage = 3.3V. Z

SPK

= ∞, RHP= ∞. C1 = C2 = C

BIAS

= 1µF. TA= T

MIN

to T

MAX

, unless otherwise noted. Typical

values are at T

A

= +25°C.) (Note 3)

Input DC Voltage IN_ inputs 1.22 1.3 1.38 V

Bias Voltage V

SPEAKER AMPLIFIER (OUTMODE = 1)

Output Offset Voltage V

Click-and-Pop Level K

Power-Supply Rejection Ratio
(Note 4)

Output Power (Note 5) P

Total Harmonic Distortion Plus
Noise

Signal-to-Noise Ratio SNR

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

f

= 1kHz (differential

IN

input mode)

BIAS

TA = +25°C (volume at mute) ±0.5 ±4

OS T

CP

PSRR

OUT

THD+N

= +25°C (volume at 0dB,

A

OUTMODE = 1, ΔIN_ = 0)

Peak voltage, TA =
+25°C, A-weighted, 32
samples per second,
volume at mute (Note 4)

TA = +25°C, PVDD =
V

DD

THD+N ≤ 1%

f = 1kHz, P

= 8Ω + 68µH

Z

SPK

A-weighted,
OUTMODE = 1, 3,
4, 6

A-weighted,
OUTMODE = 7, 9

= 350mW, TA = +25°C,

OUT

Preamp = 0dB 47

Preamp = +9dB 49Common-Mode Rejection Ratio CMRR

Preamp = +20dB 42

Into shutdown -70

Out of shutdown -70

PVDD = VDD =

2.7V to 5.5V

f = 217Hz,
100mV

P-P

f = 1kHz,
100mV

P-P

f = 20kHz,
100mV

P-P

Z

= 8Ω +

SPK

68µH, V

Z
68µH, V

Z
68µH, V

Z
33µH, V

Z
33µH, V

ΔIN_ = 0
(single-ended)

ΔIN_ = 1 (differential) 94

ΔIN_ = 0

(single-ended)

ΔIN_ = 1 (differential) 92

SPK

SPK

SPK

SPK

DD

= 8Ω +

DD

= 8Ω +

DD

= 4Ω +

DD

= 4Ω +

DD

ripple

ripple

ripple

= 3.7V

= 3.3V

= 3.0V

= 3.7V

= 3.0V

1.13 1.2 1.27 V

50 76

±1.5

72

68

55

725

560

465

825

770

0.05 %

92

88

dB

mV

dBV

dB

mW

dB

MAX9877

Low RF Susceptibility, Mono Audio
Subsystem with DirectDrive Headphone Amplifier

4 _______________________________________________________________________________________

ELECTRICAL CHARACTERISTICS (continued)

(VDD= PVDD= 3.7V, V

GND

= V

PGND

= 0V. Single-ended inputs, preamp gain = 0dB, volume controls = 0dB, OSC = 00, BYPASS = 0,

SHDN = 1. Speaker loads (Z

SPK

) connected between OUT+ and OUT-. Headphone loads (RHP) connected from HPL or HPR to GND.

SDA and SCL pullup voltage = 3.3V. Z

SPK

= ∞, RHP= ∞. C1 = C2 = C

BIAS

= 1µF. TA= T

MIN

to T

MAX

, unless otherwise noted. Typical

values are at T

A

= +25°C.) (Note 3)

Output Frequency

Current Limit 1.5 A

Efficiency η P

Speaker Gain A

Output Noise

HEADPHONE AMPLIFIERS (OUTMODE = 2)

Output Offset Voltage V

Click-and-Pop Level K

Power-Supply Rejection Ratio
(Note 4)

Output Power P

Headphone Gain A

Channel-to-Channel Gain
Tracking

Total Harmonic Distortion Plus
Noise

Signal-to-Noise Ratio SNR

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

Spread-spectrum modulation mode,
OSC = 00

Fixed-frequency mode, OSC = 01 1100

Fixed-frequency mode, OSC = 10 700

= 600mW, f = 1kHz 87 %

OUT

V

A-weighted, OUTMODE = 1, ΔIN_ = 0
(Note 4)

OS

CP

PSRR

OUT

THD+N

TA = +25°C (volume at mute) ±0.15 ±0.6

TA = +25°C (volume at 0dB) ±1.6

Peak voltage, TA =
+25°C, A-weighted,
32 samples per
second. volume at
mute (Note 4)

TA = +25°C, PVDD =
V

DD

THD+N ≤ 1%

V

TA = +25°C, HPL to HPR, volume at 0dB,
OUTMODE = 2, 5; ΔIN_ = 0

RHP = 32Ω (P

R

= 16Ω (P

HP

= +25°C

T

A

A-weighted,
OUTMODE = 2, 3,
5, 6; R

A-weighted, R
16Ω, OUTMODE =
8, 9

HP

= 16Ω

OUT

OUT

HP

=

Into shutdown -80

Out of shutdown -80

PVDD = VDD = 2.7V
to 5.25V

f = 217Hz,
V

= 100mV

RIPPLE

f = 1kHz,
V

= 100mV

RIPPLE

f = 20kHz,
V

= 100mV

RIPPLE

RHP = 16Ω 53

= 32Ω 27

R

HP

= 10mW, f = 1kHz) 0.016

= 10mW, f = 1kHz),

ΔIN_ = 0
(single-ended)

ΔIN_ = 1 (differential) 98

ΔIN_ = 0

(single-ended)

ΔIN_ = 1 (differential) 96

1176

±60

11.5 12.0 12.5 dB

63 µV

70 85

P-P

P-P

P-P

-0.4 0 +0.4 dB

84

80

62

±0.3 ±2.5 %

0.03

98

96

kHz

RMS

mV

dBV

dB

mW

%

dB

MAX9877

Low RF Susceptibility, Mono Audio

Subsystem with DirectDrive Headphone Amplifier

_______________________________________________________________________________________ 5

ELECTRICAL CHARACTERISTICS (continued)

(VDD= PVDD= 3.7V, V

GND

= V

PGND

= 0V. Single-ended inputs, preamp gain = 0dB, volume controls = 0dB, OSC = 00, BYPASS = 0,

SHDN = 1. Speaker loads (Z

SPK

) connected between OUT+ and OUT-. Headphone loads (RHP) connected from HPL or HPR to GND.

SDA and SCL pullup voltage = 3.3V. Z

SPK

= ∞, RHP= ∞. C1 = C2 = C

BIAS

= 1µF. TA= T

MIN

to T

MAX

, unless otherwise noted. Typical

values are at T

A

= +25°C.) (Note 3)

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

Slew Rate SR 0.35 V/µs

Capacitive Drive C

Crosstalk HPL to HPR, HPR to HPL, f = 20Hz to 20kHz 65 dB

Charge-Pump Frequency

VOLUME CONTROL

Minimum Setting _VOL = 1 -75 dB

Maximum Setting _VOL = 31 0 dB

Mute Attenuation f = 1kHz, _VOL = 0

Zero-Crossing Detection Timeout ZCD = 1 60 ms

ANALOG SWITCH

On-Resistance R

Total Harmonic Distortion

Off-Isolation

DIGITAL INPUTS

Input-Voltage High (SDA, SCL) V

Input-Voltage Low (SDA, SCL) V

Input-Voltage Low (BIAS) V

Input Hysteresis (SDA, SCL) V

SDA, SCL Input Capacitance C

Input Leakage Current I

BIAS Pullup Current I

DIGITAL OUTPUTS (SDA Open Drain)

Output Low Voltage SDA V

Output Fall Time SDA t

L

Spread-spectrum modulation mode,
OSC = 00

100 pF

588

±30

Fixed-frequency mode, OSC = 01 430 550 670

Fixed-frequency mode, OSC = 10 220 350 500

PGAIN_ = 00 0

PGAIN_ = 01 9Preamp Gain Input A or B

PGAIN_ = 10 20

Speaker 100

Headphone 110

I

ON

= 20mA, RXIN_

RXIN_

= 0V and V

DD,

BYPASS = 1

V

DIF

V

CM

= 2V
= VDD/2,

P-P

,

f = 1kHz, BYPASS = 1,
T

= +25°C

A

TA = +25°C 1.6 4.5

= T

MIN

to T

MAX

T

A

Series resistance
is 9.1Ω per switch

0.05 0.25

5.2

No series resistors 0.3

BYPASS = 0, RXIN+ and RXIN- to GND =
50Ω, Z

= 8Ω + 68µH, f = 10kHz,

SPK

88 dB

referred to speaker output signal

H

BL

HYS

IN

IN

BIAS

OL

OF

L

SDA, SCL; TA = +25°C ±1.0 µA

I

= 3mA 0.4 V

SINK

V

to V

H(MIN)

to 400pF, I

bus capacitance = 10pF

L(MAX)

= 3mA

SINK

1.4 V

0.4 V

0.15 V

80 mV

4pF

94 µA

250 ns

kHz

dB

dB

Ω

%

MAX9877

Low RF Susceptibility, Mono Audio
Subsystem with DirectDrive Headphone Amplifier

6 _______________________________________________________________________________________

ELECTRICAL CHARACTERISTICS (continued)

(VDD= PVDD= 3.7V, V

GND

= V

PGND

= 0V. Single-ended inputs, preamp gain = 0dB, volume controls = 0dB, OSC = 00, BYPASS = 0,

SHDN = 1. Speaker loads (Z

SPK

) connected between OUT+ and OUT-. Headphone loads (RHP) connected from HPL or HPR to GND.

SDA and SCL pullup voltage = 3.3V. Z

SPK

= ∞, RHP= ∞. C1 = C2 = C

BIAS

= 1µF. TA= T

MIN

to T

MAX

, unless otherwise noted. Typical

values are at T

A

= +25°C.) (Note 3)

Note 3: All devices are 100% production tested at room temperature. All temperature limits are guaranteed by design.
Note 4: Amplifier inputs are AC-coupled to GND.
Note 5: Output levels higher than 825mW are not recommended for extended durations. Production tested with Z

SPK

= 8Ω + 68µH only.

2-WIRE INTERFACE TIMING

External Pullup Voltage Range:
SDA and SCL

Serial Clock Frequency f

Bus Free Time Between STOP
and START Conditions

START Condition Hold t

START Condition Setup Time t

Clock Low Period t

Clock High Period t

Data Setup Time t

Data Hold Time t

Maximum Receive SCL/SDA Rise
Time

Maximum Receive SCL/SDA Fall
Time

Setup Time for STOP Condition t

Capacitive Load for Each Bus
Line

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

SCL

t

BUF

HD:STA

SU:STA

LOW

HIGH

SU:DAT

HD:DAT

t

R

t

F

SU:STO

C

b

1.7 3.6 V

DC 400 kHz

1.3 µs

0.6 µs

0.6 µs

1.3 µs

0.6 µs

100 ns

0 900 ns

0.6 µs

300 ns

300 ns

400 pF

MAX9877

Low RF Susceptibility, Mono Audio

Subsystem with DirectDrive Headphone Amplifier

_______________________________________________________________________________________ 7

Typical Operating Characteristics

(VDD= PVDD= 3.7V, V

GND

= V

PGND

= 0V. Single-ended inputs, preamp gain = 0dB, volume controls = 0dB, OSC = 00, BYPASS =

0, SHDN = 1. Speaker loads (Z

SPK

) connected between OUT+ and OUT-. Headphone loads (RHP) connected from HPL or HPR to

GND. Z

SPK

= ∞, RHP= ∞. C1 = C2 = C

BIAS

= 1µF. TA= +25°C, unless otherwise noted.)

GENERAL

SUPPLY CURRENT

vs. SUPPLY VOLTAGE

9

HEADPHONE ONLY
INPUTS AC-COUPLED TO GND
OUTMODE = 8

8

= V

V

7

6

SUPPLY CURRENT (mA)

5

4

2.5 5.5

= 3.3V

SDA

SCL

f

= 1176kHz SREAD-SPECTRUM MODE

OSC

f

= 700kHz

OSC

SUPPLY VOLTAGE (V)

SHUTDOWN CURRENT

vs. SUPPLY VOLTAGE

14

INPUTS AC-COUPLED TO GND

= V

SDA

SCL

= 3.3V

V

13

12

f

OSC

= 1100kHz

5.04.54.03.53.0

SUPPLY CURRENT

vs. SUPPLY VOLTAGE

10

SPEAKER ONLY
INPUTS AC-COUPLED TO GND

MAX9877 toc01

9

OUTMODE = 7

= V

= 3.3V

V

SDA

8

7

6

SUPPLY CURRENT (mA)

5

4

MAX9877 toc04

SCL

f

= 1176kHz

OSC

SPREAD-SPECTRUM MODE

f

= 1100kHz

OSC

2.5 5.5
SUPPLY VOLTAGE (V)

f

OSC

= 700kHz

5.04.54.03.53.0

MAX9877 toc02

20

0

-20

SUPPLY CURRENT

vs. SUPPLY VOLTAGE

13

HEADPHONE AND SPEAKER
INPUTS AC-COUPLED TO GND

12

OUTMODE = 9

= V

SDA

f

SCL

OSC

= 3.3V

f

OSC

SPREAD-SPECTRUM MODE

= 1100kHz

SUPPLY VOLTAGE (V)

V

11

10

9

SUPPLY CURRENT (mA)

8

7

2.5 5.5

VOLUME ATTENUATION

vs. _VOL CONTROL CODE

f

OSC

= 1176kHz

MAX9877 toc03

= 700kHz

5.04.54.03.53.0

MAX9877 toc05

11

10

9

SHUTDOWN CURRENT (μA)

8

7

2.5 5.5
SUPPLY VOLTAGE (V)

-40

-60

-80

VOLUME ATTENUATION (dB)

fIN = 1kHz

-100

MEASURED AT HPL
AND HPR

-120

5.04.54.03.53.0

35 0

_VOL CONTROL CODE

15

5

10202530

MAX9877

Low RF Susceptibility, Mono Audio
Subsystem with DirectDrive Headphone Amplifier

8 _______________________________________________________________________________________

Typical Operating Characteristics (continued)

(VDD= PVDD= 3.7V, V

GND

= V

PGND

= 0V. Single-ended inputs, preamp gain = 0dB, volume controls = 0dB, OSC = 00, BYPASS =

0, SHDN = 1. Speaker loads (Z

SPK

) connected between OUT+ and OUT-. Headphone loads (RHP) connected from HPL or HPR to

GND. Z

SPK

= ∞, RHP= ∞. C1 = C2 = C

BIAS

= 1µF. TA= +25°C, unless otherwise noted.)

SPEAKER AMPLIFIER

TOTAL HARMONIC DISTORTION PLUS

NOISE vs. FREQUENCY

MAX9877 toc06

FREQUENCY (Hz)

THD+N (%)

10k1k100

0.1

1

10

0.01
10 100k

VDD = PVDD = 3.7V
Z

SPK

= 8Ω + 68μH

P

OUT

= 200mW

P

OUT

= 675mW

TOTAL HARMONIC DISTORTION PLUS

NOISE vs. FREQUENCY

MAX9877 toc07

FREQUENCY (Hz)

THD+N (%)

10k1k100

0.1

1

10

0.01
10 100k

VDD = PV

DD

= 3.7V

Z

SPK

= 4Ω + 33μH
DASHED LINES ARE LIMITED
BY THE ABS. MAX RATINGS

P

OUT

= 1100mW

P

OUT

= 650mW

TOTAL HARMONIC DISTORTION PLUS

NOISE vs. FREQUENCY

MAX9877 toc08

FREQUENCY (Hz)

THD+N (%)

10k1k100

0.1

1

10

0.01
10 100k

P

OUT

= 425mW

P

OUT

= 200mW

VDD = PVDD = 3V
Z

SPK

= 8Ω + 68μH

TOTAL HARMONIC DISTORTION PLUS

NOISE vs. FREQUENCY

MAX9877 toc09

FREQUENCY (Hz)

THD+N (%)

10k1k100

0.1

1

10

0.01
10 100k

P

OUT

= 700mW

P

OUT

= 250mW

VDD = PVDD = 3V
Z

SPK

= 4Ω + 33μH

THD+N (%)

0.01

TOTAL HARMONIC DISTORTION PLUS

NOISE vs. OUTPUT POWER

10

VDD = PVDD = 5V

= 4Ω + 33μH

Z

SPK

DASHED LINES ARE LIMITED
BY THE ABS. MAX RATINGS

1

fIN = 20Hz

0.1

0 2.51.0 3.00.5 2.0

fIN = 6kHz

fIN = 1kHz

1.5

OUTPUT POWER (W)

TOTAL HARMONIC DISTORTION PLUS

NOISE vs. FREQUENCY

1

VDD = PVDD = 3.7V

= 200mW

P

OUT

= 8Ω + 68μH

Z

SPK

0.1

f

OSC

THD+N (%)

0.01
10 100k

MAX9877 toc12

= 1176kHz

f

= 700kHz

OSC

f

= 1100kHz

OSC

FREQUENCY (Hz)

10k1k100

TOTAL HARMONIC DISTORTION PLUS

NOISE vs. OUTPUT POWER

10

VDD = PVDD = 5V

= 8Ω + 68μH

Z

MAX9877 toc10

SPK

1

fIN = 20Hz

THD+N (%)

0.1

0.01
0 2.0

TOTAL HARMONIC DISTORTION PLUS

NOISE vs. OUTPUT POWER

10

VDD = PVDD = 3.7V

= 8Ω + 68μH

Z

SPK

1

fIN = 20Hz

THD+N (%)

0.1

fIN = 1kHz

0.01
0 1000600400 800200

OUTPUT POWER (mW)

MAX9877 toc11

fIN = 6kHz

fIN = 1kHz

1.51.00.5

OUTPUT POWER (W)

MAX9877 toc13

fIN = 6kHz

MAX9877

EFFICIENCY

vs. OUTPUT POWER

MAX9877 toc19

OUTPUT POWER (W)

EFFICIENCY (%)

1.5

100

0

50

60

10

80

30

70

20

90

40

0 3.00.5 2.01.0 2.5

VDD = PVDD = 5V
f

IN

= 1kHz
DASHED LINES ARE LIMITED
BY THE ABS. MAX RATINGS

Z

SPK

= 8Ω + 68μH

Z

SPK

= 4Ω + 33μH

EFFICIENCY

vs. OUTPUT POWER

MAX9877 toc20

OUTPUT POWER (W)

EFFICIENCY (%)

100

0

50

60

10

80

30

70

20

90

40

0 2.01.51.00.5

VDD = PVDD = 3.7V
f

IN

= 1kHz
DASHED LINES ARE LIMITED
BY THE ABS. MAX RATINGS

Z

SPK

= 8Ω + 68μH

Z

SPK

= 4Ω + 33μH

EFFICIENCY

vs. OUTPUT POWER

MAX9877 toc21

OUTPUT POWER (mW)

EFFICIENCY (%)

100

0

50

60

10

80

30

70

20

90

40

0 1000600200 800400

VDD = PVDD = 3.7V
f

IN

= 1kHz

Z

SPK

= 8Ω + 68μH

f

OSC

= 700kHz

f

OSC

= 1176kHz AND 1100kHz

Typical Operating Characteristics (continued)

(VDD= PVDD= 3.7V, V

GND

= V

PGND

= 0V. Single-ended inputs, preamp gain = 0dB, volume controls = 0dB, OSC = 00, BYPASS =

0, SHDN = 1. Speaker loads (Z

SPK

) connected between OUT+ and OUT-. Headphone loads (RHP) connected from HPL or HPR to

GND. Z

SPK

= ∞, RHP= ∞. C1 = C2 = C

BIAS

= 1µF. TA= +25°C, unless otherwise noted.)

Low RF Susceptibility, Mono Audio

Subsystem with DirectDrive Headphone Amplifier

_______________________________________________________________________________________ 9

TOTAL HARMONIC DISTORTION PLUS

NOISE vs. OUTPUT POWER

10

VDD = PVDD = 3.7V

= 4Ω + 33μH

Z

SPK

DASHED LINES ARE LIMITED
BY THE ABS. MAX RATINGS

1

THD+N (%)

0.1

0.01

fIN = 20Hz

0 1.51.00.5

fIN = 6kHz

fIN = 1kHz

OUTPUT POWER (W)

TOTAL HARMONIC DISTORTION PLUS

NOISE vs. OUTPUT POWER

1

VDD = PVDD = 3.7V

= 1kHz

f

IN

= 8Ω + 68μH

Z

SPK

TOTAL HARMONIC DISTORTION PLUS

NOISE vs. OUTPUT POWER

10

VDD = PVDD = 3V

= 8Ω + 68μH

Z

1

THD+N (%)

0.1

0.01

SPK

fIN = 20Hz

fIN = 1kHz

0 600400200

OUTPUT POWER (mW)

MAX9877 toc14

TOTAL HARMONIC DISTORTION PLUS

NOISE vs. OUTPUT POWER

1

f

= 1100kHz

MAX9877 toc17

OSC

f

OSC

= 700kHz

fIN = 6kHz

MAX9877 toc15

MAX9877 toc18

TOTAL HARMONIC DISTORTION PLUS

NOISE vs. OUTPUT POWER

10

VDD = PVDD = 3V

= 4Ω + 33μH

Z

SPK

DASHED LINES ARE LIMITED
BY THE ABS. MAX RATINGS

1

fIN = 20Hz

THD+N (%)

0.1

fIN = 1kHz

0.01
0 1.20.80.4 1.00.60.2

OUTPUT POWER (W)

MAX9877 toc16

fIN = 6kHz

0.1

THD+N (%)

0.01
0 800

f

= 1176kHz SSM

OSC

f

= 1100kHz

OSC

OUTPUT POWER (mW)

f

= 700kHz

OSC

600400200

0.1

f

THD+N (%)

0.01

= 1176kHz SSM

OSC

VDD = PVDD = 3.7V

= 6kHz

f

IN

= 8Ω + 68μH

Z

SPK

0 800

OUTPUT POWER (mW)

600400200

MAX9877

Low RF Susceptibility, Mono Audio
Subsystem with DirectDrive Headphone Amplifier

10 ______________________________________________________________________________________

Typical Operating Characteristics (continued)

(VDD= PVDD= 3.7V, V

GND

= V

PGND

= 0V. Single-ended inputs, preamp gain = 0dB, volume controls = 0dB, OSC = 00, BYPASS =

0, SHDN = 1. Speaker loads (Z

SPK

) connected between OUT+ and OUT-. Headphone loads (RHP) connected from HPL or HPR to

GND. Z

SPK

= ∞, RHP= ∞. C1 = C2 = C

BIAS

= 1µF. TA= +25°C, unless otherwise noted.)

IN-BAND OUTPUT SPECTRUM

MAX9877 toc28

FREQUENCY (kHz)

AMPLITUDE (dBV)

15105

0

-140

-80

-40

-120

-20

-60

-100

020

f

OSC

= 1100kHz

f

IN

= 1kHz

IN-BAND OUTPUT SPECTRUM

MAX9877 toc29

FREQUENCY (kHz)

AMPLITUDE (dBV)

15105

0

-140

-80

-40

-120

-20

-60

-100

020

f

OSC

= 700kHz

f

IN

= 1kHz

EFFICIENCY

vs. OUTPUT POWER

MAX9877 toc22

OUTPUT POWER (mW)

EFFICIENCY (%)

100

0

50

60

10

80

30

70

20

90

40

0 1000600400 800200

VDD = PVDD = 3V
f

IN

= 1kHz
DASHED LINES ARE LIMITED
BY THE ABS. MAX RATINGS

Z

SPK

= 8Ω + 68μH

Z

SPK

= 4Ω + 33μH

OUTPUT POWER

vs. SUPPLY VOLTAGE

MAX9877 toc23

SUPPLY VOLTAGE (V)

OUTPUT POWER (W)

5.04.54.03.53.0

2.0

2.5

0.5

1.0

1.5

3.0

3.5

0

2.5 5.5

10% THD+N

1% THD+N

VDD = PV

DD

Z

SPK

= 4Ω + 33μH
DASHED LINES ARE LIMITED
BY THE ABS. MAX RATINGS

OUTPUT POWER

vs. SUPPLY VOLTAGE

MAX9877 toc24

SUPPLY VOLTAGE (V)

OUTPUT POWER (W)

5.04.54.03.53.0

2.0

0.2

0.8

0.6

1.2

1.0

1.6

0.4

1.8

1.4

0

2.5 5.5

VDD = PV

DD

Z

SPK

= 8Ω + 68μH

10% THD+N

1% THD+N

OUTPUT POWER

vs. LOAD RESISTANCE

MAX9877 toc25

LOAD RESISTANCE (Ω)

OUTPUT POWER (W)

1.8

0.2

0.8

0.6

1.2

1.0

1.6

0.4

1.4

0

0 100704010 805020 906030

VDD = PVDD = 3.7V
f

IN

= 1kHz

Z

SPK

= LOAD + 68μH

10% THD+N

1% THD+N

OUTPUT POWER

vs. LOAD RESISTANCE

MAX9877 toc26

LOAD RESISTANCE (Ω)

OUTPUT POWER (W)

1.2

0.2

0.8

0.6

1.0

0.4

0

0 100704010 805020 906030

VDD = PVDD = 3V
f

IN

= 1kHz

Z

SPK

= LOAD + 68μH

10% THD+N

1% THD+N

POWER-SUPPLY REJECTION RATIO

vs. FREQUENCY

MAX9877 toc27

FREQUENCY (Hz)

PSRR (dB)

10k1k100

-90

-70

-60

-40

-30

-10

-80

-50

-20

0

-100
10 100k

VDD = PVDD = 3.7V
V

RIPPLE

= 100mV

P-P

INPUTS AC-COUPLED TO GND

MAX9877

Typical Operating Characteristics (continued)

(VDD= PVDD= 3.7V, V

GND

= V

PGND

= 0V. Single-ended inputs, preamp gain = 0dB, volume controls = 0dB, OSC = 00, BYPASS =

0, SHDN = 1. Speaker loads (Z

SPK

) connected between OUT+ and OUT-. Headphone loads (RHP) connected from HPL or HPR to

GND. Z

SPK

= ∞, RHP= ∞. C1 = C2 = C

BIAS

= 1µF. TA= +25°C, unless otherwise noted.)

Low RF Susceptibility, Mono Audio

Subsystem with DirectDrive Headphone Amplifier

______________________________________________________________________________________ 11

IN-BAND OUTPUT SPECTRUM

0

f

= 1176kHz

OSC

= 1kHz

f

IN

-20

-40

-60

-80

AMPLITUDE (dBV)

-100

-120

-140
020

WIDEBAND OUTPUT SPECTRUM

0

f

= 700kHz

OSC

-10

INPUTS AC-COUPLED TO GND

-20

-30

-40

-50

-60

AMPLITUDE (dBV)

-70

-80

-90

-100

0.1 10 1001

FREQUENCY (kHz)

FREQUENCY (MHz)

MAX9877 toc30

15105

MAX9877 toc32

WIDEBAND OUTPUT SPECTRUM

0

f

= 1100kHz

OSC

-10

INPUTS AC-COUPLED TO GND

-20

-30

-40

-50

-60

AMPLITUDE (dBV)

-70

-80

-90

-100

0.1 10 1001

WIDEBAND OUTPUT SPECTRUM

0

f

= 1176kHz

OSC

-10

INPUTS AC-COUPLED TO GND

-20

-30

-40

-50

-60

AMPLITUDE (dBV)

-70

-80

-90

-100

0.1 10 1001

FREQUENCY (MHz)

FREQUENCY (MHz)

MAX9877 toc31

MAX9877 toc33

V

BIAS

500mV/div

OUT+ - OUT-

1V/div

HARDWARE SHUTDOWN RESPONSE

20ms/div

MAX9877 toc34

V

SDA

2V/div

OUT+ - OUT-

1V/div

ON- AND OFF-RESPONSE

MAX9877 toc35

20ms/div

SOFTWARE SHUTDOWN

MAX9877

Low RF Susceptibility, Mono Audio
Subsystem with DirectDrive Headphone Amplifier

12 ______________________________________________________________________________________

Typical Operating Characteristics (continued)

(VDD= PVDD= 3.7V, V

GND

= V

PGND

= 0V. Single-ended inputs, preamp gain = 0dB, volume controls = 0dB, OSC = 00, BYPASS =

0, SHDN = 1. Speaker loads (Z

SPK

) connected between OUT+ and OUT-. Headphone loads (RHP) connected from HPL or HPR to

GND. Z

SPK

= ∞, RHP= ∞. C1 = C2 = C

BIAS

= 1µF. TA= +25°C, unless otherwise noted.)

HEADPHONE AMPLIFIER

TOTAL HARMONIC DISTORTION PLUS

NOISE vs. FREQUENCY

MAX9877 toc36

FREQUENCY (Hz)

THD+N (%)

0

0.001

0.01

0.1

10 100 1k 10k 100k

VDD = PVDD = 3.7V
R

HP

= 32

Ω

P

OUT

= 10mW

P

OUT

= 20mW

TOTAL HARMONIC DISTORTION PLUS

NOISE vs. FREQUENCY

MAX9877 toc37

FREQUENCY (Hz)

THD+N (%)

1

0.001

0.01

0.1

10 100 1k 10k 100k

VDD = PVDD = 3.7V
R

HP

= 16

Ω

P

OUT

= 20mW

P

OUT

= 40mW

TOTAL HARMONIC DISTORTION PLUS

NOISE vs. FREQUENCY

MAX9877 toc38

FREQUENCY (Hz)

THD+N (%)

1

0.001

0.01

0.1

10 100 1k 10k 100k

VDD = PVDD = 3V
R

HP

= 32

Ω

P

OUT

= 10mW

P

OUT

= 20mW

TOTAL HARMONIC DISTORTION PLUS

NOISE vs. FREQUENCY

MAX9877 toc39

FREQUENCY (Hz)

THD+N (%)

1

0.001

0.01

0.1

10 100 1k 10k 100k

VDD = PVDD = 3V
R

HP

= 16

Ω

P

OUT

= 15mW

P

OUT

= 30mW

TOTAL HARMONIC DISTORTION PLUS

NOISE vs. OUTPUT POWER

MAX9877 toc40

OUTPUT POWER (mW)

THD+N (%)

302010

0.01

0.1

1

10

0.001
040

VDD = PVDD = 3.7V
R

HP

= 32Ω

fIN = 20Hz

fIN = 1kHz

fIN = 6kHz

TOTAL HARMONIC DISTORTION PLUS

NOISE vs. OUTPUT POWER

MAX9877 toc41

OUTPUT POWER (mW)

THD+N (%)

0.01

0.1

1

10

0.001
0 20406010 30 50 70

VDD = PVDD = 3.7V
R

HP

= 16Ω

fIN = 20Hz AND 1kHz

fIN = 6kHz

TOTAL HARMONIC DISTORTION PLUS

NOISE vs. OUTPUT POWER

MAX9877 toc42

OUTPUT POWER (mW)

THD+N (%)

302010

0.01

0.1

1

10

0.001
040

VDD = PVDD = 3V
R

HP

= 32

Ω

fIN = 20Hz

fIN = 1kHz

fIN = 6kHz

TOTAL HARMONIC DISTORTION PLUS

NOISE vs. OUTPUT POWER

MAX9877 toc43

OUTPUT POWER (mW)

THD+N (%)

0.01

0.1

1

10

0.001
0204010 30 50 60

VDD = PVDD = 3V
R

HP

= 16

Ω

fIN = 20Hz AND 1kHz

fIN = 6kHz

MAX9877

Typical Operating Characteristics (continued)

(VDD= PVDD= 3.7V, V

GND

= V

PGND

= 0V. Single-ended inputs, preamp gain = 0dB, volume controls = 0dB, OSC = 00, BYPASS =

0, SHDN = 1. Speaker loads (Z

SPK

) connected between OUT+ and OUT-. Headphone loads (RHP) connected from HPL or HPR to

GND. Z

SPK

= ∞, RHP= ∞. C1 = C2 = C

BIAS

= 1µF. TA= +25°C, unless otherwise noted.)

Low RF Susceptibility, Mono Audio

Subsystem with DirectDrive Headphone Amplifier

______________________________________________________________________________________ 13

POWER DISSIPATION

vs. OUTPUT POWER

350

300

250

200

150

100

POWER DISSIPATION (mW)

50

0

RHP = 32Ω

0 15010050

OUTPUT POWER (mW)

OUTPUT POWER

vs. SUPPLY VOLTAGE

100

90

80

70

60

50

40

OUTPUT POWER (mW)

30

20

10

0

2.5 5.5

10% THD+N

SUPPLY VOLTAGE (V)

VDD = PVDD = 3.7V
f

IN

P

OUT

1% THD+N

RHP = 16Ω

= 1kHz

= P

+ P

HPL

fIN = 1kHz

= 16Ω

R

HP

5.04.54.03.53.0

POWER DISSIPATION

vs. OUTPUT POWER

250

MAX9877 toc44

200

150

100

HPR

POWER DISSIPATION (mW)

50

0

RHP = 32Ω

0 15010050

OUTPUT POWER (mW)

VDD = PVDD = 3V
f

IN

P

OUT

OUTPUT POWER

vs. LOAD RESISTANCE

100

90

MAX9877 toc47

80

70

60

50

40

OUTPUT POWER (mW)

30

20

10

10% THD+N

1% THD+N

0

10 40 70 10020 50 8030 60 90

LOAD RESISTANCE (Ω)

VDD = PVDD = 3.7V
f

IN

RHP = 16Ω

= 1kHz

= P

HPL

= 1kHz

+ P

HPR

MAX9877 toc45

OUTPUT POWER (mW)

100

MAX9877 toc48

OUTPUT POWER (mW)

OUTPUT POWER

vs. SUPPLY VOLTAGE

50

45

40

35

30

25

20

15

10

5

0

2.5 5.5

10% THD+N

1% THD+N

SUPPLY VOLTAGE (V)

OUTPUT POWER

vs. LOAD RESISTANCE

90

80

70

60

10% THD+N

50

40

30

20

1% THD+N

10

0

10 40 70 10020 50 8030 60 90

LOAD RESISTANCE (Ω)

fIN = 1kHz

= 32Ω

R

HP

5.04.54.03.53.0

VDD = PVDD = 3V

= 1kHz

f

IN

MAX9877 toc46

MAX9877 toc49

OUTPUT POWER

vs. LOAD RESISTANCE

100

90

80

70

60

C1 = C2 = 2.2μF

50

40

OUTPUT POWER (mW)

30

20

C1 = C2 = 0.47μF

10

0

10 40 70 10020 50 8030 60 90

LOAD RESISTANCE (Ω)

VDD = PVDD = 3V
OSC = 10

= 1kHz

f

IN

1% THD+N

MAX9877 toc50

POWER-SUPPLY REJECTION RATIO

vs. FREQUENCY

0

-10

-20

-30

-40

-50

-60

PSRR (dB)

-70

-80

-90

-100

-110

-120
10 100 1k 10k 100k

VDD = PVDD = 3.7V
V

RIPPLE

RHP = 32Ω
INPUTS AC-COUPLED TO GND

HPR

HPL

FREQUENCY (Hz)

= 100mV

P-P

MAX9877 toc51

MAX9877

Low RF Susceptibility, Mono Audio
Subsystem with DirectDrive Headphone Amplifier

14 ______________________________________________________________________________________

Typical Operating Characteristics (continued)

(VDD= PVDD= 3.7V, V

GND

= V

PGND

= 0V. Single-ended inputs, preamp gain = 0dB, volume controls = 0dB, OSC = 00, BYPASS =

0, SHDN = 1. Speaker loads (Z

SPK

) connected between OUT+ and OUT-. Headphone loads (RHP) connected from HPL or HPR to

GND. Z

SPK

= ∞, RHP= ∞. C1 = C2 = C

BIAS

= 1µF. TA= +25°C, unless otherwise noted.)

COMMON-MODE REJECTION RATIO

vs. FREQUENCY

MAX9877 toc55

FREQUENCY (Hz)

CMRR (dB)

80

0

20

40

60

10

70

30

50

10 100k10k1k100

VDD = PVDD = 3.7V
CMRR = 20log(A

DM/ACM

)

+9dB

+20dB

0dB

HARDWARE SHUTDOWN RESPONSE

MAX9877 toc56

V

BIAS

500mV/div

HPL

500mV/div

20ms/div

HPR

500mV/div

SOFTWARE SHUTDOWN

ON- AND OFF-REPSONSE

MAX9877 toc57

V

BIAS

500mV/div

HPL

500mV/div

20ms/div

HPR

500mV/div

OUTPUT SPECTRUM

MAX9877 toc52

FREQUENCY (kHz)

AMPLITUDE (dBV)

0

-140

-100

-60

-20

-120

-80

-40

02015105

VDD = PVDD = 3.7V
f

IN

= 1kHz

R

HP

= 32Ω

OUTPUT SPECTRUM

MAX9877 toc53

FREQUENCY (kHz)

AMPLITUDE (dBV)

0

-140

-100

-60

-20

-120

-80

-40

02015105

VDD = PVDD = 3.7V
f

IN

= 1kHz

R

HP

= 16Ω

CROSSTALK vs. FREQUENCY

MAX9877 toc54

FREQUENCY (Hz)

CROSSTALK (dB)

0

-120

-30

-10

-50

-90

-60

-100

-110

-70

-20

-40

-80

10 100k10k1k100

VDD = PVDD = 3.7V
V

INA_

= 1V

P-P

R

HP

= 16Ω

HPR TO HPL

HPL TO HPR

MAX9877

Low RF Susceptibility, Mono Audio

Subsystem with DirectDrive Headphone Amplifier

______________________________________________________________________________________ 15

Typical Operating Characteristics (continued)

(VDD= PVDD= 3.7V, V

GND

= V

PGND

= 0V. Single-ended inputs, preamp gain = 0dB, volume controls = 0dB, OSC = 00, BYPASS =

0, SHDN = 1. Speaker loads (Z

SPK

) connected between OUT+ and OUT-. Headphone loads (RHP) connected from HPL or HPR to

GND. Z

SPK

= ∞, RHP= ∞. C1 = C2 = C

BIAS

= 1µF. TA= +25°C, unless otherwise noted.)

ANALOG SWITCH

TOTAL HARMONIC DISTORTION PLUS

NOISE vs. OUTPUT POWER

MAX9877 toc58

OUTPUT POWER (mW)

THD+N (%)

10

0.01

0.1

1

0 100755025

EXTERNAL CLASS AB AMPLIFIER
CONNECTED DIRECTLY TO RXIN+
AND RXIN-

f = 6kHz

f = 20Hz

f = 1kHz

TOTAL HARMONIC DISTORTION PLUS

NOISE vs. OUTPUT POWER

MAX9877 toc59

OUTPUT POWER (mW)

THD+N (%)

10

0.001

1

0.1

0.01

080604020 70503010

EXTERNAL CLASS AB AMPLIFIER
CONNECTED WITH 9Ω RESISTORS
IN SERIES WITH RXIN+ AND RXIN-

f = 6kHz

f = 20Hz AND 1kHz

MAX9877

Low RF Susceptibility, Mono Audio
Subsystem with DirectDrive Headphone Amplifier

16 ______________________________________________________________________________________

Pin Description

Detailed Description

Signal Path

The MAX9877 signal path consists of flexible inputs,
signal mixing, volume control, and output amplifiers
(Figure 1).

The inputs can be configured for single-ended or differ­ential signals (Figure 2). The internal preamplifiers fea­ture three programmable gain settings of 0dB, +9dB,
and +20dB. Following preamplification, the input sig­nals are mixed, volume adjusted, and routed to the
headphone and speaker amplifiers based on the out­put mode configuration (see Table 7). The volume con­trol stages provide up to 75dB attenuation. The
headphone amplifier is configured as a unity-gain

buffer while the speaker amplifier provides +12dB of
additional gain.

When an input is configured as mono differential it can
be routed to the speaker or to both headphones. When
an input is stereo, it is mixed to mono without attenuation
for the speaker and kept stereo for the headphones.

When the application does not require the use of both
INA_ and INB_, the SNR of the MAX9877 is improved
by deselecting the unused input through the I2C output
mode register and AC-coupling the unused inputs to
ground with a 330pF capacitor. The 330pF capacitor
and the input resistance to the MAX9877 form a high­pass filter preventing audible noise from coupling into
the outputs.

PIN NAME FUNCTION

A1 HPR Right Headphone Output

A2 HPL Left Headphone Output

A3 V

A4 C1N Charge-Pump Flying Capacitor Negative Terminal. Connect a 1µF capacitor between C1P and C1N.

A5 C1P Charge-Pump Flying Capacitor Positive Terminal. Connect a 1µF capacitor between C1P and C1N.

B1 V

B2 BIAS

B3 SDA Serial-Data Input. Connect a pullup resistor from SDA to a 1.7V to 3.6V supply.

B4 RXIN+ Receiver Bypass Positive Input

B5 OUT+ Positive Speaker Output

C1 INB2 Input B2. Right input or positive input (see the Differential Input Configuration (ΔIN_) section).

C2 INB1 Input B1. Left input or negative input (see the Differential Input Configuration (ΔIN_) section).

C3 SCL Serial-Clock Input. Connect a pullup resistor from SCL to a 1.7V to 3.6V supply.

C4 PGND Power Ground

C5 PV

D1 INA2 Input A2. Right input or positive input (see the Differential Input Configuration (ΔIN_) section).

D2 INA1 Input A1. Left input or negative input (see the Differential Input Configuration (ΔIN_) section).

D3 GND Analog Ground

D4 RXIN- Receiver Bypass Negative Input

D5 OUT- Negative Speaker Output

SS

DD

Headphone Amplifier Negative Power Supply. Bypass with a 1µF capacitor to PGND.

Analog Supply. Connect to PVDD. Bypass with a 1µF capacitor to GND.

Common-Mode Bias. Bypass to GND with a 1µF capacitor. Pulse low to reset the part and place in
shutdown (see the Typical Application Circuit).

Class D and Charge-Pump Power Supply. Bypass with a 1µF capacitor to PGND.

DD

MAX9877

MIXER

AND

MUX

INPUT A

0dB/+9dB/+20dB

INA2

INA1

INPUT B

0dB/+9dB/+20dB

INB2

INB1

-75dB TO 0dB

0dB HPR

-75dB TO 0dB

0dB HPL

-75dB TO 0dB

+12dB

OUT+

OUT-

Figure 1. Signal Path

IN_2 (R)

R

L

IN_1 (L)

STEREO SINGLE-ENDED

TO MIXER

IN_2 (+)

IN_1 (-)

DIFFERENTIAL

TO MIXER

Figure 2. Differential and Stereo Single-Ended Input Configurations

Low RF Susceptibility, Mono Audio

Subsystem with DirectDrive Headphone Amplifier

______________________________________________________________________________________ 17

MAX9877

Low RF Susceptibility, Mono Audio
Subsystem with DirectDrive Headphone Amplifier

18 ______________________________________________________________________________________

Volume Control and Mute

The MAX9877 features three volume control registers
(see Table 4) allowing independent volume control of
mono speaker and stereo headphone amplifier outputs.
Each volume control register has 31 steps providing 0 to
75dB (typ) of attenuation and a mute function.

Class D Speaker Amplifier

The MAX9877 integrates a filterless Class D amplifier
that offers much higher efficiency than Class AB with­out the typical disadvantages.

The high efficiency of a Class D amplifier is due to the
switching operation of the output stage transistors. In a
Class D amplifier, the output transistors act as current­steering switches and consume negligible additional
power. Any power loss associated with the Class D out­put stage is mostly due to the I2R loss of the MOSFET
on-resistance, and quiescent current overhead.

The theoretical best efficiency of a linear amplifier is
78%, however, that efficiency is only exhibited at peak
output power. Under normal operating levels (typical
music reproduction levels), efficiency falls below 30%,
whereas the MAX9877 still exhibits 70% efficiency
under the same conditions (Figure 3).

Ultra-Low EMI Filterless Output Stage

In traditional Class D amplifiers, the high dV/dt of the
rising and falling edge transitions results in increased
EMI emissions, which requires the use of external LC
filters or shielding to meet EN55022 electromagnetic­interference (EMI) regulation standards. Limiting the
dV/dt normally results in decreased efficiency. Maxim’s

active emissions limiting circuitry actively limits the
dV/dt of the rising and falling edge transitions, provid­ing reduced EMI emissions, while maintaining up to
87% efficiency.

In addition to active emission limiting, the MAX9877
features a patented spread-spectrum modulation mode
that flattens the wideband spectral components.
Proprietary techniques ensure that the cycle-to-cycle
variation of the switching period does not degrade
audio reproduction or efficiency (see the

Typical

Operating Characteristics

). Select spread-spectrum

modulation mode through the I

2

C interface (Table 6). In
spread-spectrum modulation mode, the switching fre­quency varies randomly by ±60kHz around the center
frequency (1.176MHz). The effect is to reduce the peak
energy at harmonics of the switching frequency. Above
10MHz, the wideband spectrum looks like white noise
for EMI purposes (see Figure 4).

Speaker Current Limit

Most applications will not enter current limit unless the
output is short circuited or connected incorrectly.

When the output current of the speaker amplifier
exceeds the current limit (1.5A, typ) the MAX9877 dis­ables the outputs for approximately 250µs. At the end of
250µs, the outputs are re-enabled, if the fault condition
still exists, the MAX9877 will continue to disable and re­enable the outputs until the fault condition is removed.

Bypass Mode

The integrated DPST analog audio switch allows the
MAX9877’s Class D amplifier to be bypassed. In
bypass mode, the Class D amplifier is automatically
disabled allowing an external amplifier to drive the
speaker connected between OUT+ and OUT- through
RXIN+ and RXIN- (see the

Typical Application Circuit

).

The bypass switch is enabled at startup. The switch can
be opened or closed even when the MAX9877 is in soft­ware shutdown (see the

I2C Register Description

section).

Unlike discrete solutions, the switch design reduces
coupling of Class D switching noise to the RXIN_
inputs. This eliminates the need for a costly T-switch.

The bypass switch is typically used with two 9.1Ω resis­tors connected to each input. These resistors, in combi­nation with the switch on-resistance and an 8Ω load,
approximate the 32Ω load expected by the external
amplifier. Although not required, using the resistors
optimizes THD+N.

Drive RXIN+ and RXIN- with a low-impedance source
to minimize noise on the pins. In applications that do
not require the bypass mode, leave RXIN+ and RXIN­unconnected.

MAX9877 EFFICIENCY

vs. IDEAL CLASS EFFICIENCY

MAX9877 fig03

OUTPUT POWER (W)

EFFICIENCY (%)

0.750.500.25

10

20

30

40

50

60

70

80

90

100

0

0 1.00

MAX9877

IDEAL CLASS AB

VDD = PVDD = 3.7V (MAX9877)
V

SUPPLY

= 3.7V (IDEAL CLASS AB)

Figure 3. MAX9877 Efficiency vs. Class AB Efficiency

MAX9877

Low RF Susceptibility, Mono Audio

Subsystem with DirectDrive Headphone Amplifier

______________________________________________________________________________________ 19

DirectDrive Headphone Amplifier

Traditional single-supply headphone amplifiers have
outputs biased at a nominal DC voltage (typically half
the supply). Large coupling capacitors are needed to
block this DC bias from the headphone. Without these
capacitors, a significant amount of DC current flows to
the headphone, resulting in unnecessary power dissi­pation and possible damage to both the headphone
and headphone amplifier.

Maxim’s patented DirectDrive architecture uses a
charge pump to create an internal negative supply volt­age. This allows the headphone outputs of the
MAX9877 to be biased at GND while operating from a
single supply (Figure 5). Without a DC component, there
is no need for the large DC-blocking capacitors. Instead
of two large (220µF, typ) capacitors, the MAX9877
charge pump requires two small ceramic capacitors,

conserving board space, reducing cost, and improving
the frequency response of the headphone amplifier. See
the Output Power vs. Load Resistance graph in the

Typical Operating Characteristics

for details of the pos­sible capacitor sizes. There is a low DC voltage on the
amplifier outputs due to amplifier offset. However, the
offset of the MAX9877 is typically ±0.15mV, which, when
combined with a 32Ω load, results in less than 10µA of
DC current flow to the headphones.

In addition to the cost and size disadvantages of the
DC-blocking capacitors required by conventional head­phone amplifiers, these capacitors limit the amplifier’s
low-frequency response and can distort the audio sig­nal. Previous attempts at eliminating the output-cou­pling capacitors involved biasing the headphone return
(sleeve) to the DC bias voltage of the headphone
amplifiers. This method raises some issues:

FREQUENCY (MHz)

AMPLITUDE (dBμV/m)

1601401201008060

10

15

20

25

30

35

40

TEST LIMIT

MAX9877 OUTPUT

MAX9877 OUTPUT

TEST LIMIT

5

30

180 200 240 260 280 300220

FREQUENCY (MHz)

AMPLITUDE (dBμV/m)

600

550

500

450

400350

15

20

25

35

40

10

300

650

700 800

850 900

1000950

750

Figure 4. EMI with 152mm of Speaker Cable

MAX9877

Low RF Susceptibility, Mono Audio
Subsystem with DirectDrive Headphone Amplifier

20 ______________________________________________________________________________________

1) The sleeve is typically grounded to the chassis.
Using the midrail biasing approach, the sleeve
must be isolated from system ground, complicating
product design.

2) During an ESD strike, the amplifier’s ESD structures
are the only path to system ground. Thus, the
amplifier must be able to withstand the full energy
from an ESD strike.

3) When using the headphone jack as a line out to
other equipment, the bias voltage on the sleeve
may conflict with the ground potential from other
equipment, resulting in possible damage to the
amplifiers.

The MAX9877 features a low-noise charge pump. The
switching frequency of the charge pump is 1/2of the
Class D switching frequency, regardless of the operating
mode. When the Class D amplifiers are operated in
spread-spectrum mode, the charge pump also switches
with a spread-spectrum pattern. The nominal switching
frequency is well beyond the audio range, and thus does
not interfere with audio signals. The switch drivers fea­ture a controlled switching speed that minimizes noise
generated by turn-on and turn-off transients. By limiting
the switching speed of the charge pump, the di/dt noise

caused by the parasitic trace inductance is minimized.
Although not typically required, additional high-frequen­cy noise attenuation can be achieved by increasing the
size of C2 (see the

Typical Application Circuit

). The

charge pump is active only in headphone modes.

Headphone Current Limit

The headphone amplifier current is limited to 140mA (typ).
The current limit clamps the output current, which appears
as clipping when the maximum current is exceeded.

Shutdown Mode

The MAX9877 features two ways of entering low-power
shutdown. The hardware shutdown function is controlled
by pulsing BIAS low for 1ms. While BIAS is low the ampli­fiers are shut down. Following an 80ms reset period, the
MAX9877 reverts to its power-on-reset condition. Pull
BIAS low using an open-drain output that is not pulled up
with a resistor (see the

Typical Application Circuit).

The
open-drain output leakage must not exceed 100nA and
must be able to sink at least 1mA.

The device can also be placed in shutdown mode by
writing to the SHDN bit in the Output Control Register.

Click-and-Pop Suppression

The MAX9877 features click-and-pop suppression that
eliminates audible transients from occurring at startup
and shutdown.

Use the following procedure to start up the MAX9877:

1) Configure the desired output mode and pream­plifier gain.

2) Set the SHDN bit to 1 to start up the amplifier.

3) Wait 10ms for the startup time to pass.

4) Increase the output volume to the desired level.

To disable the device simply set SHDN to 0.

During the startup period, the MAX9877 precharges the
input capacitors to prevent clicks and pops. If the output
amplifiers have been programmed to be active they are
held in shutdown until the precharge period is complete.

When power is initially applied to the MAX9877, the
power-on-reset state of all three volume control registers
is mute. For most applications, the volume can be set to
the desired level once the device is active. If the click­and-pop is too high, step through intermediate volume
settings with zero-crossing detection disabled. Stepping
through higher volume settings has a greater impact on
click-and-pop than lower volume settings.

For the lowest possible click-and-pop, start up the device
at minimum volume and then step through each volume
setting until the desired setting is reached. Disable zero­crossing detection if no input signal is expected.

V

DD

VDD/2

GND

CONVENTIONAL AMPLIFIER BIASING SCHEME

DirectDrive AMPLIFIER BIASING SCHEME

+V

DD

GND

-V

DD

(VSS)

Figure 5. Traditional Amplifier Output vs. MAX9877 DirectDrive
Output

MAX9877

I2C Register Description

Zero-Crossing Detection (ZCD)

Zero-crossing detection limits distortion in the output
signal during volume transitions by delaying the transi­tion until the mixer output crosses the internal bias volt­age. A timeout period (typically 60ms) forces the
volume transition if the mixer output signal does not
cross the bias voltage.

1 = Zero-crossing detection is enabled.

0 = Zero-crossing detection is disabled.

Differential Input Configuration (ΔIN_)

The inputs INA_ and INB_ can be configured for mono
differential or stereo single-ended operation.

1 = IN_ is configured as a mono differential input with
IN_2 as the positive and IN_1 as the negative input.

0 = IN_ is configured as a stereo single-ended input
with IN_2 as the right and IN_1 as the left input.

Preamplifier Gain (PGAIN_)

The preamplifier gain of INA_ and INB_ can be pro­grammed by writing to PGAIN_.

00 = 0dB

01 = +9dB

10 = +20dB

11 = Reserved

The MAX9877 is controlled through five I

2

C program­mable registers. Table 1 shows the MAX9877’s com­plete register map. Tables 2, 3, and 5 show the
individual registers.

I2C Address

The slave address of the MAX9877 is 1001101R/(W).

Table 1. Register Map

Table 2. Input Mode Control

I2C Interface

Low RF Susceptibility, Mono Audio

Subsystem with DirectDrive Headphone Amplifier

______________________________________________________________________________________ 21

REGISTER

Input Mode
Control

Speaker
Volume
Control

Left
Headphone
Volume
Control

Right
Headphone
Volume
Control

Output Mode
Control

REGISTER

ADDRESS

0x00 0x40 0 ZCD ΔINA ΔINB PGAINA PGAINB

0x01 0x00 0 0 0 SVOL (Table 4)

0x02 0x00 0 0 0 HPLVOL (Table 4)

0x03 0x00 0 0 0 HPRVOL (Table 4)

0x04 0x49 SHDN BYPASS OSC (Table 6) OUTMODE (Table 7)

POR STATE B7 B6 B5 B4 B3 B2 B1 B0

REGISTER B7 B6 B5 B4 B3 B2 B1 B0

0x00 0 ZCD Δ INA ΔINB PGAINA PGAINB

Shutdown (

SSHHDDNN

)

1 = MAX9877 operational.

0 = MAX9877 in low-power shutdown mode.

SHDN is an active-low shutdown bit that overrides all
settings and places the entire device in low-power shut­down mode. The I

2

C interface is fully active in this shut­down mode and bypass mode remains operational. All
register settings are preserved while in shutdown.

MAX9877

Low RF Susceptibility, Mono Audio
Subsystem with DirectDrive Headphone Amplifier

22 ______________________________________________________________________________________

Volume Control

The device has a separate volume control for left head­phone, right headphone, and speaker amplifiers. The

total system gain is a combination of the input gain, the
volume control, and the output amplifier gain. Table 4
shows the volume settings for each volume control.

Table 4. Volume Control Settings

Table 5. Output Mode Control

Table 3. Speaker/Left Headphone/Right Headphone Volume Control

REGISTER B7 B6 B5 B4 B3 B2 B1 B0

0x01 0 0 0 SVOL (Table 4)

0x02 0 0 0 HPLVOL (Table 4)

0x03 0 0 0 HPRVOL (Table 4)

CODE

0 0 0 0 0 0 MUTE

1 0 0 0 0 1 -75

2 0 0 0 1 0 -71

3 0 0 0 1 1 -67

4 0 0 1 0 0 -63

5 0 0 1 0 1 -59

6 0 0 1 1 0 -55

7 0 0 1 1 1 -51

8 0 1 0 0 0 -47

9 0 1 0 0 1 -44

10 0 1 0 1 0 -41

11 0 1 0 1 1 -38

12 0 1 1 0 0 -35

13 0 1 1 0 1 -32

14 0 1 1 1 0 -29

15 0 1 1 1 1 -26

B4 B3 B2 B1 B0

_VOL

GAIN (dB)

CODE

16 1 0 0 0 0 -23

17 1 0 0 0 1 -21

18 1 0 0 1 0 -19

19 1 0 0 1 1 -17

20 1 0 1 0 0 -15

21 1 0 1 0 1 -13

22 1 0 1 1 0 -11

23 1 0 1 1 1 -9

24 1 1 0 0 0 -7

25 1 1 0 0 1 -6

26 1 1 0 1 0 -5

27 1 1 0 1 1 -4

28 1 1 1 0 0 -3

29 1 1 1 0 1 -2

30 1 1 1 1 0 -1

31 1 1 1 1 1 0

B4 B3 B2 B1 B0

_VOL

GAIN (dB)

REGISTER B7 B6 B5 B4 B3 B2 B1 B0

0x04 SHDN BYPASS OSC (Table 6 ) OUTMODE (Table 7)

MAX9877

Table 6. Oscillator Modes

Table 7. Output Modes

— = Amplifier Off

Low RF Susceptibility, Mono Audio

Subsystem with DirectDrive Headphone Amplifier

______________________________________________________________________________________ 23

Bypass Mode (BYPASS)

1 = MAX9877 bypass switches are closed and the
Class D amplifier is disabled.

0 = Bypass mode disabled.

This mode does not control headphone operation.

Output Configuration (OUTMODE)

The MAX9877 has a stereo DirectDrive headphone ampli­fier and a mono Class D amplifier. Table 7 shows how
each of the output amplifiers can be configured and con­nected to the input signals. For simplicity, not all possible
combinations of ΔINA and ΔINB are shown.

OSC

B1 B0

0 0 1176, spread spectrum 588, spread spectrum

0 1 1100, fixed frequency 550, fixed frequency

1 0 700, fixed frequency 350, fixed frequency

1 1 Reserved

CLASS D OSCILLATOR MODE (kHz) CHARGE-PUMP OSCILLATOR MODE (kHz)

ΔIN_ = 0

MODE

B3 B2 B1 B0 SPK LEFT HP RIGHT HP SPK LEFT HP RIGHT HP

0 0000 Reserved Reserved

1 0001INA1+INA2 — — INAΔ ——

2 0010 — INA1 INA2 — INAΔ INAΔ

3 0011INA1+INA2 INA1 INA2 INAΔ INAΔ INAΔ

4 0100INB1+INB2 — — INBΔ ——

5 0101 — INB1 INB2 — INBΔ INBΔ

6 0110INB1+INB2 INB1 INB2 INBΔ INBΔ INBΔ

7 0111

8 1000 — INA1+INB1 INA2+INB2 —

9 1001

10–15 Reserved Reserved

OUTMODE

(THE SINGLE-ENDED INPUT SIGNALS

ARE DEFINED AS IN_1 = LEFT AND

IN_2 = RIGHT)

INA1+INA2

+INB1+INB2

INA1+INA2

+INB1+INB2

— — INAΔ+INBΔ ——

INA1+INB1 INA2+INB2 INAΔ+INBΔ

(THE DIFFERENTIAL INPUT SIGNAL IS

DEFINED AS IN_Δ = IN_2 - IN_1)

ΔIN_ = 1

INAΔ

+INBΔ

INAΔ

+INB_

INAΔ +INBΔ

INAΔ +INBΔ

MAX9877

Low RF Susceptibility, Mono Audio
Subsystem with DirectDrive Headphone Amplifier

24 ______________________________________________________________________________________

Figure 6. 2-Wire Interface Timing Diagram

SCL

SDA

SSrP

Figure 7. START, STOP, and REPEATED START Conditions

SMBus is a trademark of Intel Corp.

I2C Interface Specification

The MAX9877 features an I2C/SMBus™-compatible, 2­wire serial interface consisting of a serial-data line
(SDA) and a serial-clock line (SCL). SDA and SCL facil­itate communication between the MAX9877 and the
master at clock rates up to 400kHz. Figure 6 shows the
2-wire interface timing diagram. The master generates
SCL and initiates data transfer on the bus. The master
device writes data to the MAX9877 by transmitting the
proper slave address followed by the register address
and then the data word. Each transmit sequence is
framed by a START (S) or REPEATED START (Sr) con­dition and a STOP (P) condition. Each word transmitted
to the MAX9877 is 8 bits long and is followed by an
acknowledge clock pulse. A master reading data from
the MAX9877 transmits the proper slave address fol­lowed by a series of nine SCL pulses. The MAX9877
transmits data on SDA in sync with the master-generat­ed SCL pulses. The master acknowledges receipt of
each byte of data. Each read sequence is framed by a
START (S) or REPEATED START (Sr) condition, a not
acknowledge, and a STOP (P) condition. SDA operates
as both an input and an open-drain output. A pullup
resistor, typically greater than 500Ω, is required on
SDA. SCL operates only as an input. A pullup resistor,

typically greater than 500Ω, is required on SCL if there
are multiple masters on the bus, or if the single master
has an open-drain SCL output. Series resistors in line
with SDA and SCL are optional. Series resistors protect
the digital inputs of the MAX9877 from high voltage
spikes on the bus lines, and minimize crosstalk and
undershoot of the bus signals.

Bit Transfer

One data bit is transferred during each SCL cycle. The
data on SDA must remain stable during the high period
of the SCL pulse. Changes in SDA while SCL is high
are control signals (see the

START and STOP

Conditions

section).

START and STOP Conditions

SDA and SCL idle high when the bus is not in use. A
master initiates communication by issuing a START con­dition. A START condition is a high-to-low transition on
SDA with SCL high. A STOP condition is a low-to-high
transition on SDA while SCL is high (Figure 7). A START
condition from the master signals the beginning of a
transmission to the MAX9877. The master terminates
transmission, and frees the bus, by issuing a STOP con­dition. The bus remains active if a REPEATED START
condition is generated instead of a STOP condition.

SDA

t

t

LOW

SCL

t

HD:STA

START

CONDITION

SU:DAT

t

HIGH

t

R

t

HD:DAT

t

F

t

SU:STA

REPEATED

START CONDITION

t

SU:STA

t

SU:STO

STOP

CONDITION

t

BUF

START

CONDITION

MAX9877

A

0SLAVE ADDRESS REGISTER ADDRESS DATA BYTE

ACKNOWLEDGE FROM MAX9877

R/W

1 BYTE

AUTOINCREMENT INTERNAL

REGISTER ADDRESS POINTER

ACKNOWLEDGE FROM MAX9877

ACKNOWLEDGE FROM MAX9877

B1 B0B3 B2B5 B4B7 B6

S AA

P

Figure 9. Writing One Byte of Data to the MAX9877

1

SCL

START

CONDITION

SDA

289

CLOCK PULSE FOR

ACKNOWLEDGMENT

ACKNOWLEDGE

NOT ACKNOWLEDGE

Figure 8. Acknowledge

Low RF Susceptibility, Mono Audio

Subsystem with DirectDrive Headphone Amplifier

______________________________________________________________________________________ 25

Early STOP Conditions

The MAX9877 recognizes a STOP condition at any
point during data transmission except if the STOP con­dition occurs in the same high pulse as a START condi­tion. For proper operation, do not send a STOP
condition during the same SCL high pulse as the
START condition.

Slave Address

The MAX9877 is preprogrammed with a slave address
of 1001101R/(W). The address is defined as the seven
most significant bits (MSBs) followed by the Read/Write
bit. Setting the Read/Write bit to 1 configures the
MAX9877 for read mode. Setting the Read/Write bit to 0
configures the MAX9877 for write mode. The address is
the first byte of information sent to the MAX9877 after
the START condition.

Acknowledge

The acknowledge bit (ACK) is a clocked 9th bit that the
MAX9877 uses to handshake receipt each byte of data
when in write mode (see Figure 8). The MAX9877 pulls
down SDA during the entire master-generated 9th
clock pulse if the previous byte is successfully
received. Monitoring ACK allows for detection of unsuc­cessful data transfers. An unsuccessful data transfer

occurs if a receiving device is busy or if a system fault
has occurred. In the event of an unsuccessful data
transfer, the bus master may retry communication.

The master pulls down SDA during the ninth clock
cycle to acknowledge receipt of data when the
MAX9877 is in read mode. An acknowledge is sent by
the master after each read byte to allow data transfer to
continue. A not acknowledge is sent when the master
reads the final byte of data from the MAX9877, followed
by a STOP condition.

Write Data Format

A write to the MAX9877 includes transmission of a
START condition, the slave address with the R/W bit set
to 0, one byte of data to configure the internal register
address pointer, one or more bytes of data, and a
STOP condition. Figure 9 illustrates the proper frame
format for writing one byte of data to the MAX9877.
Figure 10 illustrates the frame format for writing n-bytes
of data to the MAX9877.

The slave address with the R/W bit set to 0 indicates
that the master intends to write data to the MAX9877.
The MAX9877 acknowledges receipt of the address
byte during the master-generated 9th SCL pulse.

MAX9877

Low RF Susceptibility, Mono Audio
Subsystem with DirectDrive Headphone Amplifier

26 ______________________________________________________________________________________

Figure 11. Reading One Indexed Byte of Data from the MAX9877

1 BYTE

AUTOINCREMENT INTERNAL

REGISTER ADDRESS POINTER

ACKNOWLEDGE FROM MAX9877

ACKNOWLEDGE FROM MAX9877

B1 B0B3 B2B5 B4B7 B6

A

A0

ACKNOWLEDGE FROM MAX9877

R/W

S

A

1 BYTE

ACKNOWLEDGE FROM MAX9877

B1 B0B3 B2B5 B4B7 B6

P

A

SLAVE ADDRESS

REGISTER ADDRESS

DATA BYTE 1

DATA BYTE n

Figure 10. Writing n-Bytes of Data to the MAX9877

The second byte transmitted from the master config­ures the MAX9877’s internal register address pointer.
The pointer tells the MAX9877 where to write the next
byte of data. An acknowledge pulse is sent by the
MAX9877 upon receipt of the address pointer data.

The third byte sent to the MAX9877 contains the data
that will be written to the chosen register. An acknowl­edge pulse from the MAX9877 signals receipt of the
data byte. The address pointer autoincrements to the
next register address after each received data byte.
This autoincrement feature allows a master to write to
sequential registers within one continuous frame. Figure
10 illustrates how to write to multiple registers with one
frame. The master signals the end of transmission by
issuing a STOP condition.

Register addresses greater than 0x04 are reserved. Do
not write to these addresses.

Read Data Format

Send the slave address with the R/W bit set to 1 to initiate
a read operation. The MAX9877 acknowledges receipt of
its slave address by pulling SDA low during the 9th SCL
clock pulse. A START command followed by a read
command resets the address pointer to register 0x00.
The first byte transmitted from the MAX9877 will be the

contents of register 0x00. Transmitted data is valid on the
rising edge of SCL. The address pointer autoincrements
after each read data byte. This autoincrement feature
allows all registers to be read sequentially within one
continuous frame. A STOP condition can be issued after
any number of read data bytes. If a STOP condition is
issued followed by another read operation, the first data
byte to be read will be from register 0x00.

The address pointer can be preset to a specific register
before a read command is issued. The master presets
the address pointer by first sending the MAX9877‘s
slave address with the R/W bit set to 0 followed by the
register address. A REPEATED START condition is then
sent followed by the slave address with the R/W bit set
to 1. The MAX9877 then transmits the contents of the
specified register. The address pointer autoincrements
after transmitting the first byte. The master acknowl­edges receipt of each read byte during the acknowl­edge clock pulse. The master must acknowledge all
correctly received bytes except the last byte. The final
byte must be followed by a not acknowledge from the
master and then a STOP condition. Figure 11 illustrates
the frame format for reading one byte from the
MAX9877. Figure 12 illustrates the frame format for
reading multiple bytes from the MAX9877.

ACKNOWLEDGE FROM MAX9877

SA

ACKNOWLEDGE FROM MAX9877

0

R/W

ACKNOWLEDGE FROM MAX9877

Sr 1SLAVE ADDRESS REGISTER ADDRESS SLAVE ADDRESS DATA BYTE

NOT ACKNOWLEDGE FROM MASTER

P

AA

R/WREPEATED START

1 BYTE

AUTOINCREMENT INTERNAL

REGISTER ADDRESS POINTER

A

Applications Information

Filterless Class D Operation

Traditional Class D amplifiers require an output filter to
recover the audio signal from the amplifier’s output. The
filters add cost, increase the solution size of the amplifier,
and can decrease efficiency and THD+N performance.
The traditional PWM scheme uses large differential out­put swings (2 x V

DD(P-P)

) and causes large ripple cur­rents. Any parasitic resistance in the filter components
results in a loss of power, lowering the efficiency.

The MAX9877 does not require an output filter. The
device relies on the inherent inductance of the speaker
coil and the natural filtering of both the speaker and the
human ear to recover the audio component of the
square-wave output. Eliminating the output filter results
in a smaller, less costly, more efficient solution.

Because the frequency of the MAX9877 output is well
beyond the bandwidth of most speakers, voice coil
movement due to the square-wave frequency is very
small. Although this movement is small, a speaker not
designed to handle the additional power can be dam­aged. For optimum results, use a speaker with a series
inductance > 10µH. Typical 8Ω speakers exhibit series
inductances in the 20µH to 100µH range.

Component Selection

Optional Ferrite Bead Filter

In applications where speaker leads exceed 20mm,
additional EMI suppression can be achieved by using a
filter constructed from a ferrite bead and a capacitor to
ground. A ferrite bead with low DC resistance, high­frequency (> 1.176MHz) impedance of 100Ω to 600Ω,
and rated for at least 1A should be used. The capacitor
value varies based on the ferrite bead chosen and the
actual speaker lead length. Select a capacitor less than
1nF based on EMI performance.

Input Capacitor

An input capacitor, CIN, in conjunction with the input
impedance of the MAX9877 forms a highpass filter that
removes the DC bias from an incoming signal. The AC-

coupling capacitor allows the amplifier to automatically
bias the signal to an optimum DC level. Assuming zero
source impedance, the -3dB point of the highpass filter
is given by:

Choose C

IN

so that f

-3dB

is well below the lowest fre­quency of interest. Use capacitors whose dielectrics
have low-voltage coefficients, such as tantalum or alu­minum electrolytic. Capacitors with high-voltage coeffi­cients, such as ceramics, may result in increased
distortion at low frequencies.

BIAS Capacitor

BIAS is the output of the internally generated DC bias volt­age. The BIAS bypass capacitor, C

BIAS

, reduces power
supply and other noise sources at the common-mode
bias node. Bypass BIAS with a 1µF capacitor to GND.

Charge-Pump Capacitor Selection

Use capacitors with an ESR less than 100mΩ for optimum
performance. Low-ESR ceramic capacitors minimize the
output resistance of the charge pump. Most surface­mount ceramic capacitors satisfy the ESR requirement.
For best performance over the extended temperature
range, select capacitors with an X7R dielectric.

Flying Capacitor (C1)

The value of the flying capacitor (C1) affects the output
resistance of the charge pump. A C1 value that is too
small degrades the device’s ability to provide sufficient
current drive, which leads to a loss of output voltage.

MAX9877

MAX9877

OUT+

OUT-

Figure 13. Optional Ferrite Bead Filter

ACKNOWLEDGE FROM MAX9877

1 BYTE

AUTOINCREMENT INTERNAL

REGISTER ADDRESS POINTER

ACKNOWLEDGE FROM MAX9877

AA

AP

0

ACKNOWLEDGE FROM MAX9877

R/W

SA

R/W

REPEATED START

Sr 1SLAVE ADDRESS REGISTER ADDRESS SLAVE ADDRESS DATA BYTE

Figure 12. Reading n-Bytes of Indexed Data from the MAX9877

Low RF Susceptibility, Mono Audio

Subsystem with DirectDrive Headphone Amplifier

______________________________________________________________________________________ 27

f

dB

−=3

RC

2π

IN IN

1

Increasing the value of C1 reduces the charge-pump out­put resistance to an extent. Above 1µF, the on-resistance
of the switches and the ESR of C1 and C2 dominate.

Output Holding Capacitor (C2)

The output capacitor value and ESR directly affect the
ripple at VSS. Increasing the value of C2 reduces output
ripple. Likewise, decreasing the ESR of C2 reduces both
ripple and output resistance. Lower capacitance values
can be used in systems with low maximum output power
levels. See the Output Power vs. Load Resistance graph
in the

Typical Operating Characteristics

.

PVDDBulk Capacitor (C3)

In addition to the recommended PVDDbypass capaci­tance, bulk capacitance equal to C3 should be used.
Place the bulk capacitor as close to the device as possible.

Supply Bypassing,

Layout, and Grounding

Proper layout and grounding are essential for optimum
performance. Use wide traces for the power-supply
inputs and amplifier outputs to minimize losses due to
parasitic trace resistance. Wide traces also aid in mov­ing heat away from the package. Proper grounding
improves audio performance, minimizes crosstalk
between channels, and prevents any switching noise
from coupling into the audio signal. Connect PGND and
GND together at a single point on the PCB. Route all
traces that carry switching transients away from GND
and the traces/components in the audio signal path.

Connect PVDDto a 2.7V to 5.25V source. Bypass PV

DD

to the PGND pin with a 1µF ceramic capacitor.
Additional bulk capacitance should be used to prevent
power-supply pumping. Place the bypass capacitors
as close to the MAX9877 as possible.

Connect VDDto PVDD. Bypass VDDto GND with a 1µF
capacitor. Place the bypass capacitors as close to the
MAX9877 as possible.

RF Susceptibility

GSM radios transmit using time-division multiple
access (TDMA) with 217Hz intervals. The result is an
RF signal with strong amplitude modulation at 217Hz
that is easily demodulated by audio amplifiers. Figure
14 shows the susceptibility of the MAX9877 to a trans­mitting GSM radio placed in close proximity. Although
there is measurable noise at 217Hz and its harmonics,
the noise is well below the threshold of hearing using
typical headphones.

In RF applications, improvements to both layout and
component selection decreases the MAX9877’s sus-

ceptibility to RF noise and prevent RF signals from
being demodulated into audible noise. Trace lengths
should be kept below

1

/4the wavelength of the RF fre­quency of interest. Minimizing the trace lengths pre­vents them from functioning as antennas and coupling
RF signals into the MAX9877. The wavelength λ in
meters is given by:

λ = c/f

where c = 3 x 108 m/s, and f = the RF frequency of
interest.

Route audio signals on middle layers of the PCB to
allow ground planes above and below shield them from
RF interference. Ideally the top and bottom layers of the
PCB should primarily be ground planes to create effec­tive shielding.

Additional RF immunity can also be obtained from rely­ing on the self-resonant frequency of capacitors as it
exhibits the frequency response similar to a notch filter.
Depending on the manufacturer, 10pF to 20pF capaci­tors typically exhibit self resonance at RF frequencies.
These capacitors, when placed at the input pins, can
effectively shunt the RF noise at the inputs of the
MAX9877. For these capacitors to be effective, they
must have a low-impedance, low-inductance path to
the ground plane. Do not use microvias to connect to
the ground plane as these vias do not conduct well at
RF frequencies.

MAX9877

Low RF Susceptibility, Mono Audio
Subsystem with DirectDrive Headphone Amplifier

28 ______________________________________________________________________________________

Figure 14. MAX9877 Susceptibility to a GSM Cell Phone Radio

-10

-30

-50

-70

-90

EFFICIENCY (dBμ)

-110

-130

-150
10 100k

RF SUSCEPTIBILITY

THRESHOLD OF HEARING

MAX9877

NOISE FLOOR

10k1k100

FREQUENCY (Hz)

MAX9877 fig14

MAX9877

WLP Applications Information

For the latest application details on WLP construction,
dimensions, tape carrier information, PCB techniques,
bump-pad layout, and recommended reflow tempera­ture profile, as well as the latest information on reliability
testing results, refer to the

Application Note: UCSP—A

Wafer-Level Chip-Scale Package

on Maxim’s website
at www.maxim-ic.com/ucsp. See Figure 15 for the rec­ommended PCB footprint for the MAX9877.

Low RF Susceptibility, Mono Audio

Subsystem with DirectDrive Headphone Amplifier

______________________________________________________________________________________ 29

Figure 15. PCB Footprint Recommendation Diagram

45±5μm

250μm

MAX9877

Low RF Susceptibility, Mono Audio
Subsystem with DirectDrive Headphone Amplifier

Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.

30 __________________

Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600

© 2008 Maxim Integrated Products is a registered trademark of Maxim Integrated Products, Inc.

Typical Application Circuit

Chip Information

PROCESS: BiCMOS

Package Information

For the latest package outline information and land patterns, go
to www.maxim-ic.com/packages

.

PACKAGE TYPE PACKAGE CODE DOCUMENT NO.

20 WLP W202A2+2

21-0059

INPUT A

INPUT B

OPEN-DRAIN GPIO

BASEBAND

RECEIVER

AMPLIFIER

1μF

1μF

C1

9.1Ω

9.1Ω

1μF

1μF

1μF

1μF

RxIN+

RxIN-B4D4

C1N

C1PA4A5

INA2

INA1D1D2

INB2

INB1C1C2

BIAS

SDA

SCL

B2

B3

C3

V

SS

A3

CHARGE

PUMP

INPUT A

0dB/+9dB/+20dB

INPUT B

0dB/+9dB/+20dB

2

I

C

CONTROL

C2
1μF

V

BATT

D3

V

B1

MIXER

AND

MUX

DD

BYPASS

1μF

-75dB TO 0dB

-75dB TO 0dB

-75dB TO 0dB

V

BATT

C3
1μF

PV

DD

C5

MAX9877

0dB

0dB

CLASS D

MODULATOR

+12dB

C4

A1 HPR

A2 HPL

B5D5OUT+

OUT-

GND

PGND