General Description
The MAX9796 combines a high-efficiency Class D, mono
audio power amplifier with a mono DirectDrive™ receiver
amplifier and a stereo DirectDrive headphone amplifier.
Maxim’s 3rd-generation, ultra-low EMI, Class D audio
power amplifiers provide Class AB performance with
Class D efficiency. The MAX9796 delivers 2.3W into a 4Ω
load from a 5V supply and offers efficiencies up to 80%.
Active emissions limiting circuitry and spread-spectrum
modulation greatly reduce EMI, eliminating the need for
output filtering found in traditional Class D devices.
The MAX9796 features a fully differential architecture, a
full-bridged output, and comprehensive click-and-pop
suppression. The device utilizes a flexible, user-defined
mixer architecture that includes an input mixer, volume
control, and output mixer. All controls are done through
an I
2
C interface.
The mono receiver amplifier and stereo headphone
amplifier use Maxim’s patented†DirectDrive architecture,
that produces a ground-referenced output from a single
supply, eliminating the need for large DC-blocking
capacitors, saving cost, space, and component height.
The MAX9796 is available in a 36-bump UCSP™ (3mm
x 3mm) package and is specified over the extended
-40°C to +85°C temperature range.
Applications
Cell Phones
Portable Multimedia Players
Handheld Gaming Consoles
Features
o Unique Spread-Spectrum Modulation and Active
Emissions Limiting Significantly Reduces EMI
o Up to 3 Stereo Inputs
o 2.3W Mono Speaker Output (4Ω, VDD= 5V)
o 50mW Mono Receiver/Stereo Headphone Outputs
(32Ω, VDD= 3.3V)
o High PSRR (68dB at 217Hz)
o 80% Efficiency (V
DD
= 3.3V, RL= 8Ω, P
OUT
=
600mW)
o I
2
C Control—Input Configuration, Volume
Control, Output Mode
o Click-and-Pop Suppression
o Low Total Harmonic Distortion (0.03% at 1kHz)
o Current-Limit and Thermal Protection
o Available in Space-Saving, 36-Bump UCSP
(3mm x 3mm)
MAX9796
2.3W, High-Power Class D Audio Subsystem
with DirectDrive Headphone Amplifiers
________________________________________________________________
Maxim Integrated Products
1
Ordering Information
MAX9796
MIXER/
MUX
GAIN
CONTROL
I2C
INTERFACE
SINGLE SUPPLY 2.7V TO 5.5V
PART
TEMP RANGE
PINPACKAGE
PKG
CODE
MAX9796EBX+T
B36-4
Simplified Block Diagram
MAX9796
C1P CPGND
C1N
CPV
DD
1
A
B
C
D
234
OUT+
SDA
PGND SCL
UCSP
E
F
PV
DD
OUT- PGND OUT+
CPV
SS
HPL
I.C. VBIAS
INC1
PV
DD
V
SS
HPR
56
INC2 OUTRx
INB2 V
DD
PV
DD
GND
OUT- SHDN INA1 INA2 INB1 I.C.
TOP VIEW
(BUMPS ON BOTTOM)
Pin Configuration
19-0866; Rev 0; 7/07
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
UCSP is a trademark of Maxim Integrated Products, Inc.
+
Denotes a lead-free package.
*Four center bumps depopulated.
†
U.S. Patent # 7,061,327
-40°C to +85°C 36 UCSP-36*
MAX9796
2.3W, High-Power Class D Audio Subsystem
with DirectDrive Headphone Amplifiers
2 _______________________________________________________________________________________
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS
(VDD= PVDD= CPVDD= 3.3V, GND = PGND = CPGND = 0V, SHDN = VDD, I2C settings (INA gain = +20dB, INB gain = INC gain =
0dB, volume setting = 0dB, mono path gain = 0dB, SHDN = 1, SSM = 1). Speaker load resistors (R
LSP
) are terminated between
OUT+ and OUT-, headphone load resistors are terminated to GND, unless otherwise noted. C1 = C2 = C3 = 1µF. T
A
= T
MIN
to T
MAX
,
unless otherwise noted. Typical values are at T
A
= +25°C.) (Note 1)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
VDDto GND ...........................................................................+6V
PV
DD
to PGND.......................................................................+6V
CPV
DD
to CPGND..................................................................+6V
CPV
SS
to CPGND .....................................................-6V to +0.3V
V
SS
to CPGND..........................................................-6V to +0.3V
C1N .......................................(CPV
SS
- 0.3V) to (CPGND + 0.3V)
C1P.......................................(CPGND - 0.3V) to (CPV
DD
+ 0.3V)
HPL, HPR to GND...................(CPV
SS
- 0.3V) to (CPVDD+ 0.3V)
GND to PGND and CPGND................................................±0.3V
V
DD
to PVDDand CPVDD....................................................±0.3V
SDA, SCL to GND.....................................................-0.3V to +6V
All other pins to GND..................................-0.3V to (V
DD
+ 0.3V)
Continuous Current In/Out of PV
DD
, PGND, CPVDD, CPGND,
OUT_ _, HPR, and HPL................................................±800mA
Continuous Input Current CPV
SS
....................................+260mA
Continuous Input Current (all other pins) .........................±20mA
Duration of Short Circuit Between
OUT+ and OUT-......................................................Continuous
Duration of HP_ OUT_ Short Circuit to
GND or PV
DD
..........................................................Continuous
Continuous Power Dissipation (T
A
= +70°C)
36-Bump (3mm x 3mm) UCSP Multilayer Board
(derate 17.0mW/°C above +70°C)...........................1360.5mW
Junction Temperature......................................................+150°C
Operating Temperature Range ...........................-40°C to +85°C
Storage Temperature Range .............................-65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
GENERAL
Supply Voltage Range
Quiescent Current I
Mute Current I
Shutdown Current I
Turn-On Time t
Input Resistance R
Common-Mode Rejection Ratio CMRR TA = +25°C, VIN = ±500mV 45 50 dB
Input DC Bias Voltage V
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
PV
CPV
,
V
DD
,
DD
DD
DD
MUTE
SHDN
ON
IN
BIAS
Inferred from PSRR test 2.7 5.5 V
Output mode 1, 6, 11 (Rx mode) 6.3 10
Output mode 4, 9, 14 (HP mode) 8 12.6
Output mode 2, 7, 12 (SP mode) 11.8 17.5
Output mode 3, 8, 13 (SP and HP modes) 15.1 21
Current in mute 4.7 10 mA
Hard shutdown SHDN = GND 0.1 10
Soft shutdown
Time from shutdown or power-on to full
operation
B and C pair inputs, TA = +25°C,
VOL = max
A pair inputs, TA = +25°C, +20dB 3.5 5.5 8.0 kΩ
IN_ inputs 1.12 1.25 1.38 V
See the I
section
2
C Interface
8.5 15
30 ms
17.5 28 41.0 kΩ
mA
µA
MAX9796
2.3W, High-Power Class D Audio Subsystem
with DirectDrive Headphone Amplifiers
_______________________________________________________________________________________ 3
ELECTRICAL CHARACTERISTICS (continued)
(VDD= PVDD= CPVDD= 3.3V, GND = PGND = CPGND = 0V, SHDN = VDD, I2C settings (INA gain = +20dB, INB gain = INC gain =
0dB, volume setting = 0dB, mono path gain = 0dB, SHDN = 1, SSM = 1). Speaker load resistors (R
LSP
) are terminated between
OUT+ and OUT-, headphone load resistors are terminated to GND, unless otherwise noted. C1 = C2 = C3 = 1µF. T
A
= T
MIN
to T
MAX
,
unless otherwise noted. Typical values are at T
A
= +25°C.) (Note 1)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
SPEAKER AMPLIFIER
Output Offset Voltage V
Click-and-Pop Level K
Power-Supply Rejection Ratio
(Note 3)
Output Power (Note 4) P
Current Limit 1.6 A
Total Harmonic Distortion Plus
Noise (Note 4)
PSRR T
THD+N f = 1kHz
OS
CP
OUT
TA = +25°C ±5.5 ±23.5
T
MIN
Peak voltage, TA =
+25°C, A-weighted,
32 samples per
second (Notes 3, 4)
A
THD+N = 1%,
T
A
≤ TA ≤ T
= +25°C
= +25°C
MAX
Into shutdown -62
Out of shutdown -60
Into mute -63
Out of mute -62
VDD = 2.7V to 5.5V 48 70
f = 217Hz, 100mV
ripple
f = 1kHz, 100mV
ripple
f = 20kHz, 100mV
ripple
RL = 4Ω, VDD = 5V,
f = 1kHz
RL = 8Ω, VDD = 3.3V,
f = 1kHz
= 8Ω, VDD = 5V,
R
L
f = 1kHz
RL = 8Ω,
P
= 800mW
OUT
R
= 4Ω,
L
P
= 830mW
OUT
P-P
P-P
P-P
68
60
50
2300
600
1300
0.03
0.04
±40
mV
dB
dB
mW
%
Signal-to-Noise Ratio SNR
Output Frequency f
Efficiency η
Gain A
OSC
= 1.8V
V
OUT
= 8Ω (Note 3)
R
L
Fixed-frequency modulation (SSM = 0) 1100
Spread-spectrum modulation (SSM = 1)
P
OUT
driven, L = 68µH in series with 8Ω load
V
RMS
= 470mW, f = 1kHz both channel
BW = 20Hz to 20kHz 81
,
A-weighted 84
1100
±30
80 %
12 dB
dB
kHz
MAX9796
2.3W, High-Power Class D Audio Subsystem
with DirectDrive Headphone Amplifiers
4 _______________________________________________________________________________________
ELECTRICAL CHARACTERISTICS (continued)
(VDD= PVDD= CPVDD= 3.3V, GND = PGND = CPGND = 0V, SHDN = VDD, I2C settings (INA gain = +20dB, INB gain = INC gain =
0dB, volume setting = 0dB, mono path gain = 0dB, SHDN = 1, SSM = 1). Speaker load resistors (R
LSP
) are terminated between
OUT+ and OUT-, headphone load resistors are terminated to GND, unless otherwise noted. C1 = C2 = C3 = 1µF. T
A
= T
MIN
to T
MAX
,
unless otherwise noted. Typical values are at T
A
= +25°C.) (Note 1)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
RECEIVER AMPLIFIER
Output Offset Voltage V
Click-and-Pop Level K
Power-Supply Rejection Ratio
(Note 3)
Output Power P
Gain A
Total Harmonic Distortion Plus
Noise
Signal-to-Noise Ratio SNR
Slew Rate SR 0.3 V/µs
Capacitive Drive C
HEADPHONE AMPLIFIERS
Output Offset Voltage V
Click-and-Pop Level K
ESD Protection HP_
Power-Supply Rejection Ratio
(Note 3)
THD+N
OS
CP
PSRR T
OUT
V
L
OS
CP
PSRR T
TA = +25°C ±1.8 mV
Peak voltage, TA =
+25°C, A-weighted,
32 samples per
second (Notes 3, 5)
= +25°C
A
TA = +25°C,
THD+N = 1%
RL = 16Ω (V
= 32Ω (V
R
L
R
= 16Ω, V
L
800mV
TA = +25°C ±1.8 mV
Peak voltage, TA =
+25°C, A-weighted,
32 samples per
second (Notes 2, 5)
= +25°C
A
RMS
OUT
OUT
OUT
(Note 3)
Into shutdown -62
Into mute -67
Out of shutdown -63
Out of mute -66
VDD = 2.7V to 5.5V 58 80
f = 217Hz, 100mV
ripple
f = 1kHz, 100mV
ripple
f = 20kHz, 100mV
ripple
RL = 16Ω 60
R
= 32Ω 50
L
= 800mV
= 800mV
=
, f = 1kHz) 0.03
RMS
, f = 1kHz) 0.024
RMS
BW = 20Hz to 20kHz 87
A-weighted 89
Into shutdown -61
Into mute -65
Out of shutdown -60
Out of mute -64
Contact ±4
Air ±8
VDD = 2.7V to 5.5V 58 80
f = 217Hz, 100mV
ripple
f = 1kHz, 100mV
ripple
f = 20kHz, 100mV
ripple
P-P
P-P
P-P
P-P
P-P
P-P
80
70
62
300 pF
80
70
62
3dB
dB
dB
mW
%
dB
dB
kV
dB
MAX9796
2.3W, High-Power Class D Audio Subsystem
with DirectDrive Headphone Amplifiers
_______________________________________________________________________________________ 5
ELECTRICAL CHARACTERISTICS (continued)
(VDD= PVDD= CPVDD= 3.3V, GND = PGND = CPGND = 0V, SHDN = VDD, I2C settings (INA gain = +20dB, INB gain = INC gain =
0dB, volume setting = 0dB, mono path gain = 0dB, SHDN = 1, SSM = 1). Speaker load resistors (R
LSP
) are terminated between
OUT+ and OUT-, headphone load resistors are terminated to GND, unless otherwise noted. C1 = C2 = C3 = 1µF. T
A
= T
MIN
to T
MAX
,
unless otherwise noted. Typical values are at T
A
= +25°C.) (Note 1)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
Output Power P
Current Limit 170 mA
Gain A
Channel-to-Channel Gain
Tracking
Total Harmonic Distortion Plus
Noise
Signal-to-Noise Ratio SNR
Slew Rate SR 0.3 V/µs
Capacitive Drive C
Crosstalk
VOLUME CONTROL
Volume Control
Mono Gain All outputs
Input Pair A Control
Mute Attenuation (Minimum
Volume)
DIGITAL INPUTS (SHDN, SDA, SCL)
Input-Voltage High V
Input-Voltage Low V
Input Hysteresis (SDA, SCL) V
SDA, SCL Input Capacitance C
Input Leakage Current I
Pulse Width of Spike Suppressed t
THD+N
OUT
HYS
IN
SP
TA = +25°C,
THD+N = 1%
V
T
RL = 16Ω (V
R
R
800mV
L
L to R, R to L, f = 10kHz, R
V
IN+6dB = 0
(minimum gain
setting)
IN+6dB = 1
(maximum gain
setting)
INA+20dB = 0 (minimum gain setting) Set by IN+6dB
INA+20dB = 1 (maximum gain setting) 20
V
IH
IL
IN
RL = 16Ω 60
= 32Ω 50
R
L
= +25°C ±1 %
A
= 800mV
OUT
= 32Ω (V
L
= 16Ω, V
L
RMS A-weighted 93
= 160mV
OUT
= 1V
IN
RMS
OUT
OUT
RMS
= 800mV
=
, f = 1kHz) 0.03
RMS
, f = 1kHz) 0.024
RMS
BW = 20Hz to 20kHz 92
= 16Ω,
L
HP gain (max) 3
SP gain (max) 12
HP gain (min) -72
SP gain (min) -63
HP gain (max) 9
SP gain (max) 18
HP gain (min) -61
SP gain (min) -57
Mono + 6dB = 0 0
Mono + 6dB = 1 6
1.4 V
+3 dB
300 pF
75 dB
80 dB
200 mV
10 pF
50 ns
0.4 V
1.0 µA
mW
%
dB
dB
dB
dB
MAX9796
2.3W, High-Power Class D Audio Subsystem
with DirectDrive Headphone Amplifiers
6 _______________________________________________________________________________________
ELECTRICAL CHARACTERISTICS (continued)
(VDD= PVDD= CPVDD= 3.3V, GND = PGND = CPGND = 0V, SHDN = VDD, I2C settings (INA gain = +20dB, INB gain = INC gain =
0dB, volume setting = 0dB, mono path gain = 0dB, SHDN = 1, SSM = 1). Speaker load resistors (R
LSP
) are terminated between
OUT+ and OUT-, headphone load resistors are terminated to GND, unless otherwise noted. C1 = C2 = C3 = 1µF. T
A
= T
MIN
to T
MAX
,
unless otherwise noted. Typical values are at T
A
= +25°C.) (Note 1)
Note 1: All devices are 100% production tested at room temperature. All temperature limits are guaranteed by design.
Note 2: Measured at headphone outputs.
Note 3: Amplifier inputs AC-coupled to GND.
Note 4: Testing performed with a resistive load in series with an inductor to simulate an actual speaker load. For R
L
= 8Ω L = 68µH,
R
L
= 4Ω L = 47µH.
Note 5: Testing performed at room temperature with an 8Ω resistive load in series with 68µH inductive load connected across BTL
outputs for speaker amplifier. Testing performed with 32Ω resistive load connected between OUT_ and GND for headphone
amplifier. Testing performed with a 32Ω resistive load connected between OUTRx and GND for mono receiver amplifier.
Mode transitions are controlled by SHDN pin.
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
DIGITAL OUTPUTS (SDA Open Drain)
Output Low Voltage SDA V
Output Fall Time SDA t
I2C INTERFACE TIMING
Serial-Clock Frequency f
Bus Free Time Between STOP
and START Conditions
START Condition Hold t
STOP Condition Setup Time t
Clock Low Period t
Clock High Period t
Data Setup Time t
Data Hold Time t
Maximum Receive SCL/SDA Rise
Time
Maximum Receive SCL/SDA Fall
Time
Setup Time for STOP Condition t
Capacitive Load for Each Bus
Line
HD:STA
SU:STA
SU:DAT
HD:DAT
SU:STO
OL
OF
SCL
t
BUF
LOW
HIGH
t
R
t
F
C
b
I
= 6mA 0.4 V
SINK
V
to V
H(MIN)
to 400pF, I
bus capacitance = 10pF
L(MAX)
= 3mA
SINK
DC 400 kHz
1.3 µs
0.6 µs
0.6 µs
1.3 µs
0.6 µs
100 ns
0.6 µs
250 ns
0 900 ns
300 ns
300 ns
400 pF
MAX9796
2.3W, High-Power Class D Audio Subsystem
with DirectDrive Headphone Amplifiers
_______________________________________________________________________________________
7
Typical Operating Characteristics
(VDD= PVDD= CPVDD= 3.3V, GND = PGND = CPGND = 0V, SHDN = VDD, I2C settings (INA gain = +20dB, INB gain = INC gain =
0dB, volume setting = 0dB, mono path gain = 0dB, SHDN = 1, SSM = 1). C1 = C2 = C3 = 1µF. Speaker load resistors (R
LSP
) are ter-
minated between OUT+ and OUT-, headphone load resistors are terminated to GND, unless otherwise noted.)
TOTAL HARMONIC DISTORTION PLUS
NOISE vs. FREQUENCY
1
P
= 1W
OUT
0.1
THD+N (%)
0.01
0.001
10 100k
P
= 1.6W
OUT
FREQUENCY (Hz)
TOTAL HARMONIC DISTORTION PLUS
NOISE vs. FREQUENCY
1
VDD = 3.3V
Ω
= 8
R
L
P
= 200mW
0.1
THD+N (%)
0.01
OUT
P
OUT
= 450mW
VDD = 5V
R
10k1k100
TOTAL HARMONIC DISTORTION PLUS
NOISE vs. FREQUENCY
1
VDD = 5V
Ω
= 8
R
MAX9796 toc01
Ω
= 4
L
L
P
= 500mW
0.1
THD+N (%)
0.01
0.001
OUT
P
= 750mW
OUT
10 100k
FREQUENCY (Hz)
MAX9796 toc02
10k1k100
TOTAL HARMONIC DISTORTION PLUS
NOISE vs. FREQUENCY
1
VDD = 5V
Ω
= 8
R
0.1
THD+N (%)
0.01
L
P
OUT
= 500mW
MAX9796 toc05
SSM
FFM
MAX9796 toc04
TOTAL HARMONIC DISTORTION PLUS
NOISE vs. FREQUENCY
1
VDD = 3.3V
Ω
= 4
R
L
P
= 350mW
0.1
THD+N (%)
0.01
0.001
OUT
P
= 800mW
OUT
10 100k
FREQUENCY (Hz)
TOTAL HARMONIC DISTORTION PLUS
NOISE vs. OUTPUT POWER
100
VDD = 5V
Ω
= 4
R
L
10
1
10kHz
THD+N (%)
0.1
0.01
20Hz
10k1k100
1kHz
MAX9796 toc03
MAX9796 toc06
0.001
10 100k
FREQUENCY (Hz)
10k1k100
TOTAL HARMONIC DISTORTION PLUS
NOISE vs. OUTPUT POWER
100
VDD = 5V
Ω
= 8
R
L
10
1
10kHz
THD+N (%)
0.1
20Hz
0.01
0.001
01.8
OUTPUT POWER (W)
1kHz
1.51.20.90.60.3
MAX9796 toc07
0.001
10 100k
TOTAL HARMONIC DISTORTION PLUS
NOISE vs. OUTPUT POWER
100
VDD = 3.3V
Ω
= 4
R
L
10
1
10kHz
THD+N (%)
0.1
0.01
0.001
0 1.2
FREQUENCY (Hz)
1kHz
OUTPUT POWER (W)
10k1k100
20Hz
0.001
03.0
OUTPUT POWER (W)
2.41.81.20.6
TOTAL HARMONIC DISTORTION PLUS
NOISE vs. OUTPUT POWER
100
VDD = 3.3V
Ω
= 8
R
MAX9796 toc08
1.00.80.60.40.2
L
10
1
10kHz
THD+N (%)
0.1
0.01
0.001
00.8
OUTPUT POWER (W)
20Hz
1kHz
0.60.40.2
MAX9796 toc09
MAX9796
2.3W, High-Power Class D Audio Subsystem
with DirectDrive Headphone Amplifiers
8 _______________________________________________________________________________________
Typical Operating Characteristics (continued)
(VDD= PVDD= CPVDD= 3.3V, GND = PGND = CPGND = 0V, SHDN = VDD, I2C settings (INA gain = +20dB, INB gain = INC gain =
0dB, volume setting = 0dB, mono path gain = 0dB, SHDN = 1, SSM = 1). C1 = C2 = C3 = 1µF. Speaker load resistors (R
LSP
) are ter-
minated between OUT+ and OUT-, headphone load resistors are terminated to GND, unless otherwise noted.)
100
90
RL = 8
80
70
60
50
40
EFFICIENCY (%)
30
20
10
0
03
2.0
RL = 8
1.8
f = 1kHz
1.6
1.4
1.2
1.0
0.8
OUTPUT POWER (W)
0.6
0.4
0.2
0
2.5 5.5
EFFICIENCY
vs. OUTPUT POWER
Ω
Ω
RL = 4
OUTPUT POWER (W)
OUTPUT POWER
vs. SUPPLY VOLTAGE
Ω
THD+N = 10%
THD+N = 1%
SUPPLY VOLTAGE (V)
21
VDD = 5V
f = 1kHz
5.04.54.03.53.0
MAX9796 toc10
EFFICIENCY (%)
MAX9796 toc13
OUTPUT POWER (W)
EFFICIENCY
vs. OUTPUT POWER
100
90
80
70
60
50
40
30
20
10
0
Ω
RL = 8
Ω
RL = 4
0 2.0
OUTPUT POWER (W)
1.51.00.5
OUTPUT POWER
VDD = 3.3V
f = 1kHz
MAX9796 toc11
OUTPUT POWER (W)
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
2.5 5.5
OUTPUT POWER
vs. SUPPLY VOLTAGE
Ω
RL = 4
f = 1kHz
THD+N = 10%
SUPPLY VOLTAGE (V)
OUTPUT POWER
vs. LOAD
MAX9796 toc14
OUTPUT POWER (W)
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
THD+N = 1%
0
1 100
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
THD+N = 1%
0
1100
THD+N = 10%
10
LOAD (Ω)
VDD = 5V
f = 1kHz
THD+N = 1%
vs. LOAD
THD+N = 10%
10
LOAD (Ω)
VDD = 3.3V
f = 1kHz
MAX9796 toc12
5.04.53.0 3.5 4.0
MAX9796 toc15
POWER-SUPPLY REJECTION RATIO
0
vs. FREQUENCY
VDD = 3.3V
-10
-20
-30
-40
-50
-60
PSRR (dB)
-70
-80
-90
-100
-110
-120
= 100mV
V
RIPPLE
RL = 8
10 100k
Ω
P-P
FREQUENCY (Hz)
INBAND OUTPUT SPECTRUM
20
FIXED-FREQUENCY MODULATION MODE
Ω
= 8
R
0
MAX9796 toc16
OUTPUT MAGNITUDE (dBV)
10k1k100
L
V
= 5V
DD
-20
f = 1kHz
UNWEIGHTED
-40
-60
-80
-100
-120
-140
= -60dBV
V
OUT
020k
FREQUENCY (Hz)
15k10k5k
MAX9796 toc17
-20
-40
-60
-80
OUTPUT MAGNITUDE (dBV)
-100
-120
-140
INBAND OUTPUT SPECTRUM
20
FIXED-FREQUENCY MODULATION MODE
0
Ω
= 8
R
L
V
= 5V
DD
f = 1kHz
A-WEIGHTED
= -60dBV
V
OUT
020k
FREQUENCY (Hz)
MAX9796 toc18
15k10k5k
MAX9796
2.3W, High-Power Class D Audio Subsystem
with DirectDrive Headphone Amplifiers
_______________________________________________________________________________________
9
Typical Operating Characteristics (continued)
(VDD= PVDD= CPVDD= 3.3V, GND = PGND = CPGND = 0V, SHDN = VDD, I2C settings (INA gain = +20dB, INB gain = INC gain =
0dB, volume setting = 0dB, mono path gain = 0dB, SHDN = 1, SSM = 1). C1 = C2 = C3 = 1µF. Speaker load resistors (R
LSP
) are ter-
minated between OUT+ and OUT-, headphone load resistors are terminated to GND, unless otherwise noted.)
WIDEBAND OUTPUT SPECTRUM
INBAND OUTPUT SPECTRUM
20
SPREAD-SPECTRUM MODULATION MODE
0
-20
-40
-60
-80
OUTPUT MAGNITUDE (dBV)
-100
-120
-140
Ω
= 8
R
L
= 5V
V
DD
f = 1kHz
UNWEIGHTED
= -60dBV
V
OUT
020k
FREQUENCY (Hz)
15k10k5k
MAX9796 toc19
-20
-40
-60
-80
OUTPUT MAGNITUDE (dBV)
-100
-120
-140
INBAND OUTPUT SPECTRUM
20
SPREAD-SPECTRUM MODULATION MODE
0
Ω
= 8
R
L
= 5V
V
DD
f = 1kHz
A-WEIGHTED
= -60dBV
V
OUT
020k
FREQUENCY (Hz)
15k10k5k
20
MAX9796 toc20
-20
-40
-60
-80
OUTPUT MAGNITUDE (dBV)
-100
-120
-140
FIXED-FREQUENCY MODE
0
VDD = 5V
Ω
= 8
R
L
INPUTS AC GROUNDED
0.1 1000
FREQUENCY (MHz)
WIDEBAND OUTPUT SPECTRUM
20
0
-20
-40
-60
-80
OUTPUT MAGNITUDE (dBV)
-100
VDD = 5V
Ω
= 8
R
-120
L
INPUTS AC GROUNDED
-140
0.1 1000
FREQUENCY (MHz)
SUPPLY CURRENT
vs. SUPPLY VOLTAGE
16
INPUTS AC GROUNDED
14
12
SUPPLY CURRENT (mA)
10
SPREAD-SPECTRUM MODE
TURN-ON RESPONSE
MAX9796 toc22
100101
10ms/div
SHUTDOWN CURRENT
MAX9796 toc23
SCL
2V/div
SPEAKER
OUTPUT
200mA/div
TOTAL HARMONIC DISTORTION PLUS NOISE
vs. SUPPLY VOLTAGE
MAX9796 toc25
0.25
0.20
0.15
0.10
SHUTDOWN CURRENT (µA)
0.05
INPUTS AC GROUNDED
MAX9796 toc26
1
0.1
THD+N (%)
0.01
TURN-OFF RESPONSE
vs. FREQUENCY
V
= 5V
DD
= 32Ω
R
L
P
= 20mW
OUT
P
OUT
10ms/div
= 40mW
100101
MAX9796 toc24
MAX9796 toc21
SCL
2V/div
SPEAKER
OUTPUT
200mA/div
MAX9796 toc27
8
2.5 5.5
SUPPLY VOLTAGE (V)
5.04.54.03.53.0
8
2.5 5.5
SUPPLY VOLTAGE (V)
5.04.54.03.53.0
0.001
10 100k
FREQUENCY (Hz)
10k1k100
MAX9796
2.3W, High-Power Class D Audio Subsystem
with DirectDrive Headphone Amplifiers
10 ______________________________________________________________________________________
Typical Operating Characteristics (continued)
(VDD= PVDD= CPVDD= 3.3V, GND = PGND = CPGND = 0V, SHDN = VDD, I2C settings (INA gain = +20dB, INB gain = INC gain =
0dB, volume setting = 0dB, mono path gain = 0dB, SHDN = 1, SSM = 1). C1 = C2 = C3 = 1µF. Speaker load resistors (R
LSP
) are ter-
minated between OUT+ and OUT-, headphone load resistors are terminated to GND, unless otherwise noted.)
TOTAL HARMONIC DISTORTION PLUS NOISE
vs. FREQUENCY
1
V
= 3.3V
DD
= 16Ω
R
L
0.1
P
= 40mW
OUT
THD+N (%)
0.01
P
= 20mW
OUT
0.001
10 100k
FREQUENCY (Hz)
MAX9796 toc28
10k1k100
TOTAL HARMONIC DISTORTION PLUS NOISE
vs. FREQUENCY
1
V
= 3.3V
DD
= 32Ω
R
L
0.1
P
= 40mW
OUT
THD+N (%)
0.01
P
= 10mW
OUT
0.001
10 100k
FREQUENCY (Hz)
10k1k100
MAX9796 toc29
TOTAL HARMONIC DISTORTION PLUS NOISE
vs. OUTPUT POWER
100
VDD = 5V
= 32Ω
R
L
10
f = 1kHz
1
THD+N (%)
0.1
0.01
0.001
f = 20Hz
080
OUTPUT POWER (mW)
f = 10kHz
604020
MAX9796 toc30
TOTAL HARMONIC DISTORTION PLUS NOISE
vs. OUTPUT POWER
100
VDD = 3.3V
= 16Ω
R
L
10
1
THD+N (%)
0.1
0.01
0.001
0 306090120
f = 1kHz
f = 10kHz
f = 20Hz
OUTPUT POWER (mW)
POWER DISSIPATION
vs. OUTPUT POWER
500
450
400
350
300
250
200
150
POWER DISSIPATION (mW)
100
50
0
0 120
TOTAL OUTPUT POWER (mW)
V
= 5V
DD
f = 1kHz
= 32Ω
R
L
P
OUT
= P
+ P
OUTR
8040
OUTL
TOTAL HARMONIC DISTORTION PLUS NOISE
100
MAX9796 toc31
10
1
THD+N (%)
0.1
0.01
0.001
500
450
MAX9796 toc34
400
350
300
250
200
150
POWER DISSIPATION (mW)
100
50
0
TOTAL HARMONIC DISTORTION PLUS NOISE
vs. OUTPUT POWER
VDD = 3.3V
= 32Ω
R
L
f = 1kHz
f = 10kHz
f = 20Hz
080
OUTPUT POWER (mW)
604020
100
MAX9796 toc32
THD+N (%)
0.01
0.001
POWER DISSIPATION
vs. OUTPUT POWER
RL = 16Ω
RL = 32Ω
V
= 3.3V
DD
f = 1kHz
= P
P
OUT
OUTR
0 160
TOTAL OUTPUT POWER (mW)
1208040
MAX9796 toc35
OUTPUT POWER (mW)
+ P
OUTL
vs. COMMON-MODE VOLTAGE
VDD = 3.3V
= 1kHz
f
IN
= 30mW
P
10
1
0.1
0 0.5 1.0 1.5 2.0 2.5
OUT
GAIN = +3dB
= 32Ω
R
L
COMMON-MODE VOLTAGE (V)
OUTPUT POWER
vs. SUPPLY VOLTAGE
65
60
55
50
45
40
35
30
2.7
THD+N = 10%
THD+N = 1%
SUPPLY VOLTAGE (V)
RL = 32Ω
f = 1kHz
5.24.74.23.73.2
MAX9796 toc33
MAX9796 toc36
MAX9796
2.3W, High-Power Class D Audio Subsystem
with DirectDrive Headphone Amplifiers
______________________________________________________________________________________
11
Typical Operating Characteristics (continued)
(VDD= PVDD= CPVDD= 3.3V, GND = PGND = CPGND = 0V, SHDN = VDD, I2C settings (INA gain = +20dB, INB gain = INC gain =
0dB, volume setting = 0dB, mono path gain = 0dB, SHDN = 1, SSM = 1). C1 = C2 = C3 = 1µF. Speaker load resistors (R
LSP
) are ter-
minated between OUT+ and OUT-, headphone load resistors are terminated to GND, unless otherwise noted.)
OUTPUT POWER
vs. LOAD
200
180
160
140
120
100
80
OUTPUT POWER (mW)
60
40
20
0
10 1000
THD+N = 10%
THD+N = 1%
100
LOAD (Ω)
V
DD
f = 1kHz
= 5V
200
180
MAX9796 toc37
160
140
120
100
OUTPUT POWER (mW)
OUTPUT POWER
vs. LOAD
V
= 3.3V
DD
f = 1kHz
80
60
40
20
0
10 1000
THD+N = 10%
THD+N = 1%
100
LOAD (Ω)
MAX9796 toc38
OUTPUT POWER vs. LOAD RESISTANCE
AND CHARGE-PUMP CAPACITOR SIZE
100
VDD = 3.3V
= 1kHz
f
THD+N = 1%
80
C1 = C2 = 2.2µF
60
40
OUTPUT POWER (mW)
20
C1 = C2 = 0.68µF
0
10 100 1000
C1 = C2 = 1µF
LOAD RESISTANCE (Ω)
POWER-SUPPLY REJECTION RATIO
0
VDD = 3.3V
-10
= 100mV
V
IN
-20
RL = 32Ω
-30
-40
-50
-60
-70
-80
POWER-SUPPLY REJECTION RATIO (dB)
-90
-100
10 100 1k 10k 100k
P-P
HPR
FREQUENCY (Hz)
CROSSTALK vs. FREQUENCY
0
OUT_ = 1V
vs. FREQUENCY
RL = 32Ω
P-P
RIGHT TO LEFT
LEFT TO RIGHT
FREQUENCY (Hz)
-10
-20
-30
-40
-50
-60
-70
CROSSTALK (dB)
-80
-90
-100
-110
-120
10 100 1k 10k 100k
MAX9796 toc40
OUTPUT MAGNITUDE (dBV)
HPL
MAX9796 toc42
CROSSTALK (dB)
OUTPUT FREQUENCY SPECTRUM
20
V
= 3.3V
DD
0
= 1kHz
f
= 32Ω
R
L
-20
-40
-60
-80
-100
-120
-140
020k
FREQUENCY (Hz)
15k10k5k
CROSSTALK vs. INPUT AMPLITUDE
0
fIN = 1kHz
-10
= 32Ω
R
L
-20
GAIN = +3dB
-30
-40
-50
-60
-70
-80
-90
-100
-110
-120
0 0.4 0.8 1.2
RIGHT TO LEFT
LEFT TO RIGHT
INPUT AMPLITUDE (V
RMS
)
MAX9796 toc41
MAX9796 toc43
MAX9796 toc39
MAX9796
2.3W, High-Power Class D Audio Subsystem
with DirectDrive Headphone Amplifiers
12 ______________________________________________________________________________________
Pin Description
BUMP NAME FUNCTION
A1 CPV
A2 C1P Charge-Pump Flying Capacitor Positive Terminal
A3 CPGND Charge-Pump GND
A4 C1N Charge-Pump Flying Capacitor Negative Terminal
A5 CPV
A6 HPL Left Headphone Output
B1, F1, F5 PV
B2, E6 I.C.
B3 VBIAS Common-Mode Bias
B4 INC1 Input C1. Left input or positive input (see Table 5a).
B5 V
B6 HPR Right Headphone Output
C1, F4 OUT+ Positive Speaker Output
C2 SDA Serial Data Input. Connect a 1kΩ pullup resistor from SDA to VDD.
C5 INC2 Input C2. Right input or negative input (see Table 5a).
C6 OUTRx Mono Receiver Output
D1, F3 PGND Power Ground
D2 SCL Serial Clock Input. Connect a 1kΩ pullup resistor from SCL to VDD.
D5 INB2 Input B2. Right input or negative input (see Table 5a).
D6 V
E1, F2 OUT- Negative Speaker Output
E2 SHDN Active-Low Hardware Shutdown
E3 INA1 Input A1. Left input or positive input (see Table 5a).
E4 INA2 Input A2. Right input or negative input (see Table 5a).
E5 INB1 Input B1. Left input or positive input (see Table 5a).
F6 GND Analog Ground
DD
SS
DD
Charge-Pump Power Supply
DD
Charge-Pump Output. Connect to VSS.
SS
Class D Power Supply
Internal Connection. Leave unconnected. This pin is internally connected to the signal path. Do not
connect together or to any other pin.
Headphone Amplifier Negative Power Supply. Connect to CPVSS.
Analog Power Supply
MAX9796
2.3W, High-Power Class D Audio Subsystem
with DirectDrive Headphone Amplifiers
______________________________________________________________________________________ 13
Typical Application Circuit
V
DD
C2
1µF
CPVSSV
SS
A5 B5
A4
C1N
A3
1µF
1µF
1µF
1µF
1µF
1µF
1µF
CPGND
C1P
CPV
INA1
INA2
INB1
INB2
INC1
INC2
VBIAS
CHARGE
A2
A1
DD
E3
E4
E5
D5
B4
C5
B3
PUMP
INPUT A: 0dB,
6dB, OR 20dB
INPUT B: 0dB
OR 6dB
INPUT C: 0dB
OR 6dB
INPUT
MIXER
C1
1µF
V
DD
C3
1µF
D6
RIGHT
VOLUME
LEFT
VOLUME
MONO
VOLUME
V
1µF
DD
OUTPUT
MIXER
V
DD
PV
F1, B1, F5
DD
DirectDrive
3dB
3dB
3dB
12dB
CLASS D
AMPLIFIER
1µF0.1µF
A6
HPL
HPR
B6
OUTRx
C6
C1, F4
OUT+
E1, F2
OUT-
C2
SDA
SCL
SHDN
D2
E2
I2C CONTROL
F6
GND
D1 F3
PGNDPGND
MAX9796
MAX9796
2.3W, High-Power Class D Audio Subsystem
with DirectDrive Headphone Amplifiers
14 ______________________________________________________________________________________
Detailed Description
The MAX9796 ultra-low-EMI, filterless, Class D audio
power amplifier features several improvements to
switch-mode amplifier technology. The MAX9796 features active emissions limiting circuitry to reduce EMI.
Zero dead-time technology maintains state-of-the-art
efficiency and THD+N performance by allowing the
output FETs to switch simultaneously without crossconduction. A unique filterless modulation scheme and
a spread-spectrum modulation create a compact, flexible, low-noise, efficient audio power amplifier while
occupying minimal board space. The differential input
architecture reduces common-mode noise pickup with
or without the use of input-coupling capacitors. The
MAX9796 can also be configured as a single-ended
input amplifier without performance degradation.
The MAX9796 features three fully differential input pairs
(INA_, INB_, INC_) that can be configured as stereo
single-ended or mono differential inputs. I2C provides
control for input configuration, volume level, and mixer
configuration. DirectDrive allows the headphone and
mono receiver amplifiers to output ground-referenced
signals from a single supply, eliminating the need for
large DC-blocking capacitors. Comprehensive clickand-pop suppression minimizes audible transients during the turn-on and turn-off of amplifiers.
Class D Speaker Amplifier
Comparators monitor the audio inputs and compare the
complementary input voltages to a sawtooth waveform.
The comparators trip when the input magnitude of the
sawtooth exceeds their corresponding input voltage.
The active emissions limiting circuitry slightly reduces
the turn-on rate of the output H-bridge by slew-rate limiting the comparator output pulse. Both comparators
reset at a fixed time after the rising edge of the second
comparator trip point, generating a minimum-width
pulse (t
ON(MIN)
, 100ns typ) at the output of the second
comparator (Figure 1). As the input voltage increases
or decreases, the duration of the pulse at one output
increases while the other output pulse duration remains
the same. This causes the net voltage across the
speaker (V
OUT+
- V
OUT-
) to change. The minimumwidth pulse helps the device to achieve high levels of
linearity.
Figure 1. Outputs with an Input Signal Applied
t
SW
V
IN-
V
IN+
OUT-
OUT+
V
- V
OUT+
OUT-
t
ON(MIN)
Operating Modes
Fixed-Frequency Modulation
The MAX9796 features a fixed-frequency modulation
mode with a 1.1MHz switching frequency, set through
the I
2
C interface (Table 2). In fixed-frequency modulation mode, the frequency spectrum of the Class D output consists of the fundamental switching frequency
and its associated harmonics (see the Wideband
Output Spectrum Fixed-Frequency Mode graph in the
Typical Operating Characteristics
).
Spread-Spectrum Modulation
The MAX9796 features a unique, patented spreadspectrum modulation that flattens the wideband spectral components. Proprietary techniques ensure that the
cycle-to-cycle variation of the switching period does
not degrade audio reproduction or efficiency (see the
Typical Operating Characteristics
). Select the spread-
spectrum modulation mode through the I
2
C interface
(Table 2). In spread-spectrum modulation mode, the
switching frequency varies randomly by ±30kHz
around the center frequency (1.16MHz). The modulation scheme remains the same, but the period of the
sawtooth waveform changes from cycle to cycle
(Figure 2). Instead of a large amount of spectral energy
present at multiples of the switching frequency, the
energy is now spread over a bandwidth that increases
with frequency. Above a few megahertz, the wideband
spectrum looks like white noise for EMI purposes (see
Figure 3).
MAX9796
2.3W, High-Power Class D Audio Subsystem
with DirectDrive Headphone Amplifiers
______________________________________________________________________________________ 15
Figure 2. Output with an Input Signal Applied (Spread-Spectrum Modulation Mode)
t
SW
V
IN-
V
IN+
t
SW
t
SW
t
SW
OUT-
OUT+
V
- V
OUT+
OUT-
t
ON(MIN)
MAX9796
2.3W, High-Power Class D Audio Subsystem
with DirectDrive Headphone Amplifiers
16 ______________________________________________________________________________________
Filterless Modulation/Common-Mode Idle
The MAX9796 uses Maxim’s unique, patented modulation scheme that eliminates the LC filter required by traditional Class D amplifiers, improving efficiency, reducing
component count, conserving board space and system
cost. Conventional Class D amplifiers output a 50% dutycycle square wave when no signal is present. With no filter, the square wave appears across the load as a DC
voltage, resulting in finite load current, increasing power
consumption, especially when idling. When no signal is
present at the input of the MAX9796, the outputs switch
as shown in Figure 4. Because the MAX9796 drives the
speaker differentially, the two outputs cancel each other,
resulting in no net idle mode voltage across the speaker,
minimizing power consumption.
DirectDrive
Traditional single-supply headphone amplifiers have
outputs biased at a nominal DC voltage (typically half
the supply) for maximum dynamic range. Large coupling capacitors are needed to block this DC bias from
the headphone. Without these capacitors, a significant
amount of DC current flows to the headphone, resulting
in unnecessary power dissipation and possible damage to both headphone and headphone amplifier.
Maxim’s patented DirectDrive architecture uses a
charge pump to create an internal negative supply voltage. This allows the headphone outputs of the
MAX9796 to be biased at GND, almost doubling
dynamic range while operating from a single supply.
With no DC component, there is no need for the large
DC-blocking capacitors. Instead of two large (220µF,
typ) tantalum capacitors, the MAX9796 charge pump
requires two small ceramic capacitors, conserving
board space, reducing cost, and improving the frequency response of the headphone amplifier. See the
Output Power vs. Load Resistance and Charge-Pump
Capacitor Size graph in the
Typical Operating
Characteristics
for details of the possible capacitor
sizes. There is a low DC voltage on the driver outputs
Figure 3. EMI with 76mm of Speaker Cable
Figure 4. Outputs with No Input Signal
40
35
30
25
EN55022B LIMIT
20
AMPLITUDE (dBµV/m)
15
10
5
30 60 80 100 120 140 160 180 200 220 240 260 280 300
VIN = 0V
OUT-
OUT+
V
- V
OUT-
= 0V
OUT+
FREQUENCY (MHz)
due to amplifier offset. However, the offset of the
MAX9796 is typically 1.4mV, which, when combined
with a 32Ω load, results in less than 44nA of DC current
flow to the headphones.
In addition to the cost and size disadvantages of the
DC-blocking capacitors required by conventional headphone amplifiers, these capacitors limit the amplifier’s
low-frequency response and can distort the audio signal. Previous attempts at eliminating the output-coupling capacitors involved biasing the headphone return
(sleeve) to the DC bias voltage of the headphone
amplifiers. This method raises some issues:
1) The sleeve is typically grounded to the chassis.
Using the midrail biasing approach, the sleeve must
be isolated from system ground, complicating product design.
2) During an ESD strike, the driver’s ESD structures are
the only path to system ground. Thus, the amplifier
must be able to withstand the full ESD strike.
3) When using the headphone jack as a lineout to other
equipment, the bias voltage on the sleeve may conflict with the ground potential from other equipment,
resulting in possible damage to the amplifiers.
Charge Pump
The MAX9796 features a low-noise charge pump. The
switching frequency of the charge pump is half the
switching frequency of the Class D amplifier, regardless of the operating mode. The nominal switching frequency is well beyond the audio range, and thus does
not interfere with the audio signals, resulting in an SNR
of 93dB. Although not typically required, additional
high-frequency noise attenuation can be achieved by
increasing the size of C2 (see the
Typical Application
Circuit
). The charge pump is active in both speaker
and headphone modes.
Signal Path
The audio inputs of the MAX9796 (INA, INB, and INC)
are preamplified and then mixed by the input mixer to
create three internal signals: left (L), right (R), and mono
(M). Tables 5a and 5b show how the inputs are mixed to
create L, R, and M. These signals are then independently volume adjusted by the L, R, and M volume control
and routed to the output mixer. The output mixer mixes
the internal L, R, and M signals to create a variety of
audio mixes that are output to the headphone, speaker,
and the mono receiver amplifiers. Figure 6 shows the
signal path that the audio signals take.
Signal amplification takes place in three stages. In the
first stage, the inputs (INA, INB, and INC) are preamplified. The amount by which each input is amplified is
determined by the bits INA+20dB (B4 in the Input Mode
Control Register) and IN+6dB (B3 in the Global Control
Register). After preamplification, they are mixed in the
input mixer to create the internal signals L, R and M.
In the second stage of amplification, the internal L, R,
and M signals are independently volume adjusted.
Finally, each output amplifier has its own internal gain.
The speaker, headphone, and mono receiver amplifiers
have fixed gains of 12dB, 3dB and 3dB, respectively.
MAX9796
2.3W, High-Power Class D Audio Subsystem
with DirectDrive Headphone Amplifiers
______________________________________________________________________________________ 17
Figure 5. Traditional Amplifier Output vs. MAX9796 DirectDrive
Output
V
DD
V
OUT
CONVENTIONAL DRIVER-BIASING SCHEME
V
OUT
DirectDrive BIASING SCHEME
VDD / 2
GND
+V
DD
GND
-V
DD
MAX9796
Current-Limit and Thermal Protection
The MAX9796 features current limiting and thermal protection to protect the device from short circuits and
overcurrent conditions. The headphone amplifier pulses in the event of an overcurrent condition with a pulse
every 100µs as long as the condition is present. Should
the current still be high, the above cycle is repeated.
The speaker amplifier current-limit protection clamps
the output current without shutting down the output.
This can result in a distorted output. Current is limited
to 1.6A in the speaker amplifiers and 170mA in the
headphone and mono receiver amplifiers.
The MAX9796 has thermal protection that disables the
device at +150°C until the temperate decreases to
+120°C.
Click-and-Pop Suppression
In conventional single-supply headphone amplifiers,
the output-coupling capacitor is a major contributor of
audible clicks and pops. Upon startup, the amplifier
charges the coupling capacitor to its bias voltage, typically half the supply. Likewise, during shutdown, the
capacitor is discharged to GND. This results in a DC
shift across the capacitor, which in turn, appears as an
audible transient at the speaker. Since the MAX9796
headphone amplifier does not require output-coupling
capacitors, this problem does not arise.
In most applications, the output of the preamplifier driving the MAX9796 has a DC bias of typically half the
supply. During startup, the input-coupling capacitor is
charged to the preamplifier’s DC bias voltage, resulting
in a DC shift across the capacitor and an audible clickand-pop. An internal delay of 30ms eliminates the clickand-pop caused by the input filter.
Shutdown
The MAX9796 features a 0.1µA hard shutdown mode
that reduces power consumption to extend battery life
and a soft shutdown where current consumption is typically 8.5µA. Hard shutdown is controlled by connecting
SHDN to GND, disabling the amplifiers, bias circuitry,
charge pump, and I2C. In shutdown, the headphone
amplifier output impedance is 1.4kΩ and the speaker
output impedance is 300kΩ. Similarly, the MAX9796
enters soft shutdown when the SHDN bit = 0 (see Table
2). The I2C interface is active and the contents of the
command register are not affected when in soft shutdown. This allows the master to write to the MAX9796
while in shutdown. The I2C interface is completely disabled in hardware shutdown. When the MAX9796 is reenabled the default settings are applied (see Table 3).
2.3W, High-Power Class D Audio Subsystem
with DirectDrive Headphone Amplifiers
18 ______________________________________________________________________________________
Figure 6. Signal Path
PREAMPLIFIER
INPUT
INPUT A:
0dB, 6dB, 20dB
INPUT B AND C:
0dB, 6dB
INPUT
MIXER
MONO
-75dB TO 0dB
RVOL
-75dB TO 0dB
LVOL
OUTPUT
MIXER
-75dB TO 0dB0dB OR 6dB
MVOLMONO+6dB
12dB
SPEAKER
3dB
HEADPHONE
3dB
RECEIVER
MAX9796
2.3W, High-Power Class D Audio Subsystem
with DirectDrive Headphone Amplifiers
______________________________________________________________________________________ 19
I2C Interface
The MAX9796 features an I2C 2-wire serial interface
consisting of a serial-data line (SDA) and a serial-clock
line (SCL). SDA and SCL facilitate communication
between the MAX9796 and the master at clock rates up
to 400kHz. Figure 7 shows the 2-wire interface timing
diagram. The MAX9796 is a receive-only slave device
relying on the master to generate the SCL signal. The
master, typically a microcontroller, generates SCL and
initiates data transfer on the bus. The MAX9796 cannot
write to the SDA bus except to acknowledge the receipt
of data from the master. The MAX9796 does not
acknowledge a read command from the master.
A master device communicates to the MAX9796 by
transmitting the proper address followed by the data
word. Each transmit sequence is framed by a START (S)
or REPEATED START (Sr) condition and a STOP (P) condition. Each word transmitted over the bus is 8 bits long
and is always followed by an acknowledge clock pulse.
The MAX9796 SDA line operates as both an input and
an open-drain output. A pullup resistor, greater than
500Ω, is required on the SDA bus. The MAX9796 SCL
line operates as an input only. A pullup resistor, greater
than 500Ω, is required on SCL if there are multiple masters on the bus, or if the master in a single-master system has an open-drain SCL output. Series resistors in
line with SDA and SCL are optional. Series resistors
protect the digital inputs of the MAX9796 from highvoltage spikes on the bus lines, and minimize crosstalk
and undershoot of the bus signals.
Bit Transfer
One data bit is transferred during each SCL cycle. The
data on SDA must remain stable during the high period
of the SCL pulse. Changes in SDA while SCL is high
are control signals (see the
START and STOP
Conditions
section). SDA and SCL idle high when the
I2C bus is not busy.
START and STOP Conditions
A master device initiates communication by issuing a
START condition. A START condition is a high-to-low
transition on SDA with SCL high. A STOP condition is a
low-to-high transition on SDA while SCL is high (Figure
8). A START condition from the master signals the
beginning of a transmission to the MAX9796. The master terminates transmission and frees the bus by issuing a STOP condition. The bus remains active if a
REPEATED START condition is generated instead of a
STOP condition.
Figure 7. 2-Wire Serial-Interface Timing Diagram
Figure 8. START, STOP, and REPEATED START Conditions
SDA
t
SU, DAT
t
LOW
SCL
t
t
HD, STA
START
CONDITION
HIGH
t
R
t
F
t
HD, DAT
t
SU, STA
REPEATED
START
CONDITION
t
HD, STA
t
BUF
t
SP
t
SU, STO
STOP
CONDITION
START
CONDITION
SSrP
SCL
SDA
MAX9796
Early STOP Conditions
The MAX9796 recognizes a STOP condition at any point
during data transmission except if the STOP condition
occurs in the same high pulse as a START condition.
Slave Address
The MAX9796 is available with one preset slave
address (see Table 1). The address is defined as the
seven most significant bits (MSBs) followed by the
read/write (R/W) bit. The address is the first byte of
information sent to the MAX9796 after the START condition. The MAX9796 is a slave device only capable of
being written to. The R/W bit should be a zero when
configuring the MAX9796.
Acknowledge
The acknowledge bit (ACK) is a clocked 9thbit that the
MAX9796 uses to handshake receipt of each byte of
data (see Figure 9). The MAX9796 pulls down SDA during the master-generated 9
th
clock pulse. Monitoring
ACK allows for detection of unsuccessful data transfers.
An unsuccessful data transfer occurs if a receiving
device is busy or if a system fault has occurred. In the
event of an unsuccessful data transfer, the bus master
may reattempt communications.
Write Data Format
A write to the MAX9796 includes transmission of a
START condition, the slave address with the R/W bit set
to 0 (Table 1), one byte of data to configure the
Command Register, and a STOP condition. Figure 10
illustrates the proper format for one frame.
The MAX9796 only accepts write data, but it acknowledges the receipt of the address byte with the R/W bit
set high. The MAX9796 does not write to the SDA bus
in the event that the R/W bit is set high. Subsequently,
the master reads all 1’s from the MAX9796. Always set
the R/W bit to zero to avoid this situation.
Programming the MAX9796
The MAX9796 is programmed through six control registers. Each register is addressed by the three MSBs
(B5–B7) followed by five configure bits (B0–B4) as
shown in Table 2. Correct programming of the MAX9796
requires writing to all six control registers. Upon poweron, their default settings are as listed in Table 3.
2.3W, High-Power Class D Audio Subsystem
with DirectDrive Headphone Amplifiers
20 ______________________________________________________________________________________
Figure 9. Acknowledge
Figure 10. Write Data Format Example
Table 1. MAX9796 Address Map
Table 2. Control Registers
A6 A5 A4 A3 A2 A1 A0 R/W
10011010
SLAVE ADDRESS
START
CONDITION
SCL
SDA
1
289
NOT ACKNOWLEDGE
CLOCK PULSE FOR
ACKNOWLEDGMENT
ACKNOWLEDGE
COMMAND BYTE IS STORED ON
RECEIPT OF STOP CONDITION
ACKNOWLEDGE FROM MAX9796
S
SLAVE ADDRESS COMMAND BYTE
R/W
B7 B6
0
ACK
B3 B2
B4
B5
ACKNOWLEDGE
FROM MAX9796
B1 B0
ACK
FUNCTION
Input Mode Control 0 0 0 INA+20dB INMODE (Tables 5a and 5b)
Mono Volume Control 0 0 1 MVOL (Table 7)
Left Volume Control 0 1 0 LVOL (Table 7)
Right Volume Control 0 1 1 RVOL (Table 7)
Output Mode Control 1 0 0 MONO+6dB OUTMODE (Table 9)
Global Control Register 1 0 1 SHDN IN+6dB MUTE SSM MONO
B7 B6 B5 B4 B3 B2 B1 B0
COMMAND DATA
P
Input Mode Control
The MAX9796 has three flexible inputs that can be configured as single-ended stereo inputs or differential
mono inputs. All input signals are summed into three
unique signals, Left (L), Right (R), and Mono (M), which
are routed to the output amplifiers. The bit B4 allows
the option of boosting low-level signals on INA. B4 can
be set as follows:
1 = Input A’s gain +20dB for low-level signals such as
FM receivers.
0 = Input A’s gain is either 0dB or +6dB as set by
IN+6dB (bit B3 of the Control Register).
Tables 5a and 5b show how the inputs–INA, INB, and
INC–are mixed to create the internal signals left (L),
right (R), and mono (M).
MAX9796
2.3W, High-Power Class D Audio Subsystem
with DirectDrive Headphone Amplifiers
______________________________________________________________________________________ 21
Table 3. Power-On Reset Conditions
Table 4. Input Mode Control Register
Table 5a. Input Mode
COMMAND DATA DESCRIPTION
Input Mode (000) 10000 Input A gain = +20dB; input A, B, and C singled-ended stereo inputs
Mono Volume (001) 11111 Maximum volume
Left Volume (010) 11111 Maximum volume
Right Volume (011) 11111 Maximum volume
Output Mode (100) 01000 Mode 8: stereo headphone, mono speaker
Global Control Register (101) 00011 Powered-off, input B/C gain = 0dB, MUTE off, SSM on, MONO on
B7 B6 B5 B4 B3 B2 B1 B0
Input Mode Control 0 0 0 INA+20dB INMODE (Tables 5a and 5b )
PROGRAMMING MODE INPUT CONFIGURATION
INMODE
B3 B2 B1 B0
0000LRLRLR
0001 L R L R M+ M-
0010 L R M+ M- L R
0 0 1 1 L R M+ M- M+ M-
0 1 0 0 L R R+ R- L+ L-
0 1 0 1 L R L+ L- R+ R-
0110 M+ M- L R L R
0 1 1 1 M+ M- L R M+ M-
1 0 0 0 M+ M- M+ M- L R
1 0 0 1 M+ M- M+ M- M+ M-
1 0 1 0 M+ M- R+ R- L+ L-
1 0 1 1 M+ M- L+ L- R+ R-
INA1 INA2 INB1 INB2 INC1 INC2
MAX9796
Mono/Left/Right Volume Control
The MAX9796 has separate volume control for each of
the internal signals: left (L), right (R), and mono (M). The
final gain of each signal is determined by the way the
following bits are set: MVOL, LVOL, RVOL, INA+20dB,
IN+6dB, and MONO+6dB. Table 7 shows how to configure the L, R, and M amplifiers for specific gains.
2.3W, High-Power Class D Audio Subsystem
with DirectDrive Headphone Amplifiers
22 ______________________________________________________________________________________
Table 5b. Internal Signals L, R, and M
Table 6. Mono/Left/Right Volume Control Registers
Table 7. Volume Control Settings
PROGRAMMING MODE INTERNAL SIGNALS LEFT (L), RIGHT (R), AND MONO (M)
INMODE
B3 B2 B1 B0
0 0 0 0 INA1 + INB1 + INC1 INA2 + INB2 + INC2 —
0 0 0 1 INA1 + INB1 INA2 + INB2 INC1 - INC2
0 0 1 0 INA1 + INC1 INA2 + INC2 INB1 - INB2
0 0 1 1 INA1 INA2
0 1 0 0 INA1 + (INC1 - INC2) INA2 + (INB1 - INB2) —
0 1 0 1 INA1 + (INB1 - INB2) INA2 + (INC1 - INC2) —
0 1 1 0 INB1 + INC2 INB2 + INC2 INA1 - INA2
0 1 1 1 INB1 INB2
1 0 0 0 INC1 INC2
1001 — —
1 0 1 0 INC1 - INC2 INB1 - INB2 INA1 - INA2
1 0 1 1 INB1 - INB2 INC1 - INC2 INA1 - INA2
LRM
(INB1 - INB2) + (INC1 -
(INA1 - INA2) + (INC1 -
(INA1 - INA2) + (INB1 -
(INA1 - INA2) + (INB1 -
INC2)
INC2)
INB2)
INB2)
B7 B6 B5 B4 B3 B2 B1 B0
Mono Volume Control 0 0 1 MVOL
Left Volume Control 0 1 0 LVOL
Right Volume Control 0 1 1 RVOL
MVOL/LVOL/RVOL
B4 B3 B2 B1 B0
00000 Mute
00001 -75
00010 -71
00011 -67
00100 -63
00101 -59
00110 -55
00111 -51
GAIN (dB)
B4 B3 B2 B1 B0
01000 -47
01001 -44
01010 -41
01011 -38
01100 -35
01101 -32
01110 -29
01111 -26
MVOL/LVOL/RVOL
GAIN (dB)
Output Mode Control
MONO+6dB in the Output Mode Control register allows
an extra 6dB of gain on the internal mono signal:
1 = Additional 6dB of gain is applied to the internal
Mono (M) signal path.
0 = No additional gain is applied to the Internal Mono
(M) signal path.
The MAX9796 has four output amplifiers: a mono
receiver amplifier, a stereo DirectDrive headphone
amplifier, and one mono Class D amplifier.
MAX9796
2.3W, High-Power Class D Audio Subsystem
with DirectDrive Headphone Amplifiers
______________________________________________________________________________________ 23
Table 8. Output Mode Control Register
Table 9. Output Modes
Table 7. Volume Control Settings (continued)
Table 9 shows how each of the three internal signals,
left (L), right (R), and mono (M), are mixed and routed
to the various outputs.
— = Amplifier off, R = Right signal
L = Left signal, M = Mono signal
MVOL/LVOL/RVOL
B4 B3 B2 B1 B0
10000 -23
10001 -21
10010 -19
10011 -17
10100 -15
10101 -13
10110 -11
10111 -9
GAIN (dB)
B4 B3 B2 B1 B0
11000 -7
11001 -6
11010 -5
11011 -4
11100 -3
11101 -2
11110 -1
11111 0
MVOL/LVOL/RVOL
B7 B6 B5 B4 B3 B2 B1 B0
Output Mode Control 1 0 0 Mono+6dB OUTMODE (Table 9)
GAIN (dB)
MODE
0 0000 — — — —
1 0001 M — — —
2 0010 — — — M
3 0011 — M M M
4 0100 — M M —
5 0101 — — — —
6 0110 L + R — — —
7 0 1 1 1 — — — L + R
8 1 0 0 0 — L R L + R
9 1001 — L R —
10 1010 — — — —
11 1 0 1 1 M + L + R — — —
12 1 1 0 0 — — — L+R+M
13 1 1 0 1 — L + M R + M L+R+M
14 1 1 1 0 — L + M R + M —
15 1 1 1 1 MUTE MUTE MUTE MUTE
B3 B2 B1 B0
OUTMODE
RECEIVER LEFT HP RIGHT HP SPK
Applications Information
Class D Filterless Operation
Traditional Class D amplifiers require an output filter to
recover the audio signal from the amplifier’s PWM output. The filters add cost, increase the solution size of
the amplifier, and can decrease efficiency. The traditional PWM scheme uses large differential output
swings (2 x V
DD(P-P)
) and causes large ripple currents.
Any parasitic resistance in the filter components results
in a loss of power, lowering the efficiency.
The MAX9796 does not require an output filter. The
device relies on the inherent inductance of the speaker
coil and the natural filtering of both the speaker and the
human ear to recover the audio component of the
square-wave output. Eliminating the output filter results
in a smaller, less costly, more efficient solution.
Because the switching frequency of the MAX9796
speaker output is well beyond the bandwidth of most
speakers, voice coil movement due to the square-wave
frequency is very small. Although this movement is
small, a speaker not designed to handle the additional
power may be damaged. For optimum results, use a
speaker with a series inductance >10µH. Typical 8Ω
speakers, for portable audio applications, exhibit series
inductances in the range of 20µH to 100µH.
Input Amplifier
Differential Input
The MAX9796 features a programmable differential
input structure, making it compatible with many
CODECs, and offering improved noise immunity over a
single-ended input amplifier. In devices such as cellular phones, high-frequency signals from the RF transmitter can be picked up by the amplifier’s input traces.
The signals appear at the amplifier’s inputs as common-mode noise. A differential input amplifier amplifies
the difference of the two inputs and any signal common
to both is cancelled.
Global Control Register
The Global Control Register is used for global configurations, those affecting all inputs and outputs. The bits
in the Control Register affect the inputs and outputs as
shown in Table 11.
Table 10. Global Control Register
Table 11. Global Control Register Configurations
MAX9796
2.3W, High-Power Class D Audio Subsystem
with DirectDrive Headphone Amplifiers
24 ______________________________________________________________________________________
B7 B6 B5 B4 B3 B2 B1 B0
Global Control Register 1 0 1 SHDN IN+6dB MUTE SSM MONO
BIT NAME FUNCTION
B4 SHDN
B3 IN+6dB
B2 MUTE
B1 SSM
B0 MONO
1 = Normal operation.
0 = Low-power shutdown mode. I
1 = All input signals are boosted by 6dB.
0 = All input signals are passed unamplified.
This bit does not affect INA if the INA+20dB bit (B4 of the Input Mode Control Register) is set to 1, in
which case INA is boosted by 20dB.
1 = Mute all outputs.
0 = All outputs are active.
1 = Spread-spectrum Class D modulation.
0 = Fixed-frequency Class D modulation.
1 = Speaker outputs L+R in modes 7, 8, 12, and 13 (see Table 9).
0 = Speaker outputs L in modes 7, 8, 12, and 13 (see Table 9).
2
C settings are saved.
Single-Ended Input
The MAX9796 can be configured as a single-ended
input amplifier by appropriately configuring the Input
Control Register (see Tables 5a and 5b).
DC-Coupled Input
The input amplifier can accept DC-coupled inputs that
are biased to the amplifier’s bias voltage. DC-coupling
eliminates the input-coupling capacitors; reducing component count to potentially six external components (see
the
Typical Application Circuit
). However, the highpass
filtering effect of the capacitors is lost, allowing low-frequency signals to feed through to the load.
Unused Inputs
Connect any unused input directly to V
BIAS
. This saves
input capacitors on unused inputs and provides the
highest noise immunity on the input.
Component Selection
Input Filter
An input capacitor (CIN) in conjunction with the input
impedance of the MAX9796 forms a highpass filter that
removes the DC bias from the incoming signal. The ACcoupling capacitor allows the amplifier to automatically
bias the signal to an optimum DC level. Assuming zero
source impedance, the -3dB point of the highpass filter
is given by:
Choose CINso that f
-3dB
is well below the lowest frequency of interest. Use capacitors whose dielectrics
have low-voltage coefficients, such as tantalum or aluminum electrolytic. Capacitors with high-voltage coefficients, such as ceramics, may result in increased
distortion at low frequencies.
Other considerations when designing the input filter
include the constraints of the overall system and the
actual frequency band of interest. Although high-fidelity
audio calls for a flat-gain response between 20Hz and
20kHz, portable voice-reproduction devices, such as
cell phones and two-way radios, need only concentrate
on the frequency range of the spoken human voice
(typically 300Hz to 3.5kHz). In addition, speakers used
in portable devices typically have a poor response
below 300Hz. Taking these two factors into consideration, the input filter may not need to be designed for a
20Hz to 20kHz response, saving both board space and
cost due to the use of smaller capacitors.
Class D Output Filter
The MAX9796 does not require a Class D output filter.
The device passes EN55022B emissions standards
with 152mm of unshielded speaker cables. However,
output filtering can be used if a design is failing radiated emissions due to board layout or cable length, or
the circuit is near EMI-sensitive devices. Use a ferrite
bead filter when radiated frequencies above 10MHz
are of concern. Use an LC filter when radiated frequencies below 10MHz are of concern, or when long leads
(>152mm) connect the amplifier to the speaker. Figure
11 shows optional speaker amplifier output filters.
External Component Selection
BIAS Capacitor
V
BIAS
is the output of the internally generated DC bias
voltage. The V
BIAS
bypass capacitor, C
VBIAS
improves
PSRR and THD+N by reducing power supply and other
noise sources at the common-mode bias node, and
also generates the clickless/popless, startup/shutdown
DC bias waveforms for the speaker amplifiers. Bypass
V
BIAS
with a 1µF capacitor to GND.
MAX9796
2.3W, High-Power Class D Audio Subsystem
with DirectDrive Headphone Amplifiers
______________________________________________________________________________________ 25
Figure 11. Speaker Amplifier Output Filter
1
=
RC
2π
IN IN
f
−
dB
3
22Ω
0.1µF
OUT_+
OUT_-
33µH
0.47µF
33µH
0.1µF
22Ω
0.033µF
0.033µF
Chip Information
PROCESS: BiCMOS
MAX9796
Charge-Pump Capacitor Selection
Use capacitors with an ESR less than 100mΩ for optimum performance. Low-ESR ceramic capacitors minimize the output resistance of the charge pump. Most
surface-mount ceramic capacitors satisfy the ESR
requirement. For best performance over the extended
temperature range, select capacitors with an X7R dielectric or better. Table 12 lists suggested manufacturers.
Flying Capacitor (C1)
The value of the flying capacitor (C1) affects the output
resistance of the charge pump. A C1 value that is too
small degrades the device’s ability to provide sufficient
current drive, which leads to a loss of output voltage.
Increasing the value of C1 reduces the charge-pump output resistance to an extent. Above 1µF, the on-resistance
of the switches and the ESR of C1 and C2 dominate.
Output Capacitor (C2)
The output capacitor value and ESR directly affect the
ripple at CPV
SS
. Increasing the value of C2 reduces
output ripple. Likewise, decreasing the ESR of C2
reduces both ripple and output resistance. Lower
capacitance values can be used in systems with low
maximum output power levels. See the Output Power
vs. Load Resistance and Charge-Pump Capacitor Size
graph in the
Typical Operating Characteristics
.
CPVDDBypass Capacitor (C3)
The CPVDDbypass capacitor (C3) lowers the output
impedance of the power supply and reduces the
impact of the MAX9796’s charge-pump switching transients. Bypass CPVDDwith C3 to PGND and place it
physically close to the CPV
DD
and PGND. Use a value
for C3 that is equal to C1.
Supply Bypassing, Layout, and Grounding
Proper layout and grounding are essential for optimum
performance. Use large traces for the power-supply
inputs and amplifier outputs to minimize losses due to
parasitic trace resistance. Large traces also aid in moving heat away from the package. Proper grounding
improves audio performance, minimizes crosstalk
between channels, and prevents any switching noise
from coupling into the audio signal. Connect PGND and
GND together at a single point on the PCB. Route all
traces that carry switching transients away from GND
and the traces/components in the audio signal path.
Connect all of the power-supply inputs (CPV
DD
, VDD,
and PV
DD
) together. Bypass CPVDDwith a 1µF capacitor to CPGND. Bypass VDDwith a 1µF capacitor to
GND. Bypass PV
DD
with a 1µF capacitor in parallel with
a 0.1µF capacitor to PGND. Place the bypass capacitors as close as possible to the MAX9796. Place a bulk
capacitor between PVDDand PGND, if needed.
Use large, low-resistance output traces. Current drawn
from the outputs increase as load impedance decreases. High output trace resistance decreases the power
delivered to the load. Large output, supply, and GND
traces allow more heat to move from the MAX9796 to the
PCB, decreasing the thermal impedance of the circuit.
UCSP Applications Information
For the latest application details on UCSP construction,
dimensions, tape carrier information, PCB techniques,
bump-pad layout, and recommended reflow temperature profile, as well as the latest information of reliability
testing results, refer to Application Note: UCSP—A
Wafer-Level Chip-Scale Package available on Maxim’s
website at www.maxim-ic.com/ucsp.
UCSP Thermal Consideration
When operating at maximum output power, the UCSP
thermal dissipation can become a limiting factor. The
UCSP package does not dissipate heat as efficiently as
packages with a thermal pad. As a result, in some
applications, the thermal performance of the package
may limit performance.
2.3W, High-Power Class D Audio Subsystem
with DirectDrive Headphone Amplifiers
26 ______________________________________________________________________________________
Table 12. Suggested Capacitor Manufacturers
SUPPLIER PHONE FAX WEBSITE
Taiyo Yuden 800-348-2496 847-925-0899 www.t-yuden.com
TDK 847-803-6100 847-390-4405 www.component.tdk.com
MAX9796
2.3W, High-Power Class D Audio Subsystem
with DirectDrive Headphone Amplifiers
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________
27
© 2007 Maxim Integrated Products is a registered trademark of Maxim Integrated Products, Inc.
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information
go to www.maxim-ic.com/packages
.)
36L,UCSP.EPS
PACKAGE OUTLINE, 6x6 UCSP
1
21-0082
K
1
Loading...