Rainbow Electronics MAX9768 User Manual

General Description

The MAX9768 mono 10W Class D speaker amplifier
provides high-quality, efficient audio power with an inte­grated volume control function.

The MAX9768 features a 64-step dual-mode (analog or
digitally programmable) volume control and mute func­tion. The audio amplifier operates from a 4.5V to 14V
single supply and can deliver up to 10W into an 8Ω
speaker with a 14V supply.

A selectable spread-spectrum mode reduces EMI-radiat­ed emissions, allowing the device to pass EMC testing
with ferrite bead filters and cable lengths up to 1m. The
MAX9768 can be synchronized to an external clock,
allowing synchronization of multiple Class D amplifiers.

The MAX9768 features high 77dB PSRR, low 0.08%
THD+N, and SNR up to 97dB. Robust short-circuit and
thermal-overload protection prevent device damage
during a fault condition. The MAX9768 is available in a
24-pin thin QFN-EP (4mm x 4mm x 0.8mm) package
and is specified over the extended -40°C to +85°C tem­perature range.

Applications

Features

♦ 10W Output (8Ω, PVDD= 14V, THD+N = 10%)

♦ Patented Spread-Spectrum Modulation

♦ Meets EN55022B EMC with Ferrite Bead Filters

♦ Amplifier Operation from 4.5V to 14V Supply

♦ 64-Step Integrated Volume Control (I

2

C or Analog)

♦ Low 0.08% THD+N (R

L

= 8Ω, P

OUT

= 6W)

♦ High 77dB PSRR

♦ Two t

ON

Times Offered
MAX9768—220ms
MAX9768B—15ms

♦ Low-Power Shutdown Mode (0.5µA)

♦ Short-Circuit and Thermal-Overload Protection

MAX9768

10W Mono Class D Speaker

Amplifier with Volume Control

________________________________________________________________

Maxim Integrated Products

1

19-0854; Rev 0; 9/07

For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.

EVALUATION KIT

AVAILABLE

Pin Configuration located at end of data sheet.

Ordering Information

Note: All devices are specified over the -40°C to +85°C oper­ating temperature range.

+

Denotes lead-free package.

*

EP = Exposed pad.

Simplified Block Diagram

Notebook Computers

Flat-Panel Displays

Multimedia Monitors

GPS Navigation
Systems

Security/Personal
Mobile Radio

PART PIN-PACKAGE tON (ms)

MAX9768ETG+ 24 TQFN-EP* 220 T2444+4

MAX9768BETG+ 24 TQFN-EP* 15 T2444+4

PKG

CODE

3.3V 4.5V TO 14V

SPEAKER

AUDIO

INPUT

SHDN

MUTE

ANALOG OR

2

C VOLUME

I

CONTROL

MAX9768

FILTERLESS
CLASS D
SPEAKER
OUTPUT

MAX9768 EMI WITH FERRITE BEAD FILTERS

40

35

30

25

20

15

AMPLITUDE (dBμV/m)

10

5

0

= 12V, 1m CABLE, 8Ω LOAD)

(V

DD

OVER 20dB MARGIN
TO EN55022B LIMIT

0 1000

FREQUENCY (MHz)

800100 200 300 500 600400 700

900

MAX9768

10W Mono Class D Speaker
Amplifier with Volume Control

2 _______________________________________________________________________________________

ABSOLUTE MAXIMUM RATINGS

ELECTRICAL CHARACTERISTICS

(PVDD= 12V, VDD= 3.3V, GND = PGND = 0V, V

SHDN

= VDD, V

MUTE

= 0V; Max volume setting; speaker load resistor connected

between OUT+ and OUT-, R

L

= ∞, unless otherwise noted. C

BIAS

= 2.2µF, C1 = C2 = 0.1µF, CIN= 0.47µF, RIN= 20kΩ, RF= 30kΩ,

SSM mode. Filterless modulation mode (see the

Functional Diagram/Typical Application Circuit

). TA= T

MIN

to T

MAX

, unless otherwise

noted. Typical values are at T

A

= +25°C.) (Note 1)

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.

PVDDto PGND........................................................-0.3V to +16V

V

DD

to GND..............................................................-0.3V to +4V

SCLK, SDA/VOL to GND ..........................................-0.3V to +4V

FB, SYNCOUT ............................................-0.3V to (V

DD

+ 0.3V)

BOOT_ to OUT_........................................................-0.3V to +4V

OUT_ to GND ...........................................-0.3V to (PV

DD

+ 0.3V)

PGND to GND ......................................................-0.3V to +0.3V

Any Other Pin to GND ..............................................-0.3V to +4V

OUT_ Short-Circuit Duration.......................................Continuous

Continuous Current (PV

DD

, PGND, OUT_) ..........................2.2A

Continuous Input Current (Any Other Pin) .......................±20mA

Continuous Input Current (FB_) .......................................±60mA

Continuous Power Dissipation (T

A

= +70°C)

Single-Layer Board:

24-Pin Thin QFN 4mm x 4mm,

(derate 20.8mW/°C above +70°C).................................1.67W

Multilayer Board:

24-Pin Thin QFN 4mm x 4mm,

(derate 27.8mW/°C above +70°C).................................2.22W

θ

JA

, Single-Layer Board…...........................................….48°C/W

θ

JA

, Multilayer Board ...................................................….36°C/W

Operating Temperature Range ...........................-40°C to +85°C

Storage Temperature Range .............................-65°C to +150°C

Lead Temperature (soldering, 10s) ................................+300°C

,

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

GENERAL

Speaker Supply Voltage
Range

Supply Voltage Range V

Shutdown Current I

Output Offset V

Turn-On Time t

Common-Mode Bias Voltage V

Input Amplifier Output­Voltage Swing High

Input Amplifier Output­Voltage Swing Low

Input Amplifier Output
Short-Circuit Current Limit

Input Amplifier Gain­Bandwidth Product

SPEAKER AMPLIFIERS

Internal Gain A

PV

I

VDD

I

PVDD

SHDNISHDN

ON

BIAS

V

V

GBW 1.8 MHz

VMAX

Inferred from PSRR test 4.5 14.0 V

DD

Inferred from PSRR and UVLO test 2.7 3.6 V

DD

Filterless modulation 4 7.6Quiescent Current

Classic PWM modulation 4 7.6

Filterless modulation, V

OS

Filterless modulation, V

MAX9768 220

MAX9768B 15

Specified as

OH

V

DD

Specified as

OL

V

OL

Max volume setting; from FB to amplifier outputs
|(OUT+) - (OUT-)|; excludes external gain
resistors

= I

- V

OH

- GND

+ IDD, SHDN = GND 0.5 50 µA

PVDD

= V

MUTE

= 0V, TA = +25°C ±2 ±14

MUTE

RL = 2kΩ connect to 1.5V 3.6 100 mV

R

= 2kΩ connect to 1.5V 6 50 mV

L

= +25°C ±2 ±12.5

T

DD

A

29.27 30.1 31.00 dB

714.2

1.5 V

±60 mA

mA

mV

ms

MAX9768

10W Mono Class D Speaker

Amplifier with Volume Control

_______________________________________________________________________________________ 3

ELECTRICAL CHARACTERISTICS (continued)

(PVDD= 12V, VDD= 3.3V, GND = PGND = 0V, V

SHDN

= VDD, V

MUTE

= 0V; Max volume setting; speaker load resistor connected

between OUT+ and OUT-, R

L

= ∞, unless otherwise noted. C

BIAS

= 2.2µF, C1 = C2 = 0.1µF, CIN= 0.47µF, RIN= 20kΩ, RF= 30kΩ,

SSM mode. Filterless modulation mode (see the

Functional Diagram/Typical Application Circuit

). TA= T

MIN

to T

MAX

, unless otherwise

noted. Typical values are at T

A

= +25°C.) (Note 1)

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

Efficiency (Note 2) η

Output Power (Note 2) P

Soft Output Current Limit I

Hard Output Current Limit I

Total Harmonic Distortion
Plus Noise (Note 2)

Signal-to-Noise Ratio
(Note 2)

MUTE Attenuation (Note 3) 0dB = 8W, f = 1kHz 115 dB

Power-Supply Rejection
Ratio

Oscillator Frequency f

P

OUT

1kHz, R

PVDD = 5V

OUT

LIM

SC

THD+N

SNR

PSRR

OCS

PVDD = 12V

PVDD = 14V

f = 1kHz, RL = 8Ω,
P

OUT

0dB = 8W, RL =
8Ω, BW = 22Hz to
22kHz, filterless
modulation mode

0dB = 8W, R
8Ω, BW = 22Hz to
22kHz, classic
PWM modulation

VDD = 2.7V to 3.6V, filterless modulation
T

= +25°C

A

PVDD = 4.5V to 14V, filterless modulation
T

= +25°C

A

f = 1kHz, V

f = 1kHz, V

SYNC = GND 1060 1200 1320

SYNC = unconnected 1296 1440 1584

SYNC = VDD (spread-spectrum modulation
mode)

= 8W, fIN =

= 8Ω

L

= 5W

=

L

RIPPLE

RIPPLE

Filterless modulation 87

Classic PWM modulation 85

RL = 8Ω, THD+N = 1%,
filterless modulation

= 8Ω, THD+N = 10%,

R

L

filterless modulation

RL = 8Ω, THD+N = 10%,
classic PWM modulation

= 8Ω, THD+N = 10%,

R

L

filterless modulation

RL = 8Ω, THD+N = 10%,
classic PWM modulation

R

= 8Ω, THD+N = 10%,

L

filterless modulation

Filterless modulation 0.09

Classic PWM modulation 0.08

Unweighted

A-weighted

Unweighted

A-weighted

= 200mV

= 100mV

P-P

P-P

FFM 94

SSM 93

FFM 97

SSM 97

FFM 93

SSM 89

FFM 97

SSM 91

,

,

on PV

DD

on V

DD

1.75 2 A

52 68

67 84

1200

1.3

1.7

9

9

10

10

2.5 A

77

60

±30

%

W

%

dB

dB

kHz

MAX9768

10W Mono Class D Speaker
Amplifier with Volume Control

4 _______________________________________________________________________________________

ELECTRICAL CHARACTERISTICS (continued)

(PVDD= 12V, VDD= 3.3V, GND = PGND = 0V, V

SHDN

= VDD, V

MUTE

= 0V; Max volume setting; speaker load resistor connected

between OUT+ and OUT-, R

L

= ∞, unless otherwise noted. C

BIAS

= 2.2µF, C1 = C2 = 0.1µF, CIN= 0.47µF, RIN= 20kΩ, RF= 30kΩ,

SSM mode. Filterless modulation mode (see the

Functional Diagram/Typical Application Circuit

). TA= T

MIN

to T

MAX

, unless otherwise

noted. Typical values are at T

A

= +25°C.) (Note 1)

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

Class D Switching
Frequency

SYNC Frequency Lock
Range

Minimum SYNC Frequency
Lock Duty Cycle

Maximum SYNC Frequency
Lock Duty Cycle

Gain Matching Full volume (ideal matching for RIN and RF)2%

Click-and-Pop Level (Note 2) K

Input Impedance DC volume control mode (SDA/VOL) 100 MΩ

Input Hysteresis DC volume control mode (SDA/VOL) 11 mV

9.5dB Gain Voltage DC volume control mode (SDA/VOL) 0.1 x V

Full Mute Voltage DC volume control mode (SDA/VOL) 0.9 x V

DIGITAL INPUTS (SHDN, MUTE, ADDR1, ADDR2, SYNC)

Input-Voltage High V

Input-Voltage Low V

Input Leakage Current

DIGITAL OUTPUT (SYNCOUT)

Output-Voltage High Load = 1mA VDD - 0.3 V

Output-Voltage Low Load = 1mA 0.3 V

Rise/Fall Time CL = 10pF 5 ns

SYNC = GND 265 300 330

SYNC = unconnected 324 360 396

SYNC = V
mode)

Peak voltage, 32 samples
per second, A-weighted, R

CP

x C

IN

clickless/popless operation

SYNC 2.33

IH

All other pins 0.7 x V

SYNC 0.8

IL

All other pins 0.3 x V

I

SYNC

I

All other digital inputs ±1

LK

(spread-spectrum modulation

DD

≤ 10ms to guarantee

IN

1000 1600 kHz

Into shutdown 52.6

Out of shutdown 48

Into mute 67

Out of mute 57

300

±7.5

DD

±7.5 ±13

40 %

60 %

DD

DD

kHz

dBV

V

V

V

V

DD

µA

MAX9768

10W Mono Class D Speaker

Amplifier with Volume Control

_______________________________________________________________________________________ 5

ELECTRICAL CHARACTERISTICS (continued)

(PVDD= 12V, VDD= 3.3V, GND = PGND = 0V, V

SHDN

= VDD, V

MUTE

= 0V; Max volume setting; speaker load resistor connected

between OUT+ and OUT-, R

L

= ∞, unless otherwise noted. C

BIAS

= 2.2µF, C1 = C2 = 0.1µF, CIN= 0.47µF, RIN= 20kΩ, RF= 30kΩ,

SSM mode. Filterless modulation mode (see the

Functional Diagram/Typical Application Circuit

). TA= T

MIN

to T

MAX

, unless otherwise

noted. Typical values are at T

A

= +25°C.) (Note 1)

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

THERMAL PROTECTION

Thermal Shutdown
Threshold

Thermal Shutdown
Hysteresis

DIGITAL INPUTS (SCLK, SDA/VOL)

Input-Voltage High V

Input-Voltage Low V

Input High Leakage Current I

Input Low Leakage Current I

Input Hysteresis 0.1 x V

Input Capacitance C

DIGITAL OUTPUTS (SDA/VOL)

Output High Current I

Output Low Voltage V

I2C TIMING CHARACTERISTICS (Figure 3)

Serial Clock f

Bus Free Time Between a
STOP and START
Condition

IH

IL

VIN = V

IH

VIN = GND ±1 µA

IL

IN

OH

SCL

t

BUF

VOH = V

IOL = 3mA 0.4 V

OL

DD

DD

0.7 x V

DD

1.3 µs

150 °C

15 °C

V

0.3 x V

DD

±1 µA

DD

5pF

1µA

400 kHz

V

V

Hold Time (Repeated)
START Condition

Repeated START Condition
Setup Time

STOP Condition Setup Time t

Data Hold Time t

Data Setup Time t

SCL Clock Low Period t

SCL Clock High Period t

Rise Time of SDA and SCL,
Receiving

Fall Time of SDA and SCL,
Receiving

t

HD,STA

t

SU,STA

SU,STO

HD,DAT

SU,DAT

LOW

HIGH

t

R

t

F

(Note 4)

(Note 4)

0.6 µs

0.6 µs

0.6 µs

00.9µs

100 ns

1.3 µs

0.6 µs

20 +

0.1Cb

20 +

0.1Cb

300 ns

300 ns

MAX9768

10W Mono Class D Speaker
Amplifier with Volume Control

6 _______________________________________________________________________________________

Note 1: All devices are 100% production tested at TA= +25°C. All temperature limits are guaranteed by design.
Note 2: Testing performed with a resistive load in series with an inductor to simulate an actual speaker load. For R

L

= 8Ω, L = 68µH.

Note 3: Device muted by either asserting MUTE or minimum V

OL

setting.

Note 4: C

b

= total capacitance of one bus line in pF.

ELECTRICAL CHARACTERISTICS (continued)

(PVDD= 12V, VDD= 3.3V, GND = PGND = 0V, V

SHDN

= VDD, V

MUTE

= 0V; Max volume setting; speaker load resistor connected

between OUT+ and OUT-, R

L

= ∞, unless otherwise noted. C

BIAS

= 2.2µF, C1 = C2 = 0.1µF, CIN= 0.47µF, RIN= 20kΩ, RF= 30kΩ,

SSM mode. Filterless modulation mode (see the

Functional Diagram/Typical Application Circuit

). TA= T

MIN

to T

MAX

, unless otherwise

noted. Typical values are at T

A

= +25°C.) (Note 1)

Typical Operating Characteristics

(PVDD= 12V, VDD= 3.3V = GND = PGND = 0V, V

MUTE

= 0V; 0dB volume setting; all speaker load resistors connected between

OUT+ and OUT-, R

L

= 8Ω, unless otherwise noted. C

BIAS

= 2.2µF, C1 = C2 = 0.1µF, CIN= 0.47µF, RIN= 20kΩ, RFB= 30kΩ,

spread-spectrum modulation mode.)

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

Fall Time of SDA,
Transmitting

Pulse Width of Spike
Suppressed

Capacitive Load for Each
Bus Line

t

t

SP

C

(Note 4)

F

b

TOTAL HARMONIC DISTORTION

PLUS NOISE vs. FREQUENCY

10

PVDD = 12V

Ω

= 8

R

L

FILTERLESS MODULATION

1

THD+N (%)

0.1

OUTPUT POWER = 6W

MAX9768 toc01

THD+N (%)

TOTAL HARMONIC DISTORTION

PLUS NOISE vs. FREQUENCY

10

PVDD = 12V

Ω

= 8

R

L

PWM MODE

1

OUTPUT POWER = 5W

0.1

20 +

0.1Cb

050ns

TOTAL HARMONIC DISTORTION

10

PVDD = 5V

= 8

R

L

MAX9768 toc02

FILTERLESS MODULATION

1

0.1

THD+N (%)

OUTPUT POWER = 300mW

0.01

OUTPUT POWER = 1W

250 ns

400 pF

PLUS NOISE vs. FREQUENCY

Ω

MAX9768 toc03

OUTPUT POWER = 2W

0.01
10 100k

FREQUENCY (Hz)

10k1k100

0.01
10 100k

OUTPUT POWER = 2W

FREQUENCY (Hz)

0.001

10k1k100

10 100k

10k1k100

FREQUENCY (Hz)

MAX9768

10W Mono Class D Speaker

Amplifier with Volume Control

_______________________________________________________________________________________

7

Typical Operating Characteristics (continued)

(PVDD= 12V, VDD= 3.3V = GND = PGND = 0V, V

MUTE

= 0V; 0dB volume setting; all speaker load resistors connected between

OUT+ and OUT-, R

L

= 8Ω, unless otherwise noted. C

BIAS

= 2.2µF, C1 = C2 = 0.1µF, CIN= 0.47µF, RIN= 20kΩ, RFB= 30kΩ,

spread-spectrum modulation mode.)

TOTAL HARMONIC DISTORTION

PLUS NOISE vs. FREQUENCY

10

PVDD = 5V

Ω

= 8

R

L

PWM MODE

1

OUTPUT POWER = 300mW

0.1

THD+N (%)

0.01
OUTPUT POWER = 800mW

0.001
10 100k

TOTAL HARMONIC DISTORTION

PLUS NOISE vs. OUTPUT POWER

100

PVDD = 12V

Ω

= 8

R

L

FILTERLESS MODULATION

10

1

MAX9768 toc04

10k1k100

FREQUENCY (Hz)

MAX9768 toc07

fIN = 10kHz

10

1

0.1

THD+N (%)

0.01

0.001

100

10

1

PVDD = 12V
R
FILTERLESS MODULATION

P

TOTAL HARMONIC DISTORTION

PLUS NOISE vs. FREQUENCY

Ω

= 8

L

= 4W

OUT

FIXED-FREQUENCY
MODULATION

SPREAD-SPECTRUM
MODULATION

10k1k10010 100k

FREQUENCY (Hz)

TOTAL HARMONIC DISTORTION

PLUS NOISE vs. OUTPUT POWER

PVDD = 12V

Ω

= 8

R

L

PWM MODE

fIN = 10kHz

MAX9768 toc05

THD+N (%)

0.001

MAX9768 toc08

TOTAL HARMONIC DISTORTION

PLUS NOISE vs. FREQUENCY

10

= 12V

PV

DD

Ω

= 8

R

L

PWM MODE

1

= 4W

P

OUT

FIXED-FREQUENCY

0.1

0.01

MODULATION

SPREAD-SPECTRUM
MODULATION

FREQUENCY (Hz)

TOTAL HARMONIC DISTORTION

PLUS NOISE vs. OUTPUT POWER

100

PVDD = 5V

Ω

= 8

R

L

FILTERLESS MODULATION

10

1

fIN = 10kHz

MAX9768 toc06

10k1k10010 100k

MAX9768 toc09

THD+N (%)

0.1

0.01
fIN = 100Hz

0.001
012

fIN = 1kHz

108462

OUTPUT POWER (W)

TOTAL HARMONIC DISTORTION

PLUS NOISE vs. OUTPUT POWER

100

PVDD = 5V

Ω

= 8

R

L

PWM MODE

10

0

fIN = 10kHz

fIN = 100Hz

fIN = 1kHz

OUTPUT POWER (W)

1

THD+N (%)

0.1

0.01

0.001

2.00.8 1.2 1.60.4

MAX9768 toc10

THD+N (%)

0.1

0.01
fIN = 100Hz

0.001
0

TOTAL HARMONIC DISTORTION

PLUS NOISE vs. OUTPUT POWER

100

PV

DD

= 8

R

L

f

= 1kHz

IN

10

FILTERLESS MODULATION

1

THD+N (%)

0.1

0.01
0

= 12V

Ω

FIXED-FREQUENCY
MODULATION

fIN = 1kHz

OUTPUT POWER (W)

SPREAD-SPECTRUM
MODULATION

OUTPUT POWER (W)

108462

MAX9768 toc11

104682

THD+N (%)

0.1

0.01

0.001
0

100

10

1

THD+N (%)

0.1

0.01
0

fIN = 100Hz

fIN = 1kHz

OUTPUT POWER (W)

TOTAL HARMONIC DISTORTION

PLUS NOISE vs. OUTPUT POWER

PVDD = 12V

Ω

= 8

R

L

f

= 1kHz

IN

PWM MODE

FIXED-FREQUENCY
MODULATION

SPREAD-SPECTRUM
MODULATION

OUTPUT POWER (W)

2.01.0 1.50.5

MAX9768 toc12

104682

MAX9768

10W Mono Class D Speaker
Amplifier with Volume Control

8 _______________________________________________________________________________________

Typical Operating Characteristics (continued)

(PVDD= 12V, VDD= 3.3V = GND = PGND = 0V, V

MUTE

= 0V; 0dB volume setting; all speaker load resistors connected between

OUT+ and OUT-, R

L

= 8Ω, unless otherwise noted. C

BIAS

= 2.2µF, C1 = C2 = 0.1µF, CIN= 0.47µF, RIN= 20kΩ, RFB= 30kΩ,

spread-spectrum modulation mode.)

CASE TEMPERATURE vs. OUTPUT POWER

MAX9768 toc21

OUTPUT POWER (W)

CASE TEMPERATURE (°C)

1246 1082

10

30

20

40

50

70

60

90

80

0

0

fIN = 1kHz
R

L

= 8

Ω

PVDD = 14V

PVDD = 12V

EFFICIENCY vs. OUTPUT POWER

100

0

FILTERLESS MODULATION

PWM MODE

OUTPUT POWER (W)

PVDD = 12V

= 1kHz

f

IN

Ω

= 8

R

L

104682

90

80

70

60

50

40

EFFICIENCY (%)

30

20

10

0

MAX9768 toc13

100

90

80

70

60

50

40

EFFICIENCY (%)

30

20

10

0

EFFICIENCY vs. OUTPUT POWER

FILTERLESS MODULATION

PWM MODE

0

OUTPUT POWER (W)

PVDD = 5V

= 1kHz

f

IN

Ω

= 8

R

L

2.01.0 1.50.5

MAX9768 toc14

EFFICIENCY vs. SUPPLY VOLTAGE

95

fIN = 1kHz

Ω

= 8

R

L

FILTERLESS MODULATION

92

89

86

EFFICIENCY (%)

83

80

4.5

THD+N = 10%

THD+N = 1%

SUPPLY VOLTAGE (V)

MAX9768 toc15

14.58.5 10.5 12.56.5

EFFICIENCY vs. SUPPLY VOLTAGE

95

fIN = 1kHz

Ω

= 8

R

L

PWM MODULATION

92

89

86

EFFICIENCY (%)

83

80

4.5

OUTPUT POWER vs. LOAD RESISTANCE

12

10

8

6

4

OUTPUT POWER (W)

2

0

THD+N = 1%

0

THD+N = 10%

THD+N = 1%

SUPPLY VOLTAGE (V)

THD+N = 10%

LOAD RESISTANCE (Ω)

PVDD = 12V

f = 1kHz

PWM MODE

MAX9768 toc16

14.58.5 10.5 12.56.5

MAX9768 toc19

3010 15 25205

OUTPUT POWER vs. SUPPLY VOLTAGE

14

Ω

RL = 8

= 1kHz

f

IN

12

PWM MODE

10

8

6

OUTPUT POWER (W)

4

2

0

4

THD+N = 10%

SUPPLY VOLTAGE (V)

OUTPUT POWER vs. LOAD RESISTANCE

3.5

3.0

2.5

2.0

1.5

OUTPUT POWER (W)

1.0

0.5

0

0

THD+N = 10%

THD+N = 1%

LOAD RESISTANCE (Ω)

THD+N = 1%

PVDD = 5V

f = 1kHz

PWM MODE

MAX9768 toc17

14810126

MAX9768 toc20

3010 15 25205

OUTPUT POWER vs. SUPPLY VOLTAGE

12

Ω

RL = 4
f

= 1kHz

IN

10

PWM MODE

THD+N = 10%

8

6

4

OUTPUT POWER (W)

2

0

4

THD+N = 1%

SUPPLY VOLTAGE (V)

MAX9768 toc18

14810126

MAX9768

10W Mono Class D Speaker

Amplifier with Volume Control

_______________________________________________________________________________________

9

_______________________________________________________________________________________

9

Typical Operating Characteristics (continued)

(PVDD= 12V, VDD= 3.3V = GND = PGND = 0V, V

MUTE

= 0V; 0dB volume setting; all speaker load resistors connected between

OUT+ and OUT-, R

L

= 8Ω, unless otherwise noted. C

BIAS

= 2.2µF, C1 = C2 = 0.1µF, CIN= 0.47µF, RIN= 20kΩ, RFB= 30kΩ,

spread-spectrum modulation mode.)

POWER-SUPPLY REJECTION RATIO (PVDD)

0

PVDD = 12V

-10

-20

-30

-40

-50

PSRR (dB)

-60

-70

-80

-90

-100
10

V

RIPPLE

RL = 8

= 100mV

Ω

PWM MODE

OUTPUT WAVEFORM (PWM MODE)

vs. FREQUENCY

P-P

FILTERLESS MODULATION

FREQUENCY (Hz)

MAX9768 toc22

100k1k 10k100

MAX9768 toc25

5V/div

-10

-20

-30

-40

-50

PSRR (dB)

-60

-70

-80

-90

-100

-20

-40

-60

-80

POWER-SUPPLY REJECTION RATIO (VDD)

0

10

0

OUTPUT WAVEFORM

vs. FREQUENCY

= 3.3V

V

DD

= 100mV

V

RIPPLE

RL = 8

P-P

Ω

PWM MODE

FILTERLESS MODULATION

FREQUENCY (Hz)

OUTPUT FREQUENCY SPECTRUM

FFM MODE
V

IN

f = 1kHz

= 8

R

L

UNWEIGHTED

= -60dBV

Ω

100k1k 10k100

MAX9768 toc23

MAX9768 toc26

-20

-40

-60

-80

(FILTERLESS MODULATION)

1μs/div

OUTPUT FREQUENCY SPECTRUM

0

MAX9768 toc24

VIN = -60dBV
f = 1kHz

Ω

= 8

R

L

UNWEIGHTED

5V/div

5V/div

MAX9768 toc27

1μs/div

WIDEBAND OUTPUT SPECTRUM

(FIXED-FREQUENCY MODULATION MODE)

0

-10

-20

-30

-40

-50

-60

-70

OUTPUT AMPLITUDE (dBV)

-80

-90

-100
1

RBW = 10kHz
INPUT AC GROUNDED
FILTERLESS MODULATION

FREQUENCY (MHz)

100010 100

5V/div

MAX9768 toc28

-100

OUTPUT MAGNITUDE (dBV)

-120

-140
0

FREQUENCY (kHz)

WIDEBAND OUTPUT SPECTRUM

(FIXED-FREQUENCY MODULATION MODE)

0

-10

-20

-30

-40

-50

-60

-70

OUTPUT AMPLITUDE (dBV)

-80

-90

-100
1

RBW = 10kHz
INPUT AC GROUNDED
PWM MODE

FREQUENCY (MHz)

2010515

MAX9768 toc29

100010 100

-100

OUTPUT MAGNITUDE (dBV)

-120

-140
0

FREQUENCY (kHz)

WIDEBAND OUTPUT SPECTRUM

(SPREAD-SPECTRUM MODULATION MODE)

0

-10

-20

-30

-40

-50

-60

-70

OUTPUT AMPLITUDE (dBV)

-80

-90

-100
1

RBW = 10kHz
INPUT AC GROUNDED
FILTERLESS MODULATION

FREQUENCY (MHz)

2010515

MAX9768 toc30

100010 100

MAX9768

10W Mono Class D Speaker
Amplifier with Volume Control

10 ______________________________________________________________________________________

Typical Operating Characteristics (continued)

(PVDD= 12V, VDD= 3.3V = GND = PGND = 0V, V

MUTE

= 0V; 0dB volume setting; all speaker load resistors connected between

OUT+ and OUT-, R

L

= 8Ω, unless otherwise noted. C

BIAS

= 2.2µF, C1 = C2 = 0.1µF, CIN= 0.47µF, RIN= 20kΩ, RFB= 30kΩ,

spread-spectrum modulation mode.)

WIDEBAND OUTPUT SPECTRUM

(SPREAD-SPECTRUM MODULATION MODE)

0

-10

-20

-30

-40

-50

-60

-70

OUTPUT AMPLITUDE (dBV)

-80

-90

-100
1

RBW = 10kHz
INPUT AC GROUNDED
PWM MODE

FREQUENCY (MHz)

100010 100

VOLUME CONTROL LEVEL

vs. VOLUME CONTROL VOLTAGE

20

0

-20

-40

-60

VOLUME LEVEL (dB)

-80

-100

-120
0

V

VOL

SUPPLY CURRENT (VDD)

vs. SUPPLY VOLTAGE

15

13

11

9

SUPPLY CURRENT (mA)

7

PWM MODE

FILTERLESS MODULATION

MAX9768 toc31

(V)

TURN-ON/OFF RESPONSE

(MAX9768)

100ms/div

MAX9768 toc34

3.52.01.51.00.5 3.02.5

MAX9768 toc36

MAX9768 toc32

SHDN
2V/div

OUT
500mA/div

4.0

3.5

3.0

2.5

2.0

1.5

SUPPLY CURRENT (mA)

1.0

0.5

0.50

0.45

0.40

SHUTDOWN CURRENT (μA)

0.35

∞

RL =

0

4

SHUTDOWN CURRENT = I
VDD = 3.3V

TURN-ON/OFF RESPONSE

SUPPLY CURRENT (PVDD)

vs. SUPPLY VOLTAGE

PWM MODE

FILTERLESS MODULATION

SUPPLY VOLTAGE (V)

SHUTDOWN CURRENT
vs. SUPPLY VOLTAGE

+ I

PVDD

DD

(MAX9768B)

40ms/div

MAX9768 toc35

14108612

MAX9768 toc37

MAX9768 toc33

SHDN
2V/div

OUT
500mA/div

5

2.6
SUPPLY VOLTAGE (V)

3.63.23.02.8 3.4

0.30
4

SUPPLY VOLTAGE (V)

14108612

MAX9768

10W Mono Class D Speaker

Amplifier with Volume Control

______________________________________________________________________________________ 11

Pin Description

PIN NAME FUNCTION

1, 2 OUT+ Positive Speaker Output

3, 16 PV

4 BOOT+

5SCLK

6 SDA/VOL I2C Serial Data I/O and Analog Volume Control Input

7FB

8 IN Audio Input

9, 11 GND Ground

10 BIAS Common-Mode Bias Voltage. Bypass with a 2.2µF capacitor to GND.

12 SYNC

13 SYNCOUT Clock Signal Output

14 V

15 BOOT-

17, 18 OUT- Negative Speaker Output

19 SHDN

20 MUTE

21, 22 PGND Power Ground

23 ADDR2 Address Select Input 2. I2C address option, also selects volume control mode.

24 ADDR1 Address Select Input 1. I2C address option, also selects volume control mode.

EP EP

DD

DD

Speaker Amplifier Power-Supply Input. Bypass with a 1µF capacitor to ground.

Positive Speaker Output Boost Flying-Capacitor Connection. Connect a 0.1µF ceramic capacitor
between BOOT+ and OUT+.

2

C Serial-Clock Input and Modulation Scheme Select. In I2C mode (ADDR1 and ADDR2 ≠ GND)

I
acts as I
PWM modulation, or connect SCLK to ground for filterless modulation.

Feedback. Connect feedback resistor between FB and IN to set amplifier gain. See the Adjustable
Gain section.

Frequency Select and External Clock Input.
SYNC = GND: Fixed-frequency mode with f
SYNC = Unconnected: Fixed-frequency mode with f
SYNC = V
SYNC = Clocked: Fixed-frequency mode with f

Power-Supply Input. Bypass with a 1µF capacitor to GND.

Negative Speaker Output Boost Flying-Capacitor Connection. Connect a 0.1µF ceramic capacitor
between BOOTL- and OUTL-.

Shutdown Input. Drive SHDN low to disable the audio amplifiers. Connect SHDN to V
operation

Mute Input. Drive MUTE high to mute the speaker outputs. Connect MUTE to GND for normal
operation.

Exposed Pad. Connect the exposed thermal pad to GND, and use multiple vias to a solid copper
area on the bottom of the PCB.

2

C serial-clock input. When ADDR1 and ADDR2 = GND. Connect SCLK to VDD for classic

= 1200kHz.

S

: Spread-spectrum mode with fS = 1200kHz ±30kHz.

DD

= 1440kHz.

S

= external clock frequency.

S

for normal

DD

Detailed Description

The MAX9768 10W, Class D audio power amplifier with
spread-spectrum modulation provides a significant step
forward in switch-mode amplifier technology. The
MAX9768 offers Class AB performance with Class D
efficiency and a minimal board space solution. This
device features a wide supply voltage operation (4.5V to
14V), analog or digitally adjusted volume control, exter­nally set input gain, shutdown mode, SYNC input and
output, speaker mute, and industry-leading click-and­pop suppression.

The MAX9768 features a 64-step, dual-mode (analog or
I2C programmed) volume control and mute function. In
analog volume control mode, voltage applied to
SDA/VOL sets the volume level. Two address inputs

(ADDR1, ADDR2) set the volume control function
between analog and I

2

C and set the slave address. In
I2C mode there are three selectable slave addresses
allowing for multiple devices on a single bus.

Spread-spectrum modulation and synchronizable
switching frequency significantly reduce EMI emis­sions. The outputs use Maxim’s low-EMI modulation
scheme with minimum pulse outputs when the audio
inputs are at the zero crossing. As the input voltage
increases or decreases, the duration of the pulse at
one output increases while the other output pulse dura­tion remains the same. This causes the net voltage
across the speaker (V

OUT+

- V

OUT-

) to change. The
minimum-width pulse topology reduces EMI and
increases efficiency.

MAX9768

10W Mono Class D Speaker
Amplifier with Volume Control

12 ______________________________________________________________________________________

Functional Diagram/Typical Application Circuit

2.7V to 3.6V 4.5V to 14V

V

DD

14

C

IN

0.47μF

V

DD

R

20kΩ

IN

R

F

30kΩ

MUTE

SHDN

SDA/VOL

SCLK

ADDR1

ADDR2

SYNC

MAX9768

7

FB

8

IN

VOLUME

CONTROL

20

MUTE

19

SHUTDOWN

6

CONTROL

5

24

23

12

2

C

I

ANALOG

CONTROL

OSCILLATOR

9, 11 21, 22

GND PGND

PV

BIAS

DD

3, 16

CLASS D

1, 2

17, 18

1μF1μF

4

BOOT+

C1

C

BIAS

2.2μF

SYNCOUT

0.1μF

C2

0.1μF

OUT+

OUT-

15

BOOT-

10

BIAS

13

(SHOWN IN ANALOG VOLUME CONTOL MODE, AV = 23.5dB, f

= 17Hz, SPREAD-SPECTRUM MODULATION MODE, FILTERLESS MODULATION MODE, MUTE OFF)

-3dB

Operating Modes

Fixed-Frequency Mode

The MAX9768 features two fixed-frequency modes:
300kHz and 360kHz. Connect SYNC to GND to select
300kHz switching frequency; leave SYNC unconnected
to select 360kHz switching frequency. The frequency
spectrum of the MAX9768 consists of the fundamental
switching frequency and its associated harmonics (see
the Wideband Output Spectrum graphs in the

Typical

Operating Characteristics

). For applications where
exact spectrum placement of the switching fundamen­tal is important, program the switching frequency so the
harmonics do not fall within a sensitive frequency band
(Table 1). Audio reproduction is not affected by chang­ing the switching frequency.

Spread-Spectrum Mode

The MAX9768 features a unique, patented spread­spectrum mode that flattens the wideband spectral
components, improving EMI emissions that may be
radiated by the speaker and cables. This mode is
enabled by setting SYNC = VDD(Table 1). In SSM
mode, the switching frequency varies randomly by
±7.5kHz around the center frequency (300kHz). The
modulation scheme remains the same, but the period
of the triangle waveform changes from cycle to cycle.
Instead of a large amount of spectral energy present at
multiples of the switching frequency, the energy is now
spread over a bandwidth that increases with frequency.
Above a few megahertz, the wideband spectrum looks
like white noise for EMI purposes. A proprietary amplifi­er topology ensures this does not corrupt the noise
floor in the audio bandwidth.

External Clock Mode

The SYNC input allows the MAX9768 to be synchro­nized to an external clock, or another Maxim Class D
amplifier, creating a fully synchronous system, minimiz­ing clock intermodulation, and allocating spectral com­ponents of the switching harmonics to insensitive

frequency bands. Applying a clock signal between
1MHz and 1.6MHz to SYNC synchronizes the
MAX9768. The Class D switching frequency is equal to
one-fourth the SYNC input frequency.

SYNCOUT is equal to the SYNC input frequency and
allows several Maxim amplifiers to be cascaded. The
synchronized output minimizes interference due to
clock intermodulation caused by the switching spread
between single devices. The modulation scheme
remains the same when using SYNCOUT, and audio
reproduction is not affected (Figure 1). Current flowing
between SYNCOUT of a master device and SYNC of a
slave device is low as the SYNC input is high imped­ance (typically 200kΩ).

MAX9768

10W Mono Class D Speaker

Amplifier with Volume Control

______________________________________________________________________________________ 13

Table 1. Operating Modes

Figure 1. Cascading Two Amplifiers

MAX9768

MAX9768

SYNC

OUT+

OUT-

SYNCOUT

OUT+

OUT-

SYNC OSCILLATOR FREQUENCY (kHz) CLASS D FREQUENCY (kHz)

GND Fixed-frequency modulation with f

Unconnected Fixed-frequency modulation with f

V

DD

Clocked

Spread-spectrum modulation with f

Fixed-frequency modulation with f
frequency

= 1200 Fixed-frequency modulation with f

OSC

= 1440 Fixed-frequency modulation with f

OSC

= 1200 ±30 Spread-spectrum modulation with f

OSC

= external clock

OSC

Fixed-frequency modulation with f
frequency / 4

= 300

OSC

= 360

OSC

= 300 ±7.5

OSC

= external clock

OSC

Filterless Modulation/PWM Modulation

The MAX9768 features two output modulation
schemes: filterless modulation or classic PWM, selec­table through SCLK when the device is in analog mode
(ADDR2 and ADDR1 = GND, Table 2) or through the
I2C interface (Table 7). Maxim’s unique, filterless modu­lation scheme eliminates the LC filter required by tradi­tional Class D amplifiers, reducing component count,
conserving board space and system cost. Although the
MAX9768 meets FCC and other EMI limits with a low­cost ferrite bead filter, many applications still may want
to use a full LC-filtered output. If using a full LC filter,
the performance is best with the MAX9768 configured
for classic PWM output.

Switching between schemes while in normal operating
mode with the I2C interface, the output is not click-and­pop protected. To have click-and-pop protection when
switching between output schemes, the device must
enter shutdown mode and be configured to the new out­put scheme before the startup sequence is terminated.

The startup time for the MAX9768 is typically 220ms.
The startup time for the MAX9768B is typically 15ms.

Efficiency

Efficiency of a Class D amplifier is due to the switching
operation of the output stage transistors. In a Class D
amplifier, the output transistors act as current-steering
switches and consume negligible additional power.
Any power loss associated with the Class D output
stage is mostly due to the I2R loss of the MOSFET on­resistance, and quiescent-current overhead.

The theoretical best efficiency of a linear amplifier is
78%, however, that efficiency is only exhibited at peak
output power. Under normal operating levels (typical
music reproduction levels), efficiency falls below 30%,
whereas the MAX9768 still exhibits > 80% efficiencies
under the same conditions (Figure 2).

Soft Current Limit

When the output current exceeds the soft current limit,
2A (typ), the MAX9768 enters a cycle-by-cycle current­limit mode. In soft current-limit mode, the output is
clipped at 2A. When the output decreases so the out­put current falls below 2A, normal operation resumes.
The effect of soft current limiting is a slight increase in
distortion. Most applications will not enter soft current­limit mode unless the speaker or filter creates imped­ance nulls below 8Ω.

MAX9768

10W Mono Class D Speaker
Amplifier with Volume Control

14 ______________________________________________________________________________________

Table 2. Modulation Scheme Selection In Analog Mode

Figure 2. MAX9768 Efficiency vs. Class AB Efficiency

EFFICIENCY vs. OUTPUT POWER

100

MAX9768

90

80

70

60

50

40

EFFICIENCY (%)

30

20

10

0

CLASS AB

PVDD = 12V

= 1kHz

f

IN

= 8Ω

R

L

010

OUTPUT POWER (W)

8642

MAX9768 fig02

ADDR2 ADDR1 SDA/VOL SCLK FUNCTION

0 0 Analog Volume Control 0 Filterless Modulation

0 0 Analog Volume Control 1 Classic PWM (50% Duty Cycle)

MAX9768

10W Mono Class D Speaker

Amplifier with Volume Control

______________________________________________________________________________________ 15

Hard Current Limit

When the output current exceeds the hard current limit,

2.5A (typ), the MAX9768 disables the outputs and initi­ates a startup sequence. This startup sequence takes
220ms for the MAX9768 and 15ms for the MAX9768B.
The shutdown and startup sequence is repeated until
the output fault is removed. When in hard current limit,
the output may make a soft clicking sound. The aver­age supply current is relatively low, as the duty cycle of
the output short is brief. Most applications will not enter
hard current-limit mode unless the output is short cir­cuited or incorrectly connected.

Thermal Shutdown

When the die temperature exceeds the thermal shut­down threshold, +150°C (typ), the MAX9768 outputs
are disabled. When the die temperature decreases
below +135°C (typ), normal operation resumes. The
effect of thermal shutdown is an output signal turning
off for approximately 3s in most applications, depend­ing on the thermal time constant of the audio system.
Most applications should never enter thermal shut­down. Some of the possible causes of thermal shut­down are too low of a load impedance, high ambient
temperature, poor PCB layout and assembly, or exces­sive output overdrive.

Shutdown

The MAX9768 features a shutdown mode that reduces
power consumption and extends battery life. Driving
SHDN low places the device in low-power (0.5µA) shut­down mode. Connect SHDN to digital high for normal
operation. In shutdown mode, the outputs are high
impedance, SYNCOUT is pulled high, the BIAS voltage
decays to zero, and the common-mode input voltage
decays to zero. The I2C register retains its contents
during shutdown.

Undervoltage Lockout (UVLO)

The MAX9768 features an undervoltage lockout protec­tion that shuts down the device if either of the supplies
are too low. The device will go into shutdown if VDDis
less than 2.5V (VDDUVLO = 2.5V) or if PVDDis less
than 4V (PVDDUVLO = 4V).

Mute Function

The MAX9768 features a clickless/popless mute mode.
When the device is muted, the outputs do not stop
switching, only the volume level is muted to the speak­er. To mute the MAX9768, drive MUTE to logic-high.

MUTE should be held high during system power-up
and power-down to ensure optimum click-and-pop
performance.

Volume Control

The volume control operates from either an analog volt­age input or through the I2C interface. The volume con­trol has 64 levels, with the lowest setting equal to mute.

To set the device to analog mode, connect ADDR1 and
ADDR2 to GND. In analog mode, SDA/VOL is an ana­log input for volume control, see the

Functional

Diagram/Typical Application Circuit

. The analog input

range is ratiometric between 0.9 x V

DD

and 0.1 x VDD,

where 0.9 x V

DD

= full mute and 0.1 x VDD= full volume

(Table 6).

In I2C mode, volume control for the speaker is controlled
separately by the command register (Tables 4, 5, 6). See
the

Write Data Format

section for more information

regarding formatting data and tables to set volume levels.

I2C Interface

The MAX9768 features an I2C 2-wire serial interface
consisting of a serial data line (SDA) and a serial clock
line (SCL). SDA and SCL facilitate communication
between the MAX9768 and the master at clock rates up
to 400kHz. When the MAX9768 is used on an I2C bus
with multiple devices, the VDDsupply must stay pow­ered on to ensure proper I2C bus operation. The mas­ter, typically a microcontroller, generates SCL and
initiates data transfer on the bus. Figure 3 shows the 2­wire interface timing diagram.

A master device communicates to the MAX9768 by trans­mitting the proper address followed by the data word.
Each transmit sequence is framed by a START (S) or
REPEATED START (Sr) condition and a STOP (P) condi­tion. Each word transmitted over the bus is 8 bits long
and is always followed by an acknowledge clock pulse.

The MAX9768 SDA line operates as both an input and
an open-drain output. A pullup resistor, greater than
500Ω, is required on the SDA bus. The MAX9768 SCL
line operates as an input only. A pullup resistor, greater
than 500Ω, is required on SCL if there are multiple mas­ters on the bus, or if the master in a single-master sys­tem has an open-drain SCL output. Series resistors in
line with SDA and SCL are optional. The SCL and SDA
inputs suppress noise spikes to assure proper device
operation even on a noisy bus.

MAX9768

10W Mono Class D Speaker
Amplifier with Volume Control

16 ______________________________________________________________________________________

Bit Transfer

One data bit is transferred during each SCL cycle. The
data on SDA must remain stable during the high period
of the SCL pulse. Changes in SDA while SCL is high
are control signals (see the

START and STOP

Conditions

section). SDA and SCL idle high when the

I2C bus is not busy.

START and STOP Conditions

A master device initiates communication by issuing a
START condition. A START condition is a high-to-low
transition on SDA with SCL high. A STOP condition is a
low-to-high transition on SDA while SCL is high (Figure 4).
A START (S) condition from the master signals the
beginning of a transmission to the MAX9768. The mas­ter terminates transmission, and frees the bus, by issu­ing a STOP (P) condition. The bus remains active if a
REPEATED START (Sr) condition is generated instead
of a STOP condition.

Early STOP Conditions

The MAX9768 recognizes a STOP condition at any point
during data transmission except if the STOP condition
occurs in the same high pulse as a START condition.

Slave Address

The slave address of the MAX9768 is 8 bits and con­sisting of 3 fields: the first field is 5 bits wide and is
fixed (10010). The second is a 2-bit field, which is set
through ADDR2 and ADDR1 (externally connected as
logic-high or low). Third field is a R/W flag bit. Set R/W
= 0 to write to the slave. A representation of the slave
address is shown in Table 3.

When ADDR1 and ADDR2 are connected to GND, seri­al interface communication is disabled. Table 4 sum­marizes the slave address of the device as a function of
ADDR1 and ADDR2.

Acknowledge

The acknowledge bit (ACK) is a clocked 9th bit that the
MAX9768 uses to handshake receipt each byte of data
(Figure 5). The MAX9768 pulls down SDA during the
master-generated 9th clock pulse. The SDA line must
remain stable and low during the high period of the
acknowledge clock pulse. Monitoring ACK allows for
detection of unsuccessful data transfers. An unsuc­cessful data transfer occurs if a receiving device is
busy or if a system fault has occurred. In the event of
an unsuccessful data transfer, the bus master can re­attempt communication.

Figure 3. 2-Wire Serial-Interface Timing Diagram

Figure 4. START, STOP, and REPEATED START Conditions

SDA

t

SU,STA

t

HD,STA

t

LOW

t

SU,DAT

t

HD,DAT

t

BUF

t

SP

t

SU,STO

SCL

t

t

HD,STA

START

CONDITION

HIGH

t

R

t

F

SSrP

SCL

SDA

REPEATED

START

CONDITION

STOP

CONDITION

START

CONDITION

Write Data Format

A write to the MAX9768 includes transmission of a
START condition, the slave address with the R/W bit set
to 0 (see Table 3), one byte of data to the command
register, and a STOP condition. Figure 6 illustrates the
proper format for one frame.

Volume Control

The command register is used to control the volume
level of the speaker amplifier. The two MSBs (D7 and
D6) should be set to 00 to choose the speaker register.
V5–V0 is the volume control data that will be written into
the addresses register to set the volume level (see
Tables 5 and 6).

For a write byte operation, the master sends a single byte
to the slave device (MAX9768). This is done as follows:

1) The master sends a start condition.

2) The master sends the 7-bit slave ID plus a write bit
(low).

3) The addressed slave asserts an ACK on the data
line.

4) The master sends 8 data bits.

5) The active slave asserts an ACK (or NACK) on the
data line.

6) The master generates a stop condition.

MAX9768

10W Mono Class D Speaker

Amplifier with Volume Control

______________________________________________________________________________________ 17

Table 3. Slave Address Block

Table 4. Slave Address

Figure 5. Acknowledge

Figure 6. Write Data Format Example

SA7 (MSB) SA6 SA5 SA4 SA3 SA2 SA1 SA0 (LSB)

1 0 0 1 0 ADDR2 ADDR1 R/W

ADDR2 ADDR1 SLAVE ADDRESS

0 0 Disabled

0 1 1001001_

1 0 1001010_

1 1 1001011_

START

CONDITION

SCL

SDA

WRITE BYTE FORMAT

S SLAVE ADDRESS

EQUIVALENT TO CHIP­SELECT LINE OF A 3­WIRE INTERFACE.

7 bits

1

289

WR ACK DATA

0

CLOCK PULSE FOR

ACKNOWLEDGMENT

NOT ACKNOWLEDGE

ACKNOWLEDGE

8 bits

DATA BYTE: GIVES A COMMAND.SLAVE ADDRESS:

ACK P

MAX9768

10W Mono Class D Speaker
Amplifier with Volume Control

18 ______________________________________________________________________________________

Table 5. Data Byte Format

Table 6. Speaker Volume Levels

D7

(MSB)

D6 D5 D4 D3 D2 D1

0 0 V5 V4 V3 V2 V1 V0

V5 V4 V3 V2 V1 V0

111111 63 9.5 0.7

111110 62 8.8 0.7

111101 61 8.2 0.6

111100 60 7.6 0.6

111011 59 7.0 0.6

111010 58 6.5 0.5

111001 57 5.9 0.5

111000 56 5.4 0.5

110111 55 4.9 0.5

110110 54 4.4 0.5

110101 53 3.9 0.6

110100 52 3.4 0.4

110011 51 2.9 0.5

110010 50 2.4 0.4

110001 49 2.0 0.4

110000 48 1.6 0.4

101111 47 1.2 0.7

101110 46 0.5 1.0

101101 45 -0.5 1.5

101100 44 -1.9 1.5

101011 43 -3.4 1.5

101010 42 -5.0 1.1

101001 41 -6.0 1.1

101000 40 -7.1 1.8

100111 39 -8.9 1.0

100110 38 -9.9 1.0

100101 37 -10.9 1.1

100100 36 -12.0 1.2

100011 35 -13.1 1.3

100010 34 -14.4 0.9

100001 33 -15.4 1.0

100000 32 -16.4 1.1

D0

(LSB)

VOLUME

POSITION

VOLUME

LEVEL (dB)

STEP SIZE

(dB)

MAX9768

10W Mono Class D Speaker

Amplifier with Volume Control

______________________________________________________________________________________ 19

Table 6. Speaker Volume Levels (continued)

V5 V4 V3 V2 V1 V0

011111 31 -17.5 2.2

011110 30 -19.7 1.9

011101 29 -21.6 1.9

011100 28 -23.5 1.7

011011 27 -25.2 2.0

011010 26 -27.2 2.6

011001 25 -29.8 1.6

011000 24 -31.5 2.0

010111 23 -33.4 2.5

010110 22 -36.0 1.6

010101 21 -37.6 2.0

010100 20 -39.6 2.5

010011 19 -42.1 1.6

010010 18 -43.7 2.0

010001 17 -45.6 2.5

010000 16 -48.1 2.5

001111 15 -50.6 3.5

001110 14 -54.2 2.5

001101 13 -56.7 3.5

001100 12 -60.2 2.5

001011 11 -62.7 3.5

001010 10 -66.2 2.5

001001 9 -68.7 3.5

001000 8 -72.2 2.5

000111 7 -74.7 3.5

000110 6 -78.3 2.5

000101 5 -80.8 3.5

000100 4 -84.3 2.5

000011 3 -86.8 3.5

000010 2 -90.3 2.5

000001 1 -92.8 —

0 0 0 0 0 0 0 (MUTE) -161.5 —

VOLUME

POSITION

VOLUME

LEVEL (dB)

STEP SIZE

(dB)

MAX9768

10W Mono Class D Speaker
Amplifier with Volume Control

20 ______________________________________________________________________________________

Applications Information

Filterless Class D Operation

The MAX9768 can be operated without a filter and
meet common EMC radiation limits when the speaker
leads are less than approximately 10cm. Lengths
beyond 10cm are possible but should be verified
against the appropriate EMC standard. Select the filter­less modulation mode with spread-spectrum modula­tion mode for best performance.

For longer speaker wire lengths, a simple ferrite bead
and capacitor-based filter can be used to meet EMC

limits. See Figure 7 for the correct connections of these
components. Select a ferrite bead with 100Ω to 600Ω
impedance, and rated for at least 1.5A. The capacitor
value will vary based on the ferrite bead chosen and
the actual speaker lead length. Select the capacitor
value based on EMC performance.

When doing bench evaluation without a filter or a ferrite
bead filter, include a series inductor (68µH for 8Ω load)
to model the actual loudspeaker’s behavior. If this
inductance is omitted, the MAX9768 will have reduced
efficiency and output power, as well as worse THD+N
performance.

Table 7. Setting Class D Output Modulation Scheme

Figure 7. Ferrite Bead Filter

*

Power-on default.

D7 (MSB) D6 D5 D4 D3 D2 D1 D0 (LSB) FUNCTION

1 1 0 1 0 1 0 1 Classic PWM

1 1 0 1 0 1 1 0 FILTERLESS MODULATION*

BOOT_+

C1

MAX9768

OUT_+

0.1μF

C9
330pF

OUT_-

C2

BOOT_-

0.1μF

C10
330pF

Inductor-Based Output Filters

Some applications will use the MAX9768 with a full
inductor-/capacitor-based (LC) output filter. This is
common for longer speaker lead lengths, and to gain
increased margin to EMC limits. Select the PWM output
mode and use fixed-frequency modulation mode for
best audio performance. See Figure 8 for the correct
connections of these components.

The component selection is based on the load imped­ance of the speaker. Table 8 lists suggested values for
a variety of load impedances.

Inductors L3 and L4, and capacitor C15 form the pri­mary output filter. In addition to these primary filter
components, other components in the filter improve its
functionality. Capacitors C13 and C14, plus resistors
R6 and R7, form a Zobel at the output. A Zobel corrects
the output loading to compensate for the rising imped­ance of the loudspeaker. Without a Zobel, the filter will
have a peak in its response near the cutoff frequency.
Capacitors C11 and C12 provide additional high-fre­quency bypass to reduce radiated emissions.

Adjustable Gain

Gain-Setting Resistors

External feedback resistors set the gain of the
MAX9768. The output stage has an internal 20dB gain
in addition to the externally set gain. Set the maximum
gain by using resistors RFand RIN(Figure 9)as follows:

Choose RFbetween 10kΩ and 50kΩ. Please note that
the actual gain of the amplifier is dependent on the vol­ume level setting. For example, with the volume control
set to +9.5dB, the amplifier gain would be 9.5dB +
20dB, assuming RF= RIN.

The input amplifier can be configured into a variety of
circuits. The FB terminal is an actual operational ampli­fier output, allowing the MAX9768 to be configured as a
summing amplifier, a filter, or an equalizer, for example.

MAX9768

10W Mono Class D Speaker

Amplifier with Volume Control

______________________________________________________________________________________ 21

Figure 8. Output Filter for PWM Mode

Table 8. Suggested Values for LC filter

BOOT_+

MAX9768

1, 2

14, 18

15

4

OUT_+

OUT_-

BOOT_-

C1

0.1μF

C2

0.1μF

R

⎛

⎞

A

/=−

V

10

F

⎜
⎝

VV

⎟
⎠

R

IN

L4

C11

L3

C12

C13

C15

C14

R6

R7

R

L

R

(Ω) L3, L4 (µH) C15 (µF) C11, C12 (µF) R6, R7 (Ω) C13, C14 (µF)

L

6 15 0.33 0.01 7.5 0.68

8 22 0.22 0.01 10 0.47

12 33 0.1 0.01 15 0.33

MAX9768

10W Mono Class D Speaker
Amplifier with Volume Control

22 ______________________________________________________________________________________

Power Supplies

The MAX9768 has different supplies for each portion of
the device, allowing for the optimum combination of
headroom power dissipation and noise immunity. The
speaker amplifiers are powered from PVDDand can
range from 4.5V to 14V. The remainder of the device is
powered by VDD. Power supplies are independent of
each other so sequencing is not necessary. Power may
be supplied by separate sources or derived from a sin­gle higher source using a linear regulator to reduce the
voltage as shown in Figure 10.

Component Selection

Input Filter

An input capacitor, CIN, in conjunction with the input
resistor of the MAX9768 forms a highpass filter that
removes the DC bias from an incoming signal. The AC­coupling capacitor allows the amplifier to automatically
bias the signal to an optimum DC level. Assuming zero
source impedance, the -3dB point of the highpass filter
is given by:

Choose CINso f

-3dB

is well below the lowest frequency
of interest. Use capacitors whose dielectrics have low­voltage coefficients, such as tantalum or aluminum elec­trolytic. Capacitors with high-voltage coefficients, such
as ceramics, may result in increased distortion at low fre­quencies.

Other considerations when designing the input filter
include the constraints of the overall system and the
actual frequency band of interest. Although high-fidelity
audio calls for a flat-gain response between 20Hz and
20kHz, portable voice-reproduction devices such as cel­lular phones and two-way radios need only concentrate

on the frequency range of the spoken human voice (typi­cally 300Hz to 3.5kHz). In addition, speakers used in
portable devices typically have a poor response below
300Hz. Taking these two factors into consideration, the
input filter may not need to be designed for a 20Hz to
20kHz response, saving both board space and cost due
to the use of smaller capacitors.

BIAS Capacitor

BIAS is the output of the internally generated DC bias
voltage. The BIAS bypass capacitor, C

BIAS

, improves
PSRR and THD+N by reducing power supply and other
noise sources at the common-mode bias node. Bypass
BIAS with a 2.2µF capacitor to GND.

Supply Bypassing, Layout, and Grounding

Proper layout and grounding are essential for optimum
performance. Use large traces for the power-supply
inputs and amplifier outputs to minimize losses due to
parasitic trace resistance. Large traces also aid in mov­ing heat away from the package. Proper grounding
improves audio performance, minimizes crosstalk
between channels, and prevents any switching noise
from coupling into the audio signal. Connect PGND and
GND together at a single point on the PCB. Route all
traces that carry switching transients away from GND
and the traces/components in the audio signal path.

Bypass VDDand PVDDwith a 1µF capacitor to PGND.
Place the bypass capacitors as close to the MAX9768
as possible. Place a bulk capacitor between PVDDand
PGND, if needed.

Use large, low-resistance output traces. Current drawn
from the outputs increase as load impedance decreas­es. High output trace resistance decreases the power
delivered to the load. Large output, supply, and GND
traces allow more heat to move from the MAX9768 to
the air, decreasing the thermal impedance of the circuit
if possible.

Figure 10. Using a Linear Regulator to Produce 3.3V from a
12V Power Supply

Figure 9. Setting Gain

BOOT+

AUDIO

C

IN

R

INPUT

IN

IN

MAX9768

R

F

FB

OUT+

OUT-

1μF

SHDN

IN

MAX1726

OUT

3.3V

12V

PV

DD

V

DD

MAX9768

1μF

BOOT-

2

π

1

RC

IN IN

f

−=3

dB

GND

GND

MAX9768

10W Mono Class D Speaker

Amplifier with Volume Control

______________________________________________________________________________________ 23

Chip Information

PROCESS: BICMOS

23

+

24

22

21

8

7

9

OUT+

BOOT+

SCLK

SDA/VOL

10

OUT+

OUT-

BOOT-

V

DD

OUT-

SYNCOUT

12

PGND

456

1718 16 14 13

ADDR2

ADDR1

BIAS

GND

IN

FB

MAX9768

PV

DD

PV

DD

3

15

PGND

20

11

GND

MUTE

19

12

SYNC

SHDN

TQFN

(4mm × 4mm)

TOP VIEW

Pin Configuration

MAX9768

10W Mono Class D Speaker
Amplifier with Volume Control

24 ______________________________________________________________________________________

Package Information

(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,
go to www.maxim-ic.com/packages

.)

24L QFN THIN.EPS

MAX9768

10W Mono Class D Speaker

Amplifier with Volume Control

Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.

Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________

25

© 2007 Maxim Integrated Products is a registered trademark of Maxim Integrated Products, Inc.

Heaney

Package Information (continued)

(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,
go to www.maxim-ic.com/packages

.)

24L QFN THIN.EPS