Rainbow Electronics MAX9258 User Manual

General Description

The MAX9257 serializer pairs with the MAX9258 deseri­alizer to form a complete digital video serial link. The
MAX9257/MAX9258 feature programmable parallel data
width, parallel clock frequency range, spread spectrum,
and preemphasis. An integrated control channel trans­fers data bidirectionally at power-up during video blank­ing over the same differential pair used for video data.
This feature eliminates the need for external CAN or LIN
interface for diagnostics or programming. The clock is
recovered from input serial data at MAX9258, hence
eliminating the need for an external reference clock.

The MAX9257 serializes 10, 12, 14, 16, and 18 bits with
the addition of two encoding bits for AC-coupling. The
MAX9258 deserializer links with the MAX9257 to deseri­alize a maximum of 20 (data + encoding) bits per
pixel/parallel clock period for a maximum serial-data
rate of 840Mbps. The word length can be adjusted to
accommodate a higher pixel/parallel clock frequency.
The pixel clock can vary from 5MHz to 70MHz, depend­ing on the serial-word length. Enabling parity adds two
parity bits to the serial word. The encoding bits reduce
ISI and allow AC-coupling.

The MAX9258 receives programming instructions from
the electronic control unit (ECU) during the control
channel and transmits to the MAX9257 over the serial
video link. The instructions can program or update the
MAX9257, MAX9258, or an external peripheral device,
such as a camera. The MAX9257 communicates with
the peripheral device with I2C or UART.

The MAX9257/MAX9258 operate from a +3.3V core
supply and feature separate supplies for interfacing to
+1.8V to +3.3V logic levels. These devices are avail­able in 40-lead TQFN or 48-pin LQFP packages. These
devices are specified over the -40°C to +105°C temper­ature range.

Applications

Automotive Cameras

Industrial Cameras

Navigation Systems Display

In-Vehicle Entertainment Systems

Features

♦ 10/12/14/16/18-Bit Programmable Parallel Data

Width

♦ MAX9258 Does Not Require Reference Clock

♦ Parity Protection for Video and Control Channels

♦ Programmable Spread Spectrum

♦ Programmable Rising or Falling Edge for HSYNC,

VSYNC, and Clock

♦ Up to 10 Remotely Programmable GPIO on

MAX9257

♦ Automatic Resynchronization in Case of Loss of

Lock

♦ MAX9257 Parallel Clock Jitter Filter PLL with

Bypass

♦ DC-Balanced Coding Allows AC-Coupling

♦ 5 Levels of Preemphasis for Up to 20m STP Cable

Drive

♦ Integrity Test Using On-Chip Programmable

PRBS Generator and Checker

♦ LVDS I/O Meet ISO10605 ESD Protection (±10kV

Contact and ±30kV Air Discharge)

♦ LVDS I/O Meet IEC61000-4-2 ESD Protection

(±8kV Contact and ±20kV Air Discharge)

♦ LVDS I/O Meet ±200V Machine Model ESD

Protection

♦ -40°C to +105°C Operating Temperature Range

♦ Space-Saving, 40-Pin TQFN (5mm x 5mm) with

Exposed Pad or 48-Pin LQFP Packages

♦ +3.3V Core Supply

MAX9257/MAX9258

Fully Programmable Serializer/Deserializer

with UART/I2C Control Channel

________________________________________________________________

Maxim Integrated Products

1

19-1044; Rev 0; 6/08

For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.

EVALUATION KIT

AVAILABLE

Ordering Information

+

Denotes a lead-free package.

*

EP = Exposed pad.

Typical Application Circuit and Pin Configurations appear
at end of data sheet.

PART TEMP RANGE

MAX9257GTL+ -40°C to +105°C 40 TQFN-EP* T4055+1

MAX9257GCM+ -40°C to +105°C 48 LQFP C48+3

MAX9258GCM+ -40°C to +105°C 48 LQFP C48+3

PIN­PACKAGE

PKG

CODE

MAX9257/MAX9258

2 _______________________________________________________________________________________

Fully Programmable Serializer/Deserializer
with UART/I2C Control Channel

ABSOLUTE MAXIMUM RATINGS

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.

VCC_ to GND .........................................................-0.5V to +4.0V

Any Ground to Any Ground...................................-0.5V to +0.5V

SDI+, SDI-, SDO+, SDO- to GND..........................-0.5V to +4.0V

SDO+, SDO- Short Circuit to GND or V

CCLVDS

.........Continuous

DIN[0:15], GPIO[0:9], PCLK_IN, HSYNC_IN, VSYNC_IN,

SCL/TX, SDA/RX, REM to GND............-0.5V to (V

CCIO

+ 0.5V)

DOUT[0:15], PCLK_OUT, HSYNC_OUT, VSYNC_OUT, RX,

LOCK, TX, PD, ERROR, to GND .......-0.5V to (V

CCOUT

+ 0.5V)

Continuous Power Dissipation (T

A

= +70°C)

40-Lead TQFN

Multilayer PCB (derate 35.7mW/°C above +70°C) .....2857mW

48-Lead LQFP

Multilayer PCB (derate 21.7mW/°C above +70°C) .....1739mW

Junction-to-Case Thermal Resistance (θ

JC

) (Note 1)

40-Lead TQFN .............................................................1.7°C/W

48-Lead LQFP...............................................................10°C/W

Junction-to-Ambient Thermal Resistance (θ

JA

) (Note 1)

40-Lead TQFN ..............................................................28°C/W

48-Lead LQFP...............................................................46°C/W

ESD Protection

Human Body Model (R

D

= 1.5kΩ, CS= 100pF)

All Pins to GND ..............................................................±3kV

IEC 61000-4-2 (R

D

= 330Ω, CS= 150pF)

Contact Discharge

(SDI+, SDI-, SDO+, SDO-) to GND................................±8kV

Air Discharge

(SDI+, SDI-, SDO+, SDO-) to GND..............................±20kV

ISO 10605 (R

D

= 2kΩ, CS= 330pF)

Contact Discharge

(SDI+, SDI-, SDO+, SDO-) to GND..............................±10kV

Air Discharge

(SDI+, SDI-, SDO+, SDO-) to GND..............................±30kV

Machine Model (R

D

= 0Ω, CS= 200pF)

All Pins to GND ............................................................±200V

Storage Temperature Range .............................-65°C to +150°C

Junction Temperature......................................................+150°C

Lead Temperature (soldering, 10s) .................................+300°C

MAX9257 DC ELECTRICAL CHARACTERISTICS

(V

CC_

= +3.0V to +3.6V, RL= 50Ω ±1%, TA= -40°C to +105°C, unless otherwise noted. Typical values are at V

CC_

= +3.3V,

T

A

= +25°C.) (Notes 2, 3)

Note 1: Package thermal resistances were obtained using the method described in JDEC specification JESD51-7, using a 4-layer

board. For detailed information on package thermal considerations, refer to www.maxim-ic.com/thermal-tutorial

.

SINGLE-ENDED INPUTS

High-Level Input Voltage V

Low-Level Input Voltage V

Input Current I

Input Clamp Voltage V

SINGLE-ENDED OUTPUTS

High-Level Output Voltage V

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

0.65 x
V

CCIO

-20 +20

V

-

CCIO

0.1

V

-

CCIO

0.35

IN

CL

OH

V

= +1.71V to +3V

CCIO

V

= +3V to +3.6V 2

IH

IL

CCIO

REM input 2

V

= +1.71V to +3V 0

CCIO

V

= +3V to +3.6V 0 0.8

CCIO

REM input 0 0.8

VIN = 0 to V
V

CCIO

VIN = 0 to V

ICL = -18mA -1.5 V

IOH = -100µA

IOH = -2mA

CCIO

= +1.71V to +3.6V

REM input -20 +20

CC,

V

V

CCIO

0.3

CCIO

0.3

V

CC

0.3

0.3 x

V

CCIO

+

+

+

V

V

µA

V

MAX9257/MAX9258

_______________________________________________________________________________________ 3

Fully Programmable Serializer/Deserializer

with UART/I2C Control Channel

MAX9257 DC ELECTRICAL CHARACTERISTICS (continued)

(V

CC_

= +3.0V to +3.6V, RL= 50Ω ±1%, TA= -40°C to +105°C, unless otherwise noted. Typical values are at V

CC_

= +3.3V,

T

A

= +25°C.) (Notes 2, 3)

Low-Level Output Voltage V

Output Short-Circuit Current I

I2C/UART I/O

Input Leakage Current I

High-Level Input Voltage SDA/RX V

Low-Level Input Voltage SDA/RX V

Low-Level Output Voltage
SCL, SDA

LVDS OUTPUTS (SDO+, SDO-)

Differential Output Voltage V

Change in VOD Between
Complimentary Output States

Common-Mode Voltage V

Change in VOS Between
Complimentary Output States

Output Short-Circuit Current I

Magnitude of Differential Output
Short-Circuit Current

CONTROL CHANNEL TRANSCEIVER

Differential Output Voltage V

Input Hysteresis
(Figure 2)

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

= 100µA 0.1

I

OL

= 2mA 0.3

I

OL

Shorted to GND -44 -10

Shorted to V

VI = V

R

PULLUP

Preemphasis off
(Figure 1)

V

SDO+

V

OD

Differential low-to-high threshold 25 90 135

Differential high-to-low threshold -25 -90 -135

CC_

CC

= 1.6k

Ω

or V

= 0 15 mA

= 0 or 3.6V -15 +15 mA

SDO-

10 44

-1 +1 µA

0.7 x
V

CC

250 350 460 mV

1.050 1.25 1.375 V

250 350 460 mV

ILKG

V

Δ

V

Δ

V

I

OSD

V

HYST+

V

HYST-

OL

OS

IH2

IL2

OL2

OD

OD

OS

OS

OS

OD

0.3 x
V

CC

0.4 V

20 mV

20 mV

V

mA

V

V

mV

MAX9257/MAX9258

4 _______________________________________________________________________________________

Fully Programmable Serializer/Deserializer
with UART/I2C Control Channel

MAX9257 DC ELECTRICAL CHARACTERISTICS (continued)

(V

CC_

= +3.0V to +3.6V, RL= 50Ω ±1%, TA= -40°C to +105°C, unless otherwise noted. Typical values are at V

CC_

= +3.3V,

T

A

= +25°C.) (Notes 2, 3)

POWER SUPPLY

Worst-Case Supply Current
(Figure 3)
C

L

Sleep Mode Supply Current I

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

= 8pF, 12 bits

I

CCW

CCS

±2% spread, preemphasis off,
PRATE = 60MHz, SRATE = 840Mbps

No spread, preemphasis off,
PRATE = 60MHz, SRATE = 840Mbps

N o sp r ead , p r eem p hasi s = 20%,
P RATE = 60M H z, S RATE = 840M b p s

N o sp r ead , p r eem p hasi s = 60%,
P RATE = 60M H z, S RATE = 840M b p s

N o sp r ead , p r eem p hasi s = 100%,
P RATE = 60M H z, S RATE = 840M b p s

±2% spread, preemphasis off,
PRATE = 28.57MHz, SRATE = 400Mbps

No spread, preemphasis off,
PRATE = 28.57MHz, SRATE = 400Mbps

No spread, preemphasis = 100%,
PRATE = 28.57MHz, SRATE = 400Mbps

±2% spread, preemphasis off,
PRATE = 14.29MHz, SRATE = 200Mbps

No spread, preemphasis off,
PRATE = 14.29MHz, SRATE = 200Mbps

No spread, preemphasis = 100%,
PRATE = 14.29MHz, SRATE = 200Mbps

±2% spread, preemphasis off,
PRATE = 7.14MHz, SRATE = 100Mbps

No spread, preemphasis off,
PRATE = 7.14MHz, SRATE = 100Mbps

N o sp r ead , p r eem p hasi s = 100%,
P RATE = 7.14M H z, S RATE = 100M b p s

±2% spread, preemphasis off,
PRATE = 5MHz, SRATE = 70Mbps

No spread, preemphasis off,
PRATE = 5MHz, SRATE = 70Mbps

No spread, preemphasis = 100%,
PRATE = 5MHz, SRATE = 70Mbps

Sleep mode 92 µA

104 126

99 121

99 120

108 127

110 129

78 96

77 94

86 105

55 68

54 67

59 73

44 55

43 54

46 57

34 43

34 42

36 45

mA

MAX9257/MAX9258

_______________________________________________________________________________________ 5

Fully Programmable Serializer/Deserializer

with UART/I2C Control Channel

MAX9257 AC ELECTRICAL CHARACTERISTICS

(V

CC_

= +3.0V to +3.6V, RL= 50Ω ±1%, TA= -40°C to +105°C, unless otherwise noted. Typical values are at V

CC_

= +3.3V,

T

A

= +25°C.) (Notes 5, 9)

PCLK_IN TIMING REQUIREMENTS

Clock Period t

Clock Frequency f

Clock Duty Cycle DC t

Clock Transition Time tR, t

SWITCHING CHARACTERISTICS

LVDS Output Rise Time t

LVDS Output Fall Time t

Control Transceiver Transition
Time

Input Setup Time t

Input Hold Time t

Parallel-to-Serial Delay

PLL Lock Time t

Random Jitter t

Deterministic Jitter t

SCL/TX, SDA/RX

Rise Time t

Fall Time t

Pulse Width of Spike Suppressed
in SDA

Data Setup Time t

Data Hold Time t

I2C TIMING (Note 8)

Maximum SCL Clock Frequency f

Minimum SCL Clock Frequency f

Start Condition Hold Time t

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

T

CLK

F

R

F

t

R1A , tF1A

t

R2 , tF2

t

R1B , tF1B

S

H

t

PSD1

t

PSD2

LOCK

RJ

DJ

RS

FS

1/t

T

HIGH/tT

or t

LOW

/t

T

(Figure 7) 4 ns

20% to 80% (Figure 4) 315 370 ps

20% to 80% (Figure 4) 315 370 ps

20% to 80% (Figure 16)

(Figure 5) 0 ns

(Figure 5) 3 ns

Spread off (Figure 6)

±4% spread

Combined FPLL and SPLL; PCLK_IN stable

420MHz LVDS output, spread off,
FPLL = bypassed

18

2

- 1 PRBS, SRATE = 840Mbps, 18 bits,

no spread

0.3 x VCC to 0.7 x
, CL = 30pF

V

CC

0.7 x VCC to 0.3 x V

R

R

CC, CL

= 10k

PULLUP

= 1.6k

PULLUP

= 30pF 40 ns

14.28 200.00 ns

5 70 MHz

35 50 65 %

642 970 1390

810 1140 1420

290 386 490

Ω

Ω

95kbps to 400kbps 100

t

SPK

400kbps to 1000kbps 50

1000kbps to 4250kbps 10

DC to 10Mbps (bypass mode) 10

SETUP

HOLD

SCL

SCL

HD:STA

400kbps 100

4.25Mbps, CL = 10pF 60

400kbps 100

4.25Mbps, CL = 10pF 0

(Figure 30) 0.6 µs

ps

(4.55 x t

( 36.55 x t

T) +

11

T) +

11

32,768 x

t

T

12

ns

ns

ps

(RMS)

142 ps (p-p)

400

60

ns

ns

ns

ns

4.25 MHz

95 kHz

MAX9257/MAX9258

6 _______________________________________________________________________________________

Fully Programmable Serializer/Deserializer
with UART/I2C Control Channel

MAX9257 AC ELECTRICAL CHARACTERISTICS (continued)

(V

CC_

= +3.0V to +3.6V, RL= 50Ω ±1%, TA= -40°C to +105°C, unless otherwise noted. Typical values are at V

CC_

= +3.3V,

T

A

= +25°C.) (Notes 5, 9)

MAX9258 DC ELECTRICAL CHARACTERISTICS

(V

CC_

= +3.0V to +3.6V, RL= 50Ω ±1%, differential input voltage |VID| = 0.05V to 1.2V, input common-mode voltage VCM= |VID/2| to

V

CC

- |VID/2|, TA= -40°C to +105°C, unless otherwise noted. Typical values are at V

CC_

= +3.3V, |VID| = 0.2V, VCM= 1.2V,

T

A

= +25°C.) (Notes 2, 3)

Low Period of SCL Clock t

High Period of SCL Clock t

Repeated START Condition
Setup Time

Data Hold Time t

Data Setup Time t

Setup Time for STOP Condition t

Bus Free Time t

SINGLE-ENDED INPUTS

High-Level Input Voltage V

Low-Level Input Voltage V

Input Current I

Input Clamp Voltage V

SINGLE-ENDED OUTPUTS

High-Level Output Voltage V

Low-Level Output Voltage V

High-Impedance Output Current I

Output Short-Circuit Current I

OPEN-DRAIN OUTPUTS

Output Low Voltage V

Output Low Voltage V
Leakage Current I

LVDS INPUTS (SDI+, SDI-)

Differential Input High Threshold V

Differential Input Low Threshold V

Input Current I

Power-Off Input Current I

CONTROL CHANNEL TRANSCEIVER

Differential Output Voltage V

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

LOW

HIGH

t

SU:STA

HD:DAT

SU:DAT

SU:STO

BUF

(Figure 30) 1.1 µs

(Figure 30) 0.6 µs

(Figure 30) 0.5 µs

(Figure 30) 0 0.9 µs

(Figure 30) 100 ns

(Figure 30) 0.5 µs

(Figure 30) 1.1 µs

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

IH

IL

IN

CL

VIN = 0 to V

ICL = -18mA -1.5 V

IOH = -100µA

OH

IOH = -2mA

OL

OZ

OS

OL

OL

LEAK

TH

IN+, IIN-

INO+, IINO-VCC_

OD

IOL = 100µA 0.1

IOL = 2mA 0.3
PD = low, VO = 0 to V

VO = 0V (Note 4) -16 -65

PCLK_OUT, VO = 0V -22 -80

V

CCOUT

V

CCOUT

VO = 0 or V

TL

CC

CCOUT

TXIN -60 +60

PD -20 +20

= +3V, IOL = 6.4mA 0.55 V

= +1.71V, IOL = 1.95mA 0.3 V

CC

= 0 or open -70 +70 µA

2.0 V

00.8V

V

CCOUT

-

0.1

V

CCOUT

-

0.35

-1 +1 µA

-50 mV

-60 +60 µA

250 460 mV

CC

V

µA

V

V

mA

1µA

50 mV

MAX9257/MAX9258

_______________________________________________________________________________________ 7

Fully Programmable Serializer/Deserializer

with UART/I2C Control Channel

MAX9258 DC ELECTRICAL CHARACTERISTICS (continued)

(V

CC_

= +3.0V to +3.6V, RL= 50Ω ±1%, differential input voltage |VID| = 0.05V to 1.2V, input common-mode voltage VCM= |VID/2| to

V

CC

- |VID/2|, TA= -40°C to +105°C, unless otherwise noted. Typical values are at V

CC_

= +3.3V, |VID| = 0.2V, VCM= 1.2V,

T

A

= +25°C.) (Notes 2, 3)

MAX9258 AC ELECTRICAL CHARACTERISTICS

V

CC_

= +3.0V to +3.6V, RL= 50Ω ±1%, CL= 8pF, differential input voltage |VID| = 0.1V to 1.2V, input common-mode voltage

V

CM

= |VID/2| to VCC- |VID/2|, TA= -40°C to +105°C, unless otherwise noted. Typical values are at V

CC_

= +3.3V, |VID| = 0.2V, VCM=

1.2V, T

A

= +25°C. (Notes 5, 6, and 7)

Input Hysteresis
(Figure 2)

POWER SUPPLY

Worst-Case Supply Current
C

L

(Figure 8)

Power-Down Supply Current I

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

= 8pF, 12 bits

V

HYST+

V

HYST-

I

CCW

CCZ

Differential low-to-high threshold 25 90 135

Differential high-to-low threshold -25 -90 -135

±4% spread, PRATE = 60MHz,
SRATE = 840Mbps

Spread off, PRATE = 60MHz,
SRATE = 840Mbps

±4% spread, PRATE = 28.57MHz,
SRATE = 400Mbps

Spread off, PRATE = 28.57MHz,
SRATE = 400Mbps

±4% spread, PRATE = 14.29MHz,
SRATE = 200Mbps

Spread off, PRATE = 14.29MHz,
SRATE = 200Mbps

±4% spread, PRATE = 5MHz,
SRATE = 70Mbps

Spread off, PRATE = 5MHz,
SRATE = 70Mbps

PD = low 10 50 µA

85 128

71 115

67 102

57 84

55 82

46 67

42 57

34 49

mV

mA

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

SWITCHING CHARACTERISTICS

Output Transition Time t

Output Transition Time,
PCLK_OUT

Output Transition Time t

Output Transition Time,
PCLK_OUT

t

Control Channel Transition Time

Control Channel Transition Time t

PCLK_OUT High Time t

PCLK_OUT Low Time t

R1A, tF1A,

t

R1B, tF1B

R, tF

t

R, tF

R, tF

t

R, tF

R2, tF2

HIGH

LOW

(Figure 9) 0.7 2.2 ns

(Figure 9) 0.5 1.5 ns

V

V

(Figure 16) 0.5 1.2 ns

(Figure 16) 0.6 1.3 ns

(Figure 10)

(Figure 10)

= 1.71V (Figure 9) 1.0 2.8 ns

CCOUT

= 1.71V (Figure 9) 0.7 2.2 ns

CCOUT

0.4 x
t

T

0.4 x
t

T

0.6 x

0.6 x

t

t

T

T

ns

ns

MAX9257 SUPPLY CURRENT

vs. FREQUENCY

MAX9257/58 toc01

PCLK FREQUENCY (MHz)

SUPPLY CURRENT (mA)

20 4025 3515 3010

20

40

60

80

100

120

0

545

PRBS PATTERN
18-BIT

100% PREEMPHASIS

NO PREEMPHASIS

MAX9257 SUPPLY CURRENT

vs. FREQUENCY

MAX9257/58 toc02

PCLK FREQUENCY (MHz)

SUPPLY CURRENT (mA)

5515 45

60

40

20

80

100

120

140

0

57535 6525

PRBS PATTERN
10-BIT

100% PREEMPHASIS

NO PREEMPHASIS

MAX9258 SUPPLY CURRENT

vs. FREQUENCY

MAX9257/58 toc03

PCLK FREQUENCY (MHz)

SUPPLY CURRENT (mA)

4010 3515

40

20

60

80

100

120

0

5452520 30

PRBS PATTERN
18-BIT

4% SPREAD

NO SPREAD

Typical Operating Characteristics

(V

CC_

= +3.3V, RL= 50Ω, CL= 8pF, TA= +25°C, unless otherwise noted.)

MAX9257/MAX9258

8 _______________________________________________________________________________________

Fully Programmable Serializer/Deserializer
with UART/I2C Control Channel

MAX9258 AC ELECTRICAL CHARACTERISTICS (continued)

V

CC_

= +3.0V to +3.6V, RL= 50Ω ±1%, CL= 8pF, differential input voltage |VID| = 0.1V to 1.2V, input common-mode voltage

V

CM

= |VID/2| to VCC- |VID/2|, TA= -40°C to +105°C, unless otherwise noted. Typical values are at V

CC_

= +3.3V, |VID| = 0.2V, VCM=

1.2V, T

A

= +25°C. (Notes 5, 6, and 7)

Note 2: Current into a pin is defined as positive. Current out of a pin is defined as negative. All voltages are referenced to ground

except V

TH

and VTL.

Note 3: Maximum and minimum limits over temperature are guaranteed by design and characterization. Devices are production

tested at T

A

= +105°C.

Note 4: One output at a time.
Note 5: AC parameters are guaranteed by design and characterization, and are not production tested.
Note 6: C

L

includes probe and test jig capacitance.

Note 7: t

T

is the period of the PCLK_OUT.

Note 8: For high-speed mode timing, see the

Detailed Description

section.

Note 9: I

2

C timing parameters are specified for fast-mode I2C. Max data rate = 400kbps.

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

Data Valid Before PCLK_ OUT t

Data Valid After PCLK_OUT t

Serial-to-Parallel Delay

Power-Up Delay t

Power-Down to High Impedance t

DVB

DVA

t

SPD1

t

SPD2

PUD

PDD

(Figure 11)

(Figure 11)

Spread off (Figure 14) 8t

±4% spread 40t

(Figure 12) 100 ns

(Figure 13) 100 ns

Each half of the UI, 12 bit,

Jitter Tolerance t

JT

SRATE = 840Mbps, PRBS

No spread 0.25 0.30 UI

pattern (Figure 15)

0.35 x
t

T

0.35 x
t

T

ns

ns

T

ns

T

MAX9257/MAX9258

_______________________________________________________________________________________ 9

Typical Operating Characteristics (continued)

(V

CC_

= +3.3V, RL= 50Ω, CL= 8pF, TA= +25°C, unless otherwise noted.)

Fully Programmable Serializer/Deserializer

with UART/I2C Control Channel

MAX9258 SUPPLY CURRENT

vs. FREQUENCY

120

PRBS PATTERN
10-BIT

100

80

60

40

SUPPLY CURRENT (mA)

20

0

4% SPREAD

5452520 30

PCLK FREQUENCY (MHz)

MAX9257 OUTPUT POWER

SPECTRUM vs. PCLK FREQUENCY

20

10kHz BW

10

4% SPREAD

0

-10

-20

-30

-40

-50

-60

OUTPUT POWER SPECTRUM (dBm)

-70

-80
18 2220

PCLK FREQUENCY (MHz)

900

NO SPREAD

4010 3515

NO SPREAD

2% SPREAD

2119

BIT ERROR RATE (< 10-9) vs.

CABLE LENGTH

SERIAL LINK SWITCHING PATTERN WITHOUT

PREEMPHASIS (BIT RATE = 840MHz, 2m STP CABLE)

MAX9257/58 toc04

MAX9257 OUTPUT POWER

SPECTRUM vs. PCLK FREQUENCY

20

10kHz BW

0

MAX9257/58 toc07

1.5% SPREAD

-20

-40

-60

OUTPUT POWER SPECTRUM (dBm)

-80
38 4642

NO SPREAD

PCLK FREQUENCY (MHz)

900

PREEMPHASIS (BIT RATE = 840MHz, 2m STP CABLE)

MAX9257/58 toc05

2% SPREAD

4440

MAX9257/58 toc08

OUTPUT POWER SPECTRUM (dBm)

BIT ERROR RATE (< 10-9) vs.

CABLE LENGTH

SERIAL LINK SWITCHING PATTERN WITH

(PREEMPHASIS = 100%)

MAX9258 OUTPUT POWER

SPECTRUM vs. PCLK FREQUENCY

20

10kHz BW

4% SPREAD

0

-20

-40

-60

-80
38 4642

PCLK FREQUENCY (MHz)

NO SPREAD

2% SPREAD

4440

MAX9257/58 toc06

MAX9257/58 toc09

800

NO SPREAD
STP CABLE

700

600

SERIAL-DATA RATE (Mbps)

500

BER CAN BE AS LOW AS 10
CABLE LENGTHS LESS THAN 10m.

400

0862 4 10 12 14 16 18 20

100% PREEMPHASIS

NO PREEMPHASIS

-12

CABLE LENGTH (m)

MAX9257/58 toc10

FOR

800

2% SPREAD ON
MAX9257, STP CABLE

700

100% PREEMPHASIS

600

SERIAL-DATA RATE (Mbps)

500

400

NO PREEMPHASIS

BER CAN BE AS LOW AS 10
CABLE LENGTHS LESS THAN 10m.

0862 4 10 12 14 16 18 20

CABLE LENGTH (m)

-12

FOR

MAX9257/58 toc11

MAX9257/MAX9258

10 ______________________________________________________________________________________

Fully Programmable Serializer/Deserializer
with UART/I2C Control Channel

MAX9257 Pin Description

PIN

TQFN LQFP

1, 18 2, 21 V

2, 11,

19, 34

3–8 4–9

9 10 GND

10 11 V

12 15 DIN15/GPIO7

13 16 HSYNC_IN Horizontal SYNC Input. HSYNC_IN is internally pulled down to ground.

14 17 VSYNC_IN Vertical SYNC Input. VSYNC_IN is internally pulled down to ground.

15 18 PCLK_IN

16 19 SCL/TX

17 20 SDA/RX

20, 33 23, 40 V

21 26 GPIO8 General Purpose Input/Output

22 27 GPIO9 General Purpose Input/Output

23 28 V

24 29 GND

25 30 GND

26 31 SDO- Serial LVDS Inverting Output

27 32 SDO+ Serial LVDS Noninverting Output

28 33 V

3, 14,

22, 41

NAME FUNCTION

Single-Ended Input/Output Buffer Supply Voltage. Bypass V

CCIO

GND Digital Supply Ground

DIN[9:14]/
GPIO[1:6]

FPLL

CCFPLL

CC

CCSPLL

SPLL

LVDS

CCLVDS

0.001µF capacitors in parallel as close as possible to the device with the smallest value
capacitor closest to V

Data Input/General Purpose Input/Output. When a serial-data word is less than 18 bits
word length, DIN_ not programmed as data inputs becomes GPIO (Table 22). DIN[9:14]
are internally pulled down to ground.

Filter PLL Ground

Filter PLL Supply Voltage. Bypass V
in parallel as close as possible to the device with the smallest value capacitor closest to
V

Data Input/General Purpose Input/Output. When a serial-data word is less than 18 bits
word length, DIN_ not programmed as data input becomes GPIO (Table 22). DIN15 is
internally pulled down to ground.

Parallel Clock Input. PCLK_IN latches data and sync inputs and provides the PLL reference
clock. PCLK_IN is internally pulled down to ground.

O p en- D r ai n C ontr ol C hannel Outp ut. S C L/TX b ecom es S C L outp ut w hen U ART- to- I
acti ve. S C L/TX b ecom es TX outp ut w hen U ART- to- I

Open-Drain Control Channel Input/Output. SDA/RX becomes bidirectional SDA when
UART-to-I2C is active. SDA/RX becomes RX input when UART-to-I2C is bypassed. SDA
output requires a pullup to V

Digital Supply Voltage. Bypass VCC to ground with 0.1µF and 0.001µF capacitors in p ar al l el
as cl ose as p ossi b l e to the d evi ce w i th the sm al l est val ue cap aci tor cl osest to V

Spread PLL Supply Voltage. Bypass V
capacitors in parallel as close as possible to the device with the smallest value capacitor
closest to V

SPLL Ground

LVDS Ground

LVDS Supply Voltage. Bypass V
parallel as close as possible to the device with the smallest value capacitor closest to
V

CCFPLL

CCLVDS

.

CCSPLL

.

.

CCIO

.

to GND

CCFPLL

.

CC

to GND

CCSPLL

to GND

CCLVDS

to GND with 0.1µF and

CCIO

with 0.1µF and 0.001µF capacitors

FPLL

2

C i s b yp assed . E xter nal l y p ul l up to V

with 0.1µF and 0.001µF

SPLL

with 0.1µF and 0.001µF capacitors in

LVDS

C C

2

C i s

.

C C

.

MAX9257/MAX9258

______________________________________________________________________________________ 11

Fully Programmable Serializer/Deserializer

with UART/I2C Control Channel

MAX9257 Pin Description (continued)

MAX9258 Pin Description

PIN

TQFN LQFP

29 34 REM

30, 31, 32,

35–39

40 47 DIN8/GPIO0

—

— — EP Exposed Pad for Thin QFN Package Only. Connect EP to ground.

35, 38,

39, 42–46

1, 12, 13

24, 25,

36, 37, 48

NAME FUNCTION

Remote Power-Up/Power-Down Select Input. Connect REM to ground for power-up to
follow VCC. Connect REM high to VCC through 10kΩ resistor for remote power-up. REM is
internally pulled down to GND.

DIN[0:7] Data Inputs. DIN[0:7] are internally pulled down to ground.

Data Input/General Purpose Input/Output. When a serial-data word is less than 18 bits
word length, DIN_ not programmed as data input becomes GPIO (Table 22). DIN8 is
internally pulled down to ground.

N.C. No Connection. Not internally connected.

PIN NAME FUNCTION

1, 12, 13, 24,

25, 36,

37

2V

3, 14 GND Digital Supply Ground

4 PD

5V

6 SDI- Serial LVDS Inverting Input

7 SDI+ Serial LVDS Noninverting Input

8 GND

9 GND

10 V

11 ERROR

15 RX LVCMOS/LVTTL Control Channel UART Output

N.C. No Connection. Not internally connected.

CC

CCLVDS

LVDS

PLL

CCPLL

Digital Supply Voltage. Bypass VCC to GND with 0.1µF and 0.001µF capacitors in parallel as close
as possible to the device with the smallest value capacitor closest V

LVCMOS/LVTTL Power-Down Input. Drive PD high to power up the device and enable all outputs.
Drive PD low to put all outputs in high impedance and reduce supply current. PD is internally pulled
down to ground.

LVDS Supply Voltage. Bypass V
as close as possible to the device with the smallest value capacitor closest to V

LVDS Supply Ground

PLL Supply Ground

PLL Supply Voltage. Bypass V
close to the device as possible with the smallest value capacitor closest to V

Active-Low, Open-Drain Error Output. ERROR asserts low to indicate a data transfer error was
detected (parity, PRBS, or UART control channel error). ERROR is high to indicate no error detected.
ERROR resets when the error registers are read for parity, control channel errors, and when PRBS
enable bit is reset for PRBS errors. Pull up to V

CCLVDS

CCPLL

to GND

to GND

PLL

with 0.1µF and 0.001µF capacitors in parallel

LVDS

with 0.1µF and 0.001µF capacitors in parallel as

with a 1kΩ resistor.

CCOUT

CC

.

.

CCLVDS

.

CCPLL

MAX9257/MAX9258

12 ______________________________________________________________________________________

Fully Programmable Serializer/Deserializer
with UART/I2C Control Channel

MAX9258 Pin Description (continued)

PIN NAME FUNCTION

16 TX LVCMOS/LVTTL Control Channel UART Input. TX is internally pulled up to V

Open-Drain Lock Output. LOCK asserts high to indicate PLLs are locked with correct serial-word

17 LOCK

18 PCLK_OUT LVCMOS/LVTTL Recovered Clock Output

19 VSYNC_OUT LVCMOS/LVTTL Vertical SYNC Output

20 HSYNC_OUT LVCMOS/LVTTL Horizontal SYNC Output

21, 28–35,

40–46

22, 39 V

23, 38, 48 GND

26 V

27 GND

47 CCEN

DOUT[15:0] LVCMOS/LVTTL Data Outputs

CCOUT

OUT

CCSPLL

SPLL

boundary alignment. LOCK asserts low to indicate PLLs are not locked or incorrect serial-word
boundary alignment was detected. Pull up to V

Output Supply Voltage. V

0.1µF and 0.001µF capacitors in parallel as close as possible to the device with the smallest value
capacitor closest to V

Output Supply Ground

Spread-Spectrum PLL Supply Voltage. Bypass V
capacitors in parallel as close as possible to the device with the smallest value capacitor closest to
V

SPLL Ground

LVCMOS/LVTTL Control Channel Enabled Output. CCEN asserts high to indicate that control
channel is enabled.

CCSPLL

.

CCOUT

CCOUT

with a 1kΩ resistor.

CCOUT

is the supply for all output buffers. Bypass V

.

to GND

CCSPLL

SPLL

CCOUT

CCOUT

with 0.1µF and 0.001µF

.

to GND

OUT

with

MAX9257/MAX9258

______________________________________________________________________________________ 13

Fully Programmable Serializer/Deserializer

with UART/I2C Control Channel

Figure 1. MAX9257 LVDS DC Output Parameters

Figure 2. Input Hysteresis

Figure 3. MAX9257 Worst-Case Pattern Input

SDO-

SDO+

(SDO+) - (SDO-)

(-) VOS(+)

V

OS

V

(-)

OD

/2

R

SDO+

SDO-

ΔV

OS

ΔVOD = |VOD(+) - VOD(-)|

L

/2

R

L

((SDO+) + (SDO-))/2

= |VOS(+) - VOS(-)|

VOD(+)

V

OD

V

OS

GND

V

(-)

OS

= 0V

V

OD

(-)

V

OD

-V

ID

V

HYST-

V

OUT

VID = 0V

V

HYST+

PCLK_IN

DIN

NOTE: PCLK_IN PROGRAMMED FOR RISING LATCH EDGE.

+V

ID

MAX9257/MAX9258

14 ______________________________________________________________________________________

Fully Programmable Serializer/Deserializer
with UART/I2C Control Channel

Figure 4. MAX9257 LVDS Control Channel Output Load and Output Rise/Fall Times

Figure 5. MAX9257 Input Setup and Hold Times

SDO+

R

L

SDO-

C

L

80%

(SDO+) - (SDO-)

t

RISE

PCLK_IN

V

ILMAX

t

SET

V

DIN, VSYNC_IN, HSYNC_IN

V

IHMIN

ILMAX

C

L

80%

20%20%

t

FALL

V

IHMIN

t

HOLD

V

IHMIN

V

ILMAX

NOTE: PCLK_IN PROGRAMMED FOR RISING LATCHING EDGE.

MAX9257/MAX9258

______________________________________________________________________________________ 15

Fully Programmable Serializer/Deserializer

with UART/I2C Control Channel

Figure 6. MAX9257 Parallel-to-Serial Delay

Figure 7. MAX9257 Parallel Input Clock Requirements

Figure 8. MAX9258 Worst-Case Pattern Output

Figure 9. MAX9258 Output Rise and Fall Times

DIN, HSYNC_IN,

VSYNC_IN

PCLK_IN

SDO

N

N+1

PCLK_IN

N+2

t

PSD1

N-1

EXPANDED TIME SCALE

N+3

N

FIRST BIT LAST BIT

t

T

t

HIGH

N+4

V

V

IHMIN

ILMAX

t

F

t

R

PCLK_OUT

DOUT

NOTE: PCLK_OUT PROGRAMMED FOR RISING LATCH EDGE.

t

LOW

C

L

MAX9258

SINGLE-ENDED OUTPUT LOAD

0.9 x V

CCOUT

0.1 x V

CCOUT

t

R

t

F

MAX9257/MAX9258

16 ______________________________________________________________________________________

Fully Programmable Serializer/Deserializer
with UART/I2C Control Channel

Figure 10. MAX9258 Clock Output High and Low Time

Figure 11. MAX9258 Output Data Valid Times

Figure 12. MAX9258 Power-Up Delay

Figure 13. MAX9258 Power-Down Delay

t

T

t

PCLK_OUT

t

LOW

HIGH

V

PCLK_OUT

V

OLMAX

OHMIN

V

OHMIN

V

OLMAX

DOUT, VSYNC_OUT,
HSYNC_OUT, LOCK

PD

POWERED DOWN

V

IHMIN

t

PUD

POWERED UP

(OUTPUTS ACTIVE)

t

DVB

V

OHMIN

V

OLMAX

NOTE: PCLK_OUT PROGRAMMED FOR RISING LATCHING EDGE.

PD

DOUT,

VSYNC,

HSYNC

V

ILMAX

t

DVA

t

PDD

HIGH IMPEDANCE

POWERED DOWNPOWERED UP

MAX9257/MAX9258

______________________________________________________________________________________ 17

Fully Programmable Serializer/Deserializer

with UART/I2C Control Channel

Figure 14. MAX9258 Serial-to-Parallel Delay

Figure 15. MAX9258 Jitter Tolerance

Figure 16. Control Channel Transition Time

SERIAL-WORD LENGTH

SERIAL WORD N

SDI

SERIAL WORD N+1 SERIAL WORD N+2

LAST BIT

PARALLEL WORD N-2

DOUT,
HSYNC_OUT,
VSYNC_OUT

PCLK_OUT

FIRST BIT

NOTE: PCLK_OUT PROGRAMMED FOR RISING LATCHING EDGE.

+25mV

-25mV

PARALLEL WORD N-1 PARALLEL WORD N

t

SPD1

INPUT TEMPLATE FOR LVDS SERIAL

- V

V

SDI+

SDI-

+100mV

0V

-100mV

t

JT

t

S

t

S

t

JT

1.0UI0.75UI0.50UI0.25UI0.0UI

NOTE: UI IS ONE SERIAL BIT. TIME INPUT IS MEASURED DIFFERENTIALLY (V

1 0

0.8V

(SDO+) - (SDO-)

0.2V

OD(+)

0.2 x | V

OD(+)

t

R1A

+ V

OD(+)

0.8 x | V

| 0.2 x | V

OD(-)

t

F2

OD(+)

+ V

| 0.8 x | V

OD(-)

0.2V

OD(-)

0.8V

OD(-)

t

R1B

0.2V

0.8V

OD(-)

OD(-)

SDI+

- V

).

SDI-

0.8V

OD(+)

OD(+)

0.2V

OD(+)

t

F1B

+ V

|

OD(-)

+ V

OD(-)

|

t

R2

OD(+)

t

F1A