General Description
The MAX9218 digital video serial-to-parallel converter
deserializes a total of 27 bits during data and control
phases. In the data phase, the LVDS serial input is converted to 18 bits of parallel video data and in the control
phase, the input is converted to 9 bits of parallel control
data. The separate video and control phases take
advantage of video timing to reduce the serial data rate.
The MAX9218 pairs with the MAX9217 serializer to form
a complete digital video transmission system.
Proprietary data decoding reduces EMI and provides
DC balance. The DC balance allows AC-coupling, providing isolation between the transmitting and receiving
ends of the interface. The MAX9218 features a selectable rising or falling output latch edge.
ESD tolerance is specified for ISO 10605 with ±10kV
contact discharge and ±30kV air discharge.
The MAX9218 operates from a +3.3V core supply and
features a separate output supply for interfacing to 1.8V
to 3.3V logic-level inputs. This device is available in 48lead Thin QFN and TQFP packages and is specified
from -40°C to +85°C.
Applications
Navigation System Display
In-Vehicle Entertainment System
Video Camera
LCD Displays
Features
♦ Proprietary Data Decoding for DC Balance and
Reduced EMI
♦ Control Data Deserialized During Video Blanking
♦ Five Control Data Inputs Are Single Bit-Error
Tolerant
♦ Output Transition Time Is Scaled to Operating
Frequency for Reduced EMI
♦ Staggered Output Switching Reduces EMI
♦ Output Enable Allows Busing of Outputs
♦ Clock Pulse Stretch on Lock
♦ Wide ±2% Reference Clock Tolerance
♦ Synchronizes to MAX9217 Serializer Without
External Control
♦ ISO 10605 ESD Protection
♦ Separate Output Supply Allows Interface to 1.8V
to 3.3V Logic
♦ +3.3V Core Power Supply
♦ Space-Saving Thin QFN and TQFP Packages
♦ -40°C to +85°C Operating Temperature
MAX9218
27-Bit, 3MHz-to-35MHz
DC-Balanced LVDS Deserializer
________________________________________________________________ Maxim Integrated Products 1
Pin Configurations
Ordering Information
19-3557; Rev 1; 4/05
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
*EP = Exposed pad.
PART TEMP RANGE PIN-PACKAGE
MAX9218ECM -40°C to +85°C 48 TQFP C48-5
MAX9218ETM -40°C to +85°C 48 Thin QFN-EP* T4866-1
PKG
CODE
TOP VIEW
RGB_OUT17
RGB_OUT16
RGB_OUT15
RGB_OUT14
RGB_OUT13
RGB_OUT12
RGB_OUT11
RGB_OUT10
4847464544434241403938
R/F
1
RNG1
2
V
3
CCLVDS
IN+
4
IN-
PLL GND
V
CCPLL
RNG0
GND
V
REFCLK
5
6
7
8
9
10
11
CC
12
1314151617181920212223
PWRDWN
OUTEN
CNTL_OUT0
MAX9218
CNTL_OUT1
CNTL_OUT2
CNTL_OUT3
TQFP
CNTL_OUT4
CNTL_OUT5
LVDS GND
RGB_OUT9
RGB_OUT8
V
CNTL_OUT6
CNTL_OUT7
CNTL_OUT8
GND
CCOVCCO
37
24
DE_OUT
36
35
34
33
32
31
30
29
28
27
26
25
RGB_OUT7
RGB_OUT6
RGB_OUT5
RGB_OUT4
RGB_OUT3
RGB_OUT2
RGB_OUT1
RGB_OUT0
PCLK_OUT
LOCK
V
CCO
V
GND
CCO
RNG1
V
CCLVDS
LVDS GND
PLL GND
V
CCPLL
RNG0
GND
V
REFCLK
GND
CCO
RGB_OUT16
RGB_OUT15
RGB_OUT14
RGB_OUT13
RGB_OUT12
MAX9218
CNTL_OUT2
CNTL_OUT3
CNTL_OUT1
RGB_OUT11
CNTL_OUT4
RGB_OUT17
4847464544434241403938
1
R/F
2
3
4
IN+
5
IN-
6
7
8
9
10
11
CC
12
1314151617181920212223
OUTEN
PWRDWN
CNTL_OUT0
THIN QFN-EP
RGB_OUT10
RGB_OUT9
RGB_OUT8
CNTL_OUT5
CNTL_OUT6
CNTL_OUT7
CCO
V
V
37
24
DE_OUT
CNTL_OUT8
36
35
34
33
32
31
30
29
28
27
26
25
RGB_OUT7
RGB_OUT6
RGB_OUT5
RGB_OUT4
RGB_OUT3
RGB_OUT2
RGB_OUT1
RGB_OUT0
PCLK_OUT
LOCK
V
CCO
GND
V
CCO
MAX9218
27-Bit, 3MHz-to-35MHz
DC-Balanced LVDS Deserializer
2 _______________________________________________________________________________________
ABSOLUTE MAXIMUM RATINGS
DC ELECTRICAL CHARACTERISTICS
(V
CC_
= +3.0V to +3.6V, PWRDWN = high, differential input voltage ⏐VID⏐ = 0.05V to 1.2V, input common-mode voltage VCM= ⏐VID/2⏐
to V
CC
- ⏐VID/2⏐, TA= -40°C to +85°C, unless otherwise noted. Typical values are at V
CC_
= +3.3V, ⏐VID⏐ = 0.2V, VCM= 1.2V,
T
A
= +25°C.) (Notes 1, 2)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
V
CC_
to _GND........................................................-0.5V to +4.0V
Any Ground to Any Ground...................................-0.5V to +0.5V
IN+, IN- to LVDS GND...........................................-0.5V to +4.0V
IN+, IN- Short Circuit to LVDS GND or V
CCLVDS
......Continuous
(R/F, OUTEN, RNG_, REFCLK,
PWRDWN) to GND .................................-0.5V to (V
CC
+ 0.5V)
(RGB_OUT[17:0], CNTL_OUT[8:0], DE_OUT, PCLK_OUT,
LOCK) to V
CCO
GND ...........................-0.5V to (V
CCO
+ 0.5V)
Continuous Power Dissipation (T
A
= +70°C)
48-Lead Thin QFN (derate 37mW/°C above +70°C) .2963mW
48-Lead TQFP (derate 20.8mW/°C above +70°C) ....1667mW
ESD Protection
Human Body Model (R
D
= 1.5kΩ, CS= 100pF)
All Pins to GND...........................................................±3.0kV
ISO 10605 (R
D
= 2kΩ, CS= 330pF)
Contact Discharge (IN+, IN-) to GND ............................±10kV
Air Discharge (IN+, IN-) to GND ....................................±30kV
Storage Temperature Range .............................-65°C to +150°C
Junction Temperature......................................................+150°C
Lead Temperature (soldering, 10s) .................................+300°C
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
SINGLE-ENDED INPUTS (R/F, OUTEN, RNG0, RNG1, REFCLK, PWRDWN)
High-Level Input Voltage V
Low-Level Input Voltage V
Input Current I
Input Clamp Voltage V
SINGLE-ENDED OUTPUTS (RGB_OUT[17:0], CNTL_OUT[8:0], DE_OUT, PCLK_OUT, LOCK)
High-Level Output Voltage V
Low-Level Output Voltage V
High-Impedance Output Current I
IH
IL
IN
CL
OH
OL
OZ
VIN = -0.3V to (VCC + 0.3V),
PWRDWN = high or low
ICL = -18mA -1.5 V
IOH = -100µA V
IOH = -2mA,
RNG1, RNG0 = high
IOH = -2mA, RNG1, RNG0 both not high
simultaneously
IOL = 100µA 0.1
IOL = 2mA,
RNG1, RNG0 = high
IOL = 2mA, RNG1, RNG0 both not high
simultaneously
PWRDWN = low or OUTEN = low,
= -0.3V to V
V
O
+ 0.3V
CCO
2.0 VCC + 0.3 V
-0.3 +0.8 V
-70 +70 µA
- 0.1
CCO
- 0.35
V
CCO
- 0.4
V
CCO
0.3
0.35
-10 +10 µA
V
V
MAX9218
27-Bit, 3MHz-to-35MHz
DC-Balanced LVDS Deserializer
_______________________________________________________________________________________ 3
DC ELECTRICAL CHARACTERISTICS (continued)
(V
CC_
= +3.0V to +3.6V, PWRDWN = high, differential input voltage ⏐VID⏐ = 0.05V to 1.2V, input common-mode voltage VCM= ⏐VID/2⏐
to V
CC
- ⏐VID/2⏐, TA= -40°C to +85°C, unless otherwise noted. Typical values are at V
CC_
= +3.3V, ⏐VID⏐ = 0.2V, VCM= 1.2V,
T
A
= +25°C.) (Notes 1, 2)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
RNG1, RNG0 = high, VO = 0 -10 -50
Output Short-Circuit Current I
LVDS INPUT (IN+, IN-)
Differential Input High Threshold V
Differential Input Low Threshold V
Input Current I
Input Bias Resistor R
Power-Off Input Current I
POWER SUPPLY
Worst-Case Supply Current
Power-Down Supply Current I
OS
TH
TL
IN+, IIN-
IB
INO+, IINO-
I
CCW
CCZ
RNG1, RNG0 both not high
simultaneously, V
PWRDWN = high or low -20 +20 µA
PWRDWN = high or low 35 50 65 kΩ
V
= 0 or open,
CC_
PWRDWN = 0 or open, Figure 1
V
= 0 or open,
CC_
PWRDWN = 0 or open
CL = 8pF,
worst-case
pattern,
Figure 2
(Note 3) 50 µA
= 0
O
RNG1 = low,
RNG0 = low
RNG1 = high,
RNG0 = low
RNG1 = high,
RNG0 = high
3MHz 20
7MHz 35
7MHz 25
15MHz 47
15MHz 37
35MHz 70
-7 -40
50 mV
-50 mV
35 50 65 kΩ
-40 +40 µA
mA
mA
MAX9218
27-Bit, 3MHz-to-35MHz
DC-Balanced LVDS Deserializer
4 _______________________________________________________________________________________
Note 1: Current into a pin is defined as positive. Current out of a pin is defined as negative. All voltages are referenced to ground
except V
TH
and VTL.
Note 2: Maximum and minimum limits over temperature are guaranteed by design and characterization. Devices are production
tested at T
A
= +25°C.
Note 3: All LVTTL/LVCMOS inputs, except PWRDWN at ≤ 0.3V or ≥ V
CC
- 0.3V. PWRDWN is ≤ 0.3V.
Note 4: AC parameters are guaranteed by design and characterization, and are not production tested. Limits are set at ±6 sigma.
Note 5: C
L
includes probe and test jig capacitance.
AC ELECTRICAL CHARACTERISTICS
(V
CC_
= +3.0V to 3.6V, CL= 8pF, PWRDWN = high, differential input voltage ⏐VID⏐ = 0.1V to 1.2V, input common-mode voltage
V
CM
= ⏐VID/2⏐ to VCC- ⏐VID/2⏐, TA= -40°C to +85°C, unless otherwise noted. Typical values are at V
CC_
= +3.3V, ⏐VID⏐ = 0.2V, VCM=
1.2V, T
A
= +25°C.) (Notes 4, 5)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
REFCLK TIMING REQUIREMENTS
Period t
Frequency f
Frequency Variation ∆f
Duty Cycle DC 40 50 60 %
Transition Time t
SWITCHING CHARACTERISTICS
Output Rise Time
Output Fall Time t
PCLK_OUT High Time t
PCLK_OUT Low Time t
Data Valid Before PCLK_OUT t
Data Valid After PCLK_OUT t
Input-to-Output Delay t
T
CLK
CLK
TRAN
t
R
F
HIGH
LOW
DVB
DVA
DELAY
REFCLK to serializer PCLK_IN -2.0 +2.0 %
20% to 80% 6 ns
RNG1, RNG0 = high 3.2 4.4
Figure 3
Figure 3
Figure 4
Figure 4
Figure 5 0.35 x tT0.4 x t
Figure 5 0.35 x tT0.4 x t
Figure 6
RNG1, RNG0 both not high
simultaneously
RNG1, RNG0 = high 2.7 4.5
RNG1, RNG0 both not high
simultaneously
28.57 333.00 ns
2.575 x
3 35 MHz
3.8 5.5
3.6 5.3
0.4 x
0.4 x
tT +
8.5
0.45 x
t
T
t
T
t
0.45 x
t
0.6 x
T
0.6 x
T
T
T
2.725 x
t
T
t
T
tT +
12.8
ns
ns
ns
ns
ns
ns
ns
PLL Lock to REFCLK t
Power-Down Delay t
Output Enable Time t
Output Disable Time t
PLLREF
PDD
OE
OZ
Figure 7
Figure 7 100 ns
Figure 8 30 ns
Figure 9 30 ns
16385 x
t
T
ns
MAX9218
27-Bit, 3MHz-to-35MHz
DC-Balanced LVDS Deserializer
_______________________________________________________________________________________ 5
Typical Operating Characteristics
(VCC_ = +3.3V, CL= 8pF, TA= +25°C, unless otherwise noted.)
WORST-CASE PATTERN
SUPPLY CURRENT vs. FREQUENCY
80
70
60
50
40
30
SUPPLY CURRENT (mA)
20
10
0
335
FREQUENCY (MHz)
MAX9218 toc01
31277 11 15 19 23
OUTPUT TRANSITION TIME
vs. OUTPUT SUPPLY VOLTAGE (V
7
6
t
5
4
3
2
OUTPUT TRANSITION TIME (ns)
1
0
1.8 3.3
R
t
F
RNG1 = RNG0 = HIGH
OUTPUT SUPPLY VOLTAGE (V)
)
CCO
MAX9218 toc02
3.02.72.42.1
OUTPUT TRANSITION TIME
vs. OUTPUT SUPPLY VOLTAGE (V
7
6
5
4
3
2
OUTPUT TRANSITION TIME (ns)
1
0
1.8 3.3
t
R
t
F
RNG1 = RNG0 = BOTH NOT HIGH
OUTPUT SUPPLY VOLTAGE (V)
)
CCO
MAX9218 toc03
3.02.72.42.1
-14
10
CAT5e
-13
10
-12
10
BIT-ERROR RATE
-11
10
-10
10
020
BIT-ERROR RATE
vs. CABLE LENGTH
35MHz CLOCK
700Mbps DATA RATE
FOR <12m, BER < 10
CAT5e CABLE LENGTH (m)
MAX9218 toc04
-12
161284