Rainbow Electronics MAX9216 User Manual

General Description

The MAX9210/MAX9212/MAX9214/MAX9216/MAX9220/ MAX9222 deserialize three LVDS serial data inputs into 21 single-ended LVCMOS/LVTTL outputs. A parallel rate LVDS clock received with the LVDS data streams provides timing for deserialization. The outputs have a separate supply, allowing 1.8V to 5V output logic levels.

The MAX9210/MAX9212/MAX9214/MAX9216/MAX9220/ MAX9222 feature programmable DC balance, which allows isolation between a serializer and deserializer using AC-coupling. A deserializer decodes data transmitted by a MAX9209/MAX9211/MAX9213/MAX9215 serializer.

The MAX9210/MAX9212/MAX9214/MAX9216 have rising-edge output strobes, and when DC balance is not programmed, are compatible with non-DC-balanced 21-bit deserializers such as the DS90CR216A and DS90CR218A. The MAX9220/MAX9222 have fallingedge output strobes.

Two frequency versions and two DC balance default conditions are available for maximum replacement flexibility and compatibility with popular non-DC-balanced deserializers. The transition time of the single-ended outputs is increased on the low-frequency version parts (MAX9210/ MAX9212/MAX9220) for reduced EMI.

The MAX9210/MAX9212/MAX9214/MAX9216/MAX9220/ MAX9222 are available in TSSOP and space-saving QFN packages, and operate over the -40°C to +85°C temperature range.

Applications

Automotive Navigation Systems

Automotive DVD Entertainment Systems

Digital Copiers

Laser Printers

Features

♦ Programmable DC Balance or Non-DC Balance ♦ DC Balance Allows AC-Coupling for Wider Input

Common-Mode Voltage Range

♦ As Low as 8MHz Operation

(MAX9210/MAX9212/MAX9220)

♦ Falling-Edge Output Strobe (MAX9220/MAX9222) ♦ Slower Output Transitions for Reduced EMI

(MAX9210/MAX9212/MAX9220)

♦ High-Impedance Outputs when PWRDWN is Low

Allow Output Busing

♦ Pin Compatible with DS90CR216A/DS90CR218A

(MAX9210/MAX9212/MAX9214/MAX9216)

♦ Fail-Safe Inputs in Non-DC-Balanced Mode ♦ 5V Tolerant PWRDWN Input ♦ PLL Requires No External Components ♦ Up to 1.785Gbps Throughput ♦ Separate Output Supply Pins Allow Interface to

1.8V, 2.5V, 3.3V, and 5V Logic

♦ LVDS Inputs Meet IEC 61000-4-2 Level 4 ESD

Requirements

♦ LVDS Inputs Conform to ANSI TIA/EIA-644 LVDS

Standard

♦ Low-Profile 48-Lead TSSOP and Space-Saving

QFN Packages

♦ +3.3V Main Power Supply ♦ -40°C to +85°C Operating Temperature Range

MAX9210/MAX9212/MAX9214/MAX9216/MAX9220/MAX9222

Programmable DC-Balance

21-Bit Deserializers

________________________________________________________________ Maxim Integrated Products 1

Ordering Information

19-2864; Rev 1; 8/03

For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.

*Future product—contact factory for availability. **EP = Exposed pad.

Functional Diagram and Pin Configurations appear at end of data sheet.

PART TEMP RANGE PIN-PACKAGE

MAX9210ETM* -40°C to +85°C 48 Thin QFN-EP**

MAX9210EUM* -40°C to +85°C 48 TSSOP MAX9212ETM* -40°C to +85°C 48 Thin QFN-EP** MAX9212EUM* -40°C to +85°C 48 TSSOP MAX9214ETM* -40°C to +85°C 48 Thin QFN-EP** MAX9214EUM -40°C to +85°C 48 TSSOP MAX9216ETM* -40°C to +85°C 48 Thin QFN-EP** MAX9216EUM* -40°C to +85°C 48 TSSOP MAX9220ETM* -40°C to +85°C 48 Thin QFN-EP** MAX9220EUM* -40°C to +85°C 48 TSSOP MAX9222ETM* -40°C to +85°C 48 Thin QFN-EP** MAX9222EUM -40°C to +85°C 48 TSSOP

MAX9210/MAX9212/MAX9214/MAX9216/MAX9220/MAX9222

Programmable DC-Balance 21-Bit Deserializers

2 _______________________________________________________________________________________

ABSOLUTE MAXIMUM RATINGS

DC ELECTRICAL CHARACTERISTICS

(VCC= +3.0V to +3.6V, V

CCO

= +3.0V to +5.5V, PWRDWN = high, DCB/NC = high or low, differential input voltage VID = 0.05V to

1.2V, input common-mode voltage V

= VID/2 to 2.4V - VID/2, TA= -40°C to +85°C, unless otherwise noted. Typical values are

at V

= V

CCO

= +3.3V, VID = 0.2V, VCM= 1.25V, TA= +25°C.) (Notes 1, 2)

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

VCCto GND...........................................................-0.5V to +4.0V

CCO

to GND.........................................................-0.5V to +6.0V

RxIN_, RxCLK IN_ to GND ....................................-0.5V to +4.0V

PWRDWN to GND .................................................-0.5V to +6.0V

DCB/NC to GND.........................................-0.5V to (V

+ 0.5V)

RxOUT_, RxCLK OUT to GND .................-0.5V to (V

CCO

+ 0.5V)

Continuous Power Dissipation (T

= +70°C)

48-Pin TSSOP (derate 16mW/

C above +70°C)........ 1282mW

48-Lead Thin QFN (derate 26.3mW/

C above +70°C) ................................2105mW

Storage Temperature Range..............................-65

C to +150°C

Junction Temperature ......................................................+150

ESD Protection

Human Body Model (R

= 1.5kΩ, CS= 100pF)

All Pins to GND ................................................................±5kV

IEC 61000-4-2 (R

= 330Ω, CS= 150pF) Level 4

Contact Discharge LVDS Inputs (RxIN_, RxCLK IN_)

to GND .............................................................................±8kV

Air Discharge LVDS Inputs (RxIN_, RxCLK IN_)

to GND ...........................................................................±15kV

Lead Temperature (soldering, 10s) .................................+300

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

SINGLE-ENDED INPUTS (PWRDWN, DCB/NC)

High-Level Input Voltage V

Low-Level Input Voltage V

Input Current I

Input Clamp Voltage V

SINGLE-ENDED OUTPUTS (RxOUT_, RxCLK OUT)

High-Level Output Voltage V

Low-Level Output Voltage V

High-Impedance Output Current I

Output Short-Circuit Current

Note: Short one output at a time.

LVDS INPUTS

Differential Input High Threshold V

Differential Input Low Threshold V

PWRDWN 2.0 5.5

DCB/NC 2.0

VIN = high or low, PWRDWN = high or low -20 +20 µA

ICL = -18mA -1.5 V

IOH = -100µA

IOH = -2mA

IOL = 100µA 0.1

IOL = 2mA 0.2

PWRDWN = low, V

+ 0.3V)

CCO

= 3.0V to 3.6V, V

CCO

= 4.5V to 5.5V, V

CCO

0.3

-0.3 +0.8 V

CCO

0.1

CCO

0.25

= -0.3V to

OUT_

= 0V -10 -40

OUT

= 0V -28 -75

OUT

-20 +20 µA

50 mV

-50 mV

MAX9210/MAX9212/MAX9214/MAX9216/MAX9220/MAX9222

Programmable DC-Balance

21-Bit Deserializers

_______________________________________________________________________________________ 3

DC ELECTRICAL CHARACTERISTICS (continued)

(VCC= +3.0V to +3.6V, V

CCO

= +3.0V to +5.5V, PWRDWN = high, DCB/NC = high or low, differential input voltage VID = 0.05V to

1.2V, input common-mode voltage V

= VID/2 to 2.4V - VID/2, TA= -40°C to +85°C, unless otherwise noted. Typical values are

at V

= V

CCO

= +3.3V, VID = 0.2V, VCM= 1.25V, TA= +25°C.) (Notes 1, 2)

AC ELECTRICAL CHARACTERISTICS

(VCC= V

CCO

= +3.0V to 3.6V, 100mV

P-P

at 200kHz supply noise, CL= 8pF, PWRDWN = high, DCB/NC = high or low, differential

input voltage V

 = 0.1V to 1.2V, input common-mode voltage VCM= VID/2 to 2.4V - VID/2, TA= -40°C to +85°C, unless other-

wise noted. Typical values are at V

= V

CCO

= +3.3V, VID = 0.2V, VCM= 1.25V, TA= 25°C.) (Notes 3, 4, 5)

Input Current I

Power-Off Input Current

Input Resistor 1 R

Input Resistor 2 R

POWER SUPPLY

Worst-Case Supply Current I

Power-Down Supply Current I

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

IN+, IIN-

INO+,

INO-

CCW

CCZ

PWRDWN = high or low -25 +25 µA

VCC = V DCB/NC, PWRDWN = 0V or open

PWRDWN = high or low (Figure 1)

IN1

VCC = V PWRDWN = high or low (Figure 1)

IN2

VCC = V

CL = 8pF, worst-case pattern, DC-balanced mode; V

3.0V to 3.6V, Figure 2

CL = 8pF, worst-case pattern, non-DCbalanced mode;

= V

3.6V, Figure 2

PWRDWN = low 50 µA

= 0V or open,

CCO

= 0V or open (Figure 1)

CCO

= 0V or open (Figure 1)

CCO

= V

CCO

= 3.0V to

-25 +25 µA

42 78 kΩ

246 410 kΩ

16MHz 52 63

34MHz 86 106

66MHz 152 177

20MHz 53 64

33MHz 72 85

40MHz 81 99

66MHz 127 149

85MHz 159 186

Output Rise Time CLHT 0.1 x V

Output Fall Time CHLT 0.9 x V

RxIN Skew Margin RSKM

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

DC-balanced mode, Figure 4 (Note 6)

Non-DC-balanced mode, Figure 4 (Note 6)

CCO

to 0.9 x V

to 0.1 x V

, Figure 3 2.2 3.15 3.9 ns

CCO

, Figure 3 1.3 2.12 2.9 ns

CCO

16MHz 2560 3137

34MHz 900 1327

66MHz 330 685

20MHz 2500 3300

40MHz 960 1448

85MHz 330 685

WORST-CASE PATTERN SUPPLY CURRENT

vs. FREQUENCY

MAX9210 toc01

FREQUENCY (MHz)

SUPPLY CURRENT (mA)

65503520

100

120

140

160

580

MAX9214 DC-BALANCED MODE

WORST-CASE PATTERN SUPPLY CURRENT

vs. FREQUENCY

MAX9210 toc02

FREQUENCY (MHz)

SUPPLY CURRENT (mA)

75 9060

100

120

160

140

MAX9214 NON-DC-BALANCED MODE

OUTPUT TRANSITION TIME

vs. OUTPUT SUPPLY VOLTAGE (V

CCO

)

MAX9210 toc03

OUTPUT SUPPLY VOLTAGE (V)

OUTPUT TRANSITION TIME (ns)

4.54.03.53.0

2.5 5.0

MAX9214 NON-DC-BALANCED MODE

MAX9210/MAX9212/MAX9214/MAX9216/MAX9220/MAX9222

Programmable DC-Balance 21-Bit Deserializers

4 _______________________________________________________________________________________

AC ELECTRICAL CHARACTERISTICS (continued)

(VCC= V

CCO

= +3.0V to 3.6V, 100mV

P-P

at 200kHz supply noise, CL= 8pF, PWRDWN = high, DCB/NC = high or low, differential

input voltage V

 = 0.1V to 1.2V, input common-mode voltage VCM= VID/2 to 2.4V - VID/2, TA= -40°C to +85°C, unless other-

wise noted. Typical values are at V

= V

CCO

= +3.3V, VID = 0.2V, VCM= 1.25V, TA= 25°C.) (Notes 3, 4, 5)

Note 1: Current into a pin is defined as positive. Current out of a pin is defined as negative. All voltages are referenced to ground

except V

and VTL.

Note 2: Maximum and minimum limits over temperature are guaranteed by design and characterization. Devices are production

tested at T

= +25°C.

Note 3: AC parameters are guaranteed by design and characterization, and are not production tested. Limits are set at ±6 sigma. Note 4: C

includes probe and test jig capacitance.

Note 5: RCIP is the period of RxCLK IN. RCOP is the period of RxCLK OUT. RCIP = RCOP. Note 6: RSKM measured with

≤

150ps cycle-to-cycle jitter on RxCLK IN.

Typical Operating Characteristics

(VCC= V

CCO

= +3.3V, CL= 8pF, PWRDWN = high, differential input voltage VID = 0.2V, input common-mode voltage VCM= 1.2V,

= +25°C, unless otherwise noted.)

RxCLK OUT High Time RCOH Figures 5a, 5b

RxCLK OUT Low Time RCOL Figures 5a, 5b

RxOUT Setup to RxCLK OUT RSRC Figures 5a, 5b

RxOUT Hold from RxCLK OUT RHRC Figures 5a, 5b

RxCLK IN to RxCLK OUT Delay RCCD Figures 6a, 6b 4.9 6.17 8.1 ns

Deserializer Phase-Locked Loop Set

Deserializer Power-Down Delay RPDD Figure 8 100 ns

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

RPLLS Figure 7

0.35 x RCOP

0.30 x RCOP

0.45 x RCOP

0.4 x

RCOP

0.44 x RCOP

0.35 x RCOP

0.48 x RCOP

32800 x

RCIP

MAX9210/MAX9212/MAX9214/MAX9216/MAX9220/MAX9222

Programmable DC-Balance

21-Bit Deserializers

_______________________________________________________________________________________ 5

Pin Description

TSSOP QFN

NAME FUNCTION

1, 2, 4, 5, 45, 46, 47

RxOUT14–

RxOUT20

Channel 2 Single-Ended Outputs

3, 25, 32, 38, 44 19, 26, 32, 38, 45 GND Ground

6 48 DCB/NC

LVTTL/LVCMOS DC-Balance Programming Input: MAX9210: pulled up to V

MAX9212: pulled down to GND MAX9214: pulled up to V

MAX9216: pulled down to GND MAX9220: pulled up to V

MAX9222: pulled up to V

See Table 1.

7, 13, 18 1, 7, 12 LVDS GND LVDS Ground

8 2 RxIN0- Inverting Channel 0 LVDS Serial Data Input

9 3 RxIN0+ Noninverting Channel 0 LVDS Serial Data Input

10 4 RxIN1- Inverting Channel 1 LVDS Serial Data Input

11 5 RxIN1+ Noninverting Channel 1 LVDS Serial Data Input

12 6 LVDS V

LVDS Supply Voltage

14 8 RxIN2- Inverting Channel 2 LVDS Serial Data Input

15 9 RxIN2+ Noninverting Channel 2 LVDS Serial Data Input

16 10 RxCLK IN- Inverting LVDS Parallel Rate Clock Input

17 11 RxCLK IN+ Noninverting LVDS Parallel Rate Clock Input

19, 21 13, 15 PLL GND PLL Ground

20 14 PLL V

PLL Supply Voltage

22 16 PWRDWN

5V Tolerant LVTTL/LVCMOS Power-Down Input. Internally pulled down to GND. Outputs are high impedance when PWRDWN = low or open.

23 17 RxCLK OUT

Parallel Rate Clock Single-Ended Output. MAX9210/MAX9212/MAX9214/MAX9216, rising edge strobe. MAX9220/MAX9222, falling edge strobe.

24, 26, 27, 29, 30, 31, 33

RxOUT0–

RxOUT6

Channel 0 Single-Ended Outputs

28, 36, 48 22, 30, 42 V

CCO

Output Supply Voltage

34, 35, 37, 39, 40, 41, 43

RxOUT7– RxOUT13

Channel 1 Single-Ended Outputs

42 36 V

Digital Supply Voltage

— EP EP Exposed Paddle. Solder to ground.

39, 40, 41, 43, 44, 46, 47

18, 20, 21, 23, 24, 25, 27

28, 29, 31, 33, 34, 35, 37

Detailed Description

The MAX9210/MAX9212/MAX9220 operate at a parallel clock frequency of 8MHz to 34MHz in DC-balanced mode and 10MHz to 40MHz in non-DC-balanced mode. The MAX9214/MAX9216/MAX9222 operate at a parallel clock frequency of 16MHz to 66MHz in DC-balanced mode and 20MHz to 85MHz in non-DC-balanced mode. The transition times of the single-ended outputs are increased on the MAX9210/MAX9212/ MAX9220 for reduced EMI.

DC-balanced or non-DC-balanced operation is controlled by the DCB/NC pin (see Table 1 for DCB/NC default settings and operating modes). In non-DC-balanced mode, each channel deserializes 7 bits every cycle of the parallel clock. In DC-balanced mode, 9 bits are deserialized every clock cycle (7 data bits + 2 DCbalance bits). The highest data rate in DC-balanced mode for the MAX9214, MAX9216, and MAX9222 is 66MHz x 9 = 594Mbps. In non-DC-balanced mode, the maximum data rate is 85MHz x 7 = 595Mbps.

DC Balance

Data coding by the MAX9209/MAX9211/MAX9213/ MAX9215 serializers (which are companion devices to the MAX9210/MAX9212/MAX9214/MAX9216/MAX9220/ MAX9222 deserializers) limits the imbalance of ones and zeros transmitted on each channel. If +1 is assigned to each binary 1 transmitted and -1 is assigned to each binary 0 transmitted, the variation in the running sum of assigned values is called the digital sum variation (DSV). The maximum DSV for the data channels is 10. At most, 10 more zeros than ones, or 10 more ones than zeros, are transmitted. The maximum DSV for the clock

MAX9210/MAX9212/MAX9214/MAX9216/MAX9220/MAX9222

Programmable DC-Balance 21-Bit Deserializers

6 _______________________________________________________________________________________

Figure 1. LVDS Input Circuits

Table 1. DC-Balance Programming

Figure 2. Worst-Case Test Pattern

DEVICE DCB/NC

MAX9210

MAX9212

MAX9214

MAX9216

MAX9220

MAX9222

High or open DC balanced 8 to 34

Low

High DC balanced 8 to34

Low or open

High or open DC balanced 16 to 66

Low

High DC balanced 16 to 66

Low or open

High or open DC balanced 8 to 34

Low

High or open DC balanced 16 to 66

Low

OUTPUT STROBE

EDGE

Rising

Falling

OPERATING MODE

Non-DC balanced 10 to 40

Non-DC balanced 20 to 85

Non-DC balanced 10 to 40

Non-DC balanced 20 to 85

OPERATING

FREQUENCY (MHz)

RIN2

RCIP

RxIN_ + OR

RxCLK IN+

RIN1

RxIN_ - OR

RxCLK IN-

RxIN_ + OR

RxCLK IN+

RIN1

RxIN_ - OR

RxCLK IN-

NON-DC-BALANCED MODE DC-BALANCED MODE

RxCLK OUT

ODD RxOUT

EVEN RxOUT

RISING EDGE STROBE SHOWN.

VCC - 0.3V

1.2V

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