The MAX900–MAX903 high-speed, low-power, single/
dual/quad voltage comparators feature differential analog inputs and TTL-logic outputs with active internal pullups. Fast propagation delay (8ns typ at 5mV overdrive)
makes the MAX900–MAX903 ideal for fast A/D converters and sampling circuits, line receivers, V/F converters,
and many other data-discrimination applications.
All comparators can be powered from separate analog
and digital power supplies or from a single combined supply voltage. The analog input common-mode range
includes the negative rail, allowing ground sensing when
powered from a single supply. The MAX900–MAX903
consume 18mW per comparator when powered from +5V.
The MAX900–MAX903 are equipped with independent
TTL-compatible latch inputs. The comparator output
states are held when the latch inputs are driven low. The
MAX901 provides the same performance as the
MAX900/MAX902/MAX903 with the exception of the
latches.
For newer, pin-for-pin compatible parts with the same
speed and only half the power dissipation, see the
MAX9201/MAX9202/MAX9203 data sheet.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
Analog Supply Voltage (VCCto VEE) ...................................+12V
Digital Supply Voltage (VDDto GND) ....................................+7V
Differential Input Voltage..................(V
EE
- 0.2V) to (VCC+ 0.2V)
Common-Mode Input Voltage..........(V
EE
- 0.2V) to (VCC+ 0.2V)
Latch-Input Voltage (MAX900/MAX902/
MAX903 only) .........................................-0.2V to (V
DD
+ 0.2V)
Output Short-Circuit Duration
To GND.......................................................................Indefinite
Note 1: The input common-mode voltage and input signal voltages should not be allowed to go negative by more than 0.2V below
V
EE
. The upper-end of the common-mode voltage range is typically VCC- 2V, but either or both inputs can go to a maximum
of VCC+ 0.2V without damage.
Note 2: Tested for +4.75V < V
CC
< +5.25V, and -5.25V < V
EE
< -4.75V with VDD= +5V, although permissible analog power-supply
range is +4.75V < V
CC
< +10.5V for single-supply operation with VEEgrounded.
Note 3: Specification does not apply to MAX901.
Note 4: Guaranteed by design. Times are for 100mV step inputs (see Propagation Delay Characteristics in Figures 2 and 3).
Note 5: Maximum difference in propagation delay between any of the four comparators in the MAX900–MAX903.
Note 6: See Timing Diagram (Figure 2). Owing to the difficult and critical nature of switching measurements involving the latch,
these parameters cannot be tested in a production environment. Typical specifications listed are taken from measurements
using a high-speed test-jig.
Note 7: I
CC
tested for +4.75V < VCC< +10.5V with VEEgrounded. IEEtested for -5.25V < VEE< -4.75V with VCC= +5V. IDDtested
for +4.75V < V
DD
< +5.25V with the worst-case condition of all four comparator outputs at logic low.
Because of the large gain-bandwidth transfer function of
the MAX900–MAX903, special precautions must be
taken to realize their full high-speed capability. A printed
circuit board with a good, low-inductance ground plane
is mandatory. All decoupling capacitors (the small
100nF ceramic type is a good choice) should be mounted as close as possible to the power-supply pins.
Separate decoupling capacitors for analog VCCand for
digital VDDare also recommended. Close attention
should be paid to the bandwidth of the decoupling and
terminating components. Short lead lengths on the
inputs and outputs are essential to avoid unwanted parasitic feedback around the comparators. Solder the
device directly to the printed circuit board instead of
using a socket.
Input Slew-Rate Requirements
As with all high-speed comparators, the high gain-bandwidth product of the MAX900–MAX903 can create oscillation problems when the input traverses the linear
region. For clean output switching without oscillation or
steps in the output waveform, the input must meet minimum slew-rate requirements. Oscillation is largely a
function of board layout and of coupled source impedance and stray input capacitance. Both poor layout and
large-source impedance will cause the part to oscillate
and increase the minimum slew-rate requirement. In
some applications, it may be helpful to apply some positive feedback between the output and + input. This
pushes the output through the transition region cleanly,
but applies a hysteresis in threshold seen at the input
terminals.
TTL Output and Latch Inputs
The comparator TTL-output stages are optimized for driving low-power Schottky TTL with a fan-out of four.
When the latch is connected to a logic high level or left
floating, the comparator is transparent and immediately
responds to changes at the input terminals. When the
latch is connected to a TTL low level, the comparator
output latches in the same state as at the instant that the
latch command is applied, and will not respond to subsequent changes at the input. No latch is provided on
the MAX901.
Power Supplies
The MAX900–MAX903 can be powered from separate
analog and digital supplies or from a single +5V supply.
The analog supply can range from +5V to +10V with
VEEgrounded for single-supply operation (Figures 1A
and 1B) or from a split ±5V supply (Figure 1C). The V
DD
digital supply always requires +5V.
In high-speed, mixed-signal applications where a common ground is shared, a noisy digital environment can
adversely affect the analog input signal. When set up
with separate supplies (Figure 1C), the
MAX900–MAX903 isolate analog and digital signals by
providing a separate AGND (VEE) and DGND.
between the two input terminals to obtain
TTL-logic threshold (+1.4V) at the
output.
Input Voltage Pulse Amplitude: Usually
set to 100mV for comparator
specifications.
Input Voltage Overdrive: Usually set to
5mV and in opposite polarity to V
comparator specifications.
Input-to-Output High Delay: The
propagation delay measured from the
time the input signal crosses the input
offset voltage to the TTL-logic threshold
of an output low-to-high transition
IN
for
t
pd+ (D)
t
pd- (D)
t
s
t
h
Latch Disable-to-Output High Delay:
The propagation delay measured from
the latch-signal crossing the TTL
threshold in a low-to-high transition to
the point of the output crossing TTL
threshold in a low-to-high transition.
Latch Disable-to-Output Low Delay:
The propagation delay measured from
the latch-signal crossing the TTL
threshold in a low-to-high transition to
the point of the output crossing TTL
threshold in a high-to-low transition.
Minimum Setup Time: The minimum
time before the negative transition of the
latch signal that an input signal change
must be present in order to be acquired
and held at the outputs.
Minimum Hold Time: The minimum time
after the negative transition of the latch
signal that an input signal must remain
unchanged in order to be acquired and
held at the output.
t
pd-
Input-to-Output Low Delay: The
propagation delay measured from the
time the input signal crosses the input
offset voltage to the TTL-logic threshold
of an output high-to-low transition.
tpw (D)Minimum Latch-Disable Pulse Width:
The minimum time that the latch signal
must remain high in order to acquire and
hold an input-signal change.
Figure 8. Alarm Circuit Level Monitors Eight Separate Inputs
Figure 7. Response to 100MHz Sine Wave Photo
Typical Application
Programmed, Variable-Alarm Limits
By combining two quad analog comparators with an
octal 8-bit D/A converter (the MX7228), several alarm
and limit-defect functions can be performed simultaneously without external adjustments
The MX7228’s internal latches allow the system
processor to set the limit points for each comparator
independently and update them at any time. Set the
upper and lower thresholds for a single transducer by
pairing the D/A converter and comparator sections.
OUTPUT
1V/div
OUTPUT
1V/div
INPUT
10mV/div
5ns/div
+1.25V
VREF
MSB
8-BIT
DATA
INPUT
MX7228
VDAC1
OCTAL
8-BIT
DAC
D7
8 x 8
DATA
LATCH
LSB
D1
V
OUT1
IN2
IN3
IN6
INPUT
10mV/div
5ns/div
IN1
UNDER
LIMIT
OVER
LIMIT
UNDER
LIMIT
IN4
MAX901
IN5
UNDER
LIMIT
UNDER
LIMIT
UNDER
LIMIT
OVER
IN7
A0
CONTROL
A1
A2
LOGIC
VDAC8
V
OUT8
IN8
MAX901
LIMIT
OVER
LIMIT
MAX900–MAX903
High-Speed, Low-Power Voltage Comparators
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
12 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600