The MAX8903A is an integrated 1-cell Li+ charger and
Smart Power Selector™ with dual (AC adapter and
USB) power inputs. The switch mode charger uses a
high switching frequency to eliminate heat and allow
tiny external components. It can operate with either
separate inputs for USB and AC adapter power, or from
a single input that accepts both. All power switches for
charging and switching the load between battery and
external power are included on-chip. No external
MOSFETs, blocking diodes, or current-sense resistors
are required.
The MAX8903A features optimized smart power control
to make the best use of limited USB or adapter power.
Battery charge current and SYS output current limit are
independently set. Power not used by the system
charges the battery. Charge current and SYS output
current limit can be set up to 2A while USB input current can be set to 100mA or 500mA. Automatic input
selection switches the system from battery to external
power. The DC input operates from 4.15V to 16V with
up to 20V protection, while the USB input has a range
of 4.1V to 6.3V with up to 8V protection.
The MAX8903A internally blocks current from the battery and system back to the DC and USB inputs when
no input supply is present. Other features include prequal charging and timer, fast charge timer, overvoltage
protection, charge status and fault outputs, power-OK
monitors, and a battery thermistor monitor. In addition,
on-chip thermal limiting reduces battery charge rate
and AC adapter current to prevent charger overheating. The MAX8903A is available in a 4mm x 4mm, 28-pin
thin QFN package.
Applications
PDAs, Palmtops, and Wireless Handhelds
Personal Navigation Devices
Smart Cell Phones
Portable Multimedia Players
Mobile Internet Devices
Ultra Mobile PCs
Features
♦ Efficient DC-DC Converter Eliminates Heat
♦ 4MHz Switching for Tiny External Components
♦ Instant On—Works with No Battery or Low
Battery
♦ Dual Current-Limiting Input Circuits—AC Adapter
or USB
Automatic Adapter/USB/Battery Switchover to
Support Load Transients
50mΩ System-to-Battery Switch
Supports USB Spec
= 4V, circuit of Figure 2, TA= -40°C to +85°C, unless otherwise noted. Typical values are at TA= +25°C.)
(Note 1)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ABSOLUTE MAXIMUM RATINGS
DC, LX, DCM to GND .............................................-0.3V to +20V
DC to SYS .................................................................-6V to +20V
BST to GND ...........................................................-0.3V to +26V
BST TO LX ................................................................-0.3V to +6V
USB to GND .............................................................-0.3V to +9V
USB to SYS..................................................................-6V to +9V
VL to GND ................................................................-0.3V to +6V
THM, IDC, ISET, CT to GND .........................-0.3V to (VL + 0.3V)
DOK, FLT, CEN, UOK, CHG, USUS,
BAT, SYS, IUSB, CS to GND ................................-0.3V to +6V
SYS to BAT ...............................................................-0.3V to +6V
PG, EP (exposed pad) to GND .............................-0.3V to +0.3V
DC Continuous Current (total in two pins)......................2.4A
RMS
USB Continuous Current.......................................................1.6A
LX Continuous Current (total in two pins).......................2.4A
RMS
CS Continuous Current (total in two pins) ......................2.4A
RMS
SYS Continuous Current (total in two pins) .......................3A
RMS
BAT Continuous Current (total in two pins) .......................3A
6BSTHigh-Side MOSFET Driver Supply. Bypass BST to LX with a 0.1µF ceramic capacitor.
7IUSB
8DOK
9VL
10CT
11IDC
12GNDGround. GND is the low-noise ground connection for the internal circuitry.
13ISET
14CEN
15USUS
Power Ground for Step-Down Low-Side Synchronous n-Channel MOSFET. Both PG pins must be
connected together externally.
DC Power Input. DC is capable of delivering up to 2A to SYS. DC supports both AC adapter and USB
inputs. The DC current limit is set through DCM, IUSB, or IDC depending on the input source used. See
Table 2. Both DC pins must be connected together externally. Connect at least a 4.7µF ceramic capacitor
from DC to PG.
Current-Limit Mode Setting for the DC Power Input. When logic-high, the DC input current limit is set by
the resistor at IDC. When logic-low, the DC input current limit is internally programmed to 500mA or
100mA, as set by the IUSB pin.
USB Current-Limit Set Input. Drive IUSB logic-low to set the USB current limit to 100mA. Drive IUSB logichigh to set the USB current limit to 500mA.
DC Power-OK Output. Active-low open-drain output pulls low when a valid input is detected at DC. DOK
is still valid when the charger is disabled (CEN high).
Logic LDO Output. VL is the output of an LDO that powers the MAX8903A internal circuitry and charges
the BST capacitor. Connect a 1µF ceramic capacitor from VL to GND.
Charge Timer Set Input. A capacitor (C
Connect to GND to disable the timer.
DC Current-Limit Set Input. Connect a resistor (R
step-down regulator from 0.5A to 2A when DCM is logic-high.
Charge Current Set Input. A resistor (R
The prequal charge current is 10% of the fast-charge current.
Charger Enable Input. Connect CEN to GND to enable battery charging when a valid source is connected
at DC or USB. Connect to VL, or drive high to disable battery charging.
USB Suspend Input. Drive USUS logic-high to enter USB suspend mode, lowering USB current to 115µA,
and internally shorting SYS to BAT.
) from CT to GND sets the fast-charge and prequal fault timers.
CT
) from IDC to GND to program the current limit of the
IDC
) from ISET to GND programs the fast-charge current up to 2A.
ISET
16THM
17USB
18FLT
19UOK
20, 21BAT
Thermistor Input. Connect a negative temperature coefficient (NTC) thermistor from THM to GND.
Connect a resistor equal to the thermistor +25°C resistance from THM to VL. Charging is suspended
when the thermistor is outside the hot and cold limits. Connect THM to GND to disable the thermistor
temperature sensor.
USB Power Input. USB is capable of delivering 100mA or 500mA to SYS as set by the IUSB logic input.
Connect a 4.7µF ceramic capacitor from USB to GND.
Fault Output. Active-low, open-drain output pulls low when the battery timer expires before prequal or
fast-charge completes.
USB Power-OK Output. Active-low, open-drain output pulls low when a valid input is detected at USB.
UOK is still valid when the charger is disabled (CEN high).
Battery Connection. Connect to a single-cell Li+ battery. The battery charges from SYS when a valid
source is present at DC or USB. BAT powers SYS when neither DC nor USB power is present, or when the
SYS load exceeds the input current limit. Both BAT pins must be connected together externally.
MAX8903A
2A 1-Cell Li+ DC-DC Charger for USB*
and Adapter Power
Charger Status Output. Active-low, open-drain output pulls low when the battery is in fast-charge or
prequal. Otherwise, CHG is high impedance.
System Supply Output. SYS connects to BAT through an internal 50mΩ system load switch when DC or
USB are invalid, or when the SYS load is greater than the input current limit.
When a valid voltage is present at DC or USB, SYS is limited to 4.4V. When the system load (I
exceeds the DC or USB current limit, SYS is regulated to 50mV below BAT, and both the powered input
and the battery service SYS.
Bypass SYS to GND with a 10µF X5R or X7R ceramic capacitor. Both SYS pins must be connected
together externally.
70mΩ Current-Sense Input. Connect the step-down inductor from LX to CS. When the step-down
regulator is on, there is a 70mΩ current-sense MOSFET from CS to SYS. When the step-down regulator is
off, the internal CS MOSFET turns off to block current from SYS back to DC.
SYS
)
27, 28LX
—EP
Inductor Connection. Connect the inductor between LX and CS. Both LX pins must be connected together
externally.
Exposed Pad. Connect the exposed pad to GND. Connecting the exposed pad does not remove the
requirement for proper ground connections to the appropriate pins.
The MAX8903A is a dual input charger with a 16V input
for a wide range of DC sources and USB inputs. The IC
includes a high-voltage (16V) input DC-DC step-down
converter that reduces charger power dissipation while
also supplying power to the system load. The stepdown converter supplies up to 2A to the system, the
battery, or a combination of both.
A USB charge input can charge the battery and power
the system from a USB power source. When powered
from USB or the DC input, system load current peaks
that exceed what can be supplied by the input are supplemented by the battery.
The MAX8903A also manages load switching from the
battery to and from an external power source with an
on-chip 50mΩ MOSFET. This switch also helps support
load peaks using battery power when the input source
is overloaded.
Figure 2. Typical Application Circuit Using a Separate DC and USB Connector
The IC includes a full-featured charger with thermistor
monitor, fault timer, charger status, and fault outputs.
Also included are power-OK signals for both USB and
DC. Flexibility is maintained with adjustable charge
current, input current limit, and a minimum system voltage (when charging is scaled back to hold the system
voltage up).
The MAX8903A prevents overheating during high ambient temperatures by limiting charging current when the
die temperature exceeds +100°C.
DC Input—Fast Hysteretic
Step-Down Regulator
If a valid DC input is present, the USB power path is
turned off and power for SYS and battery charging is
supplied by the high-frequency step-down regulator
from DC. If the battery voltage is above the minimum
system voltage (V
SYSMIN
, Figure 4), the battery charger
connects the system voltage to the battery for lowest
power dissipation. The step-down regulation point is
then controlled by three feedback signals: maximum
Figure 3. Typical Application Circuit Using a Mini 5 Style Connector or Other DC/USB Common Connector
SERIES
MINI-B
VBUS
GND
D-
D+
ID
4.7μF
TO SYSTEM LOGIC
OFF
CHARGE ON
500mA
100mA
USB SUSPEND
C
DC
C
BST
0.1μF
L1
1μH
0.15μF
R
PU
4 x 100kΩ
1
PG
2
PG
MAX8903A
3
DC
DC
4
6
BST
LX
27
LX
28
CS
25
CS
26
17 USB
5
DCM
14
CEN
7
IUSB
15
USUS
10
C
CT
CT
FLT
UOK
DOK
CHG
ISET
SYS
SYS
BAT
BAT
THM
GND
IDC
18
19
8
22
R
ISET
13
R
IDC
11
24
C
C
1μF
SYS
10μF
C
BAT
10μF
VL
23
21
20
9
VL
16
12
RT
10kΩ
NTC
10kΩ
TO VL
FAULT
OUTPUT
USB PWR OK
DC PWR OK
CHARGE
INDICATOR
TO SYSTEM
LOAD
1-CELL
LI+
MAX8903A
2A 1-Cell Li+ DC-DC Charger for USB*
and Adapter Power
step-down output current programmed at IDC, maximum charger current programmed at ISET, and maximum die temperature. The feedback signal requiring
the smallest current controls the average output current
in the inductor. This scheme minimizes total power dissipation for battery charging and allows the battery to
absorb any load transients with minimum system voltage disturbance.
If the battery voltage is below V
SYSMIN
, the charger
does not directly connect the system voltage to the battery. V
SYS
pin is held at a fixed point slightly above
V
SYSMIN
, and does not track the battery. The battery
charger independently controls the battery charging
current. V
SYSMIN
is set to 3.0V in the MAX8903A, for
other V
SYSMIN
values, please contact the factory.
After the battery charges to 50mV above V
SYSMIN
, the
system voltage is connected to the battery. The battery
fast-charge current then controls the step-down converter to set the average inductor current so that both
the programmed input current limit and fast-charge current limit are satisfied.
DC-DC Step-Down Control Scheme
A proprietary hysteretic current PWM control scheme
ensures fast switching and physically tiny external components. The feedback control signal that requires the
smallest input current controls the center of the peak
and valley currents in the inductor. The ripple current is
internally set to provide 4MHz operation. When the
input voltage decreases near the output voltage, very
high duty cycle occurs and, due to minimum off-time,
4MHz operation is not achievable. The controller then
provides minimum off-time, peak current regulation.
Similarly, when the input voltage is too high to allow
4MHz operation due to the minimum on-time, the controller becomes a minimum on-time, valley current regulator. In this way, ripple current in the inductor is always
as small as possible to reduce ripple voltage on SYS for
a given capacitance. The ripple current is made to vary
with input voltage and output voltage in a way that
reduces frequency variation. However, the frequency
still varies somewhat with operating conditions. See the
Typical Operating Characteristics
.
DC Input—USB mode
When powering from DC with DCM set to logic-low, the
DC input is set to USB mode. The input current limit from
DC is then internally set to 500mA max if IUSB is high
and 100mA max if IUSB is low. For the 500mA case, the
DC input continues to operate as a step-down regulator
to minimize thermal heating. For the 100mA case, the
Table 1. External Components List for Figures 2 and 3
step-down regulator is turned off and a low-dropout linear regulator is connected between DC and SYS.
USB Input—Linear Regulator
If a valid USB input is present with no valid DC input,
current for SYS and battery charging is supplied by a
low-dropout linear regulator connected from USB to
SYS. The SYS regulation voltage shows the same characteristic as when powering from the DC input (see
Figure 4). The battery charger operates from SYS with
any extra available current, while not exceeding the
maximum-allowed USB current. If both USB and DC
inputs are valid, power is only taken from the DC input.
The maximum USB input current is set by the logic
state of the IUSB input to either 100mA or 500mA.
Power Monitor Outputs (
UOK, DOK
)
DOK is an open-drain, active-low output that indicates
the DC input power status. With no source at the USB
pin, the source at DC is considered valid and DOK is
driven low when: 4.15V < VDC< 16V. When the USB
voltage is also valid, the DC source is considered valid
and DOK is driven low when: 4.45V < VDC< 16V. The
higher minimum DC voltage with USB present helps
guarantee cleaner transitions between input supplies. If
the DC power-OK output feature is not required, connect DOK to ground.
UOK is an open-drain, active-low output that indicates
the USB input power status. UOK is low when a valid
source is connected at USB. The source at USB is valid
when 4.1V < V
USB
< 6.6V. If the USB power-OK output
feature is not required, connect UOK to ground.
Both the UOK and the DOK circuitry remain active in
thermal overload, USB suspend, and when the charger
is disabled. DOK and UOK can also be wire-ORed
together to generate a single power-OK (POK) output.
Thermal Limiting
When the die temperature exceeds +100°C, a thermal
limiting circuit reduces the input current limit by 5%/°C,
bringing the charge current to 0mA at +120°C. Since
the system load gets priority over battery charging, the
battery charge current is reduced to 0mA before the
input limiter drops the load voltage at SYS. To avoid
false charge termination, the charge termination detect
function is disabled in this mode. If the junction temperature rises beyond +120°C, no current is drawn from
DC or USB, and V
SYS
regulates at 50mV below V
BAT
.
System Voltage Switching
DC Input
When charging from the DC input, if the battery is
above the minimum system voltage, SYS is connected
to the battery. Current is provided to both SYS and the
battery, up to the maximum program value. The stepdown output current sense and the charger current
sense provide feedback to ensure the current loop
demanding the lower input current is satisfied. The
advantage of this approach when powering from DC is
that power dissipation is dominated by the step-down
regulator efficiency, since there is only a small voltage
drop from SYS to BAT. Also, load transients can be
absorbed by the battery while minimizing the voltage
disturbance on SYS. If both the DC and USB inputs are
valid, the DC input takes priority and delivers the input
current, while the USB input is off.
After the battery is done charging, the charger is turned
off and the SYS load current is supplied from the DC
input. The SYS voltage is regulated to 4.4V. The charger turns on again after the battery drops to the restart
threshold. If the load current exceeds the input limiter,
SYS drops down to the battery voltage and the 50mΩ
SYS-to-BAT PMOS switch turns on to supply the extra
load current. The SYS-to-BAT switch turns off again
once the load is below the input current limit. The 50mΩ
PMOS also turns on if valid DC input power is removed.
USB Input
When charging from the USB input, the DC input stepdown regulator turns off and a linear regulator from
USB to SYS powers the system and charges the battery. If the battery is greater than the minimum system
voltage, the SYS voltage is connected to the battery.
The USB input then supplies the SYS load and charges
the battery with any extra available current, while not
exceeding the maximum-allowed USB current. Load
transients can be absorbed by the battery while minimizing the voltage disturbance on SYS. When battery
charging is completed, or the charger is disabled, SYS
is regulated to 4.4V. If both USB and DC inputs are
valid, power is only taken from the DC input.
USB Suspend
Driving USUS high turns off charging as well as the SYS
output and reduces input current to 170µA to accommodate USB suspend mode.
Charge Enable (
CEN
)
When CEN is low, the charger is on. When CEN is high,
the charger turns off. CEN does not affect the SYS output. In many systems, there is no need for the system
controller (typically a microprocessor) to disable the
charger, because the MAX8903A smart power selector
circuitry independently manages charging and
adapter/battery power hand-off. In these situations,
CEN may be connected to ground.
MAX8903A
2A 1-Cell Li+ DC-DC Charger for USB*
and Adapter Power
To prevent input transients that can cause instability in
the USB or AC adapter power source, the rate of
change of the input current and charge current is limited. When an input source is valid, SYS current is
ramped from zero to the set current-limit value in typically 50µs. This also means that if DC becomes valid
after USB, the SYS current limit is ramped down to zero
before switching from the USB to DC input. At some
point, SYS is no longer able to support the load and
may switch over to BAT. The switchover to BAT occurs
when V
SYS
< V
BATT
. This threshold is a function of the
SYS capacitor size and SYS load. The SYS current limit
then ramps from zero to the set current level and SYS
supports the load again as long as the SYS load current
is less than the set current limit.
When the charger is turned on, the charge current ramps
from 0A to the ISET current value in typically 1.0ms.
Charge current also soft-starts when transitioning to fastcharge from prequal, when the input power source is
switched between USB and DC, and when changing the
USB charge current from 100mA to 500mA with the IUSB
logic input. There is no di/dt limiting, however, if R
ISET
is
changed suddenly using a switch.
Battery Charger
While a valid input source is present, the battery charger can attempt to charge the battery with a fast-charge
current determined by the resistance at the ISET pin:
R
ISET
= 1200/I
CHG-MAX
Monitoring Charge Current
The voltage from ISET to GND is a representation of the
battery charge current and can be used to monitor the
current charging the battery. A voltage of 1.5V represents the maximum fast-charge current.
If necessary, the charge current is reduced automatically to prevent the SYS voltage from dropping.
Therefore, a battery never charges at a rate beyond the
capabilities of a 100mA or 500mA USB input, or overloads an AC adapter. See Figure 5.
Table 2. Input Limiter Control Logic
**
Charge current cannot exceed the input current limit. Charge may be less than the maximum charge current if the total SYS load
is below 3V, the charger enters prequal
mode and the battery charges at 10% of the maximum
fast-charge rate until the voltage of the deeply discharged battery recovers. When the battery voltage
reaches 4.2V and the charge current drops to 10% of
the maximum fast-charge current, the charger enters
the DONE state. The charger restarts a fast-charge
cycle if the battery voltage drops by 100mV.
Charge Termination
When the charge current falls to the termination threshold (I
TERM
) and the charger is in voltage mode, charging is complete. Charging continues for a brief 15s
top-off period and then enters the DONE state where
charging stops.
Note that if charge current falls to I
TERM
as a result of
the input or thermal limiter, the charger does not enter
DONE. For the charger to enter DONE, charge current
must be less than I
TERM
, the charger must be in voltage mode, and the input or thermal limiter must not be
reducing charge current.
Charge Status Outputs
Charge Output (CHG)
CHG is an open-drain, active-low output that indicates
charger status. CHG is low when the battery charger is
in its prequalification and fast-charge states. CHG goes
high impedance if the thermistor causes the charger to
go into temperature suspend mode.
When used in conjunction with a microprocessor (µP),
connect a pullup resistor between CHG and the logic
I/O voltage to indicate charge status to the µP.
Alternatively, CHG can sink up to 20mA for an LED
charge indicator.
Fault Output (FLT)
FLT is an open-drain, active-low output that indicates
charger status. FLT is low when the battery charger has
entered a fault state when the charge timer expires.
This can occur when the charger remains in its prequal
state for more than 33 minutes or if the charger remains
in fast-charge state for more than 660 minutes (see
Figure 6). To exit this fault state, toggle CEN or remove
and reconnect the input source.
When used in conjunction with a microprocessor (µP),
connect a pullup resistor between FLT and the logic I/O
voltage to indicate charge status to the µP.
Alternatively, FLT can sink up to 20mA for an LED fault
indicator. If the FLT output is not required, connect FLT
to ground or leave unconnected.
Charge Timer
A fault timer prevents the battery from charging indefinitely. The fault prequal and fast-charge timers are controlled by the capacitance at CT (CCT).
While in fast-charge mode, a large system load or device
self-heating may cause the MAX8903A to reduce charge
current. Under these circumstances, the fast-charge
timer is slowed by 2x if the charge current drops below
50% of the programmed fast-charge level, and suspended if the charge current drops below 20% of the programmed level. The fast-charge timer is not affected at
any current if the charger is regulating the BAT voltage
at 4.2V (i.e., the charger is in voltage mode).
Thermistor Input (THM)
The THM input connects to an external negative temperature coefficient (NTC) thermistor to monitor battery
or system temperature. Charging is suspended when
the thermistor temperature is out of range. The charge
timers are suspended and hold their state but no fault is
indicated. When the thermistor comes back into range,
Figure 5. Monitoring the Battery Charge Current with the
Voltage from ISET to GND
MONITORING THE BATTERY
CHARGE CURRENT WITH V
1.5
(V)
V
ISET
0
DISCHARGING
0
BATTERY CHARGING CURRENT (A)
ISET
1200/R
ISET
C
t
PREQUAL
t
FST CHG
−
ts
TOP OFF
−
min
=×
33
min
660
=×
15
=
CT
.
015
C
.μμ
015
F
CT
F
MAX8903A
2A 1-Cell Li+ DC-DC Charger for USB*
and Adapter Power
charging resumes and the charge timer continues from
where it left off. Connecting THM to GND disables the
thermistor monitoring function. Table 4 lists the fault
temperature of different thermistors.
Since the thermistor monitoring circuit employs an
external bias resistor from THM to VL (R
TB
, Figure 7),
the thermistor is not limited only to 10kΩ (at +25°C).
Any resistance thermistor can be used as long as the
value is equivalent to the thermistor’s +25°C resistance.
For example, with a 10kΩ at +25°C thermistor, use
10kΩ at R
TB
, and with a 100kΩ at +25°C thermistor,
use 100kΩ .
For a typical 10kΩ (at +25°C) thermistor and a 10kΩ
RTBresistor, the charger enters a temperature suspend
Figure 6. MAX8903A Charger State Flow Chart
V
< 2.8V
BATT
RESET TIMER
ANY CHARGING
STAT E
THM OK
TIMER RESUME
TEMPERATURE SUSPEND
UOK OR DOK PREVIOUS STATE
= 0mA
I
CHG
CHG = HIGH IMPEDANCE
FLT = HIGH IMPEDANCE
THM NOT OK
TIMER SUSPEND
NOT READY
UOK AND DOK = HIGH IMPEDANCE
CHG = HIGH IMPEDANCE
FLT = HIGH IMPEDANCE
= 0mA
I
CHG
PREQUALIFICATION
UOK AND/OR DOK = LOW
CHG = LOW
FLT = HIGH IMPEDANCE
0 < V
BAT
≤ I
I
CHG
CHGMAX
V
< 2.82V
BATT
RESET TIMER = 0
FAST-CHARGE
UOK AND/OR DOK = LOW
CHG = LOW
FLT = HIGH IMPEDANCE
3V < V
BAT
≤ I
I
CHG
CHGMAX
> I
I
CHG
TERM
RESET TIMER
TOP-OFF
UOK AND/OR DOK = LOW
CHG = HIGH IMPEDANCE
FLT = HIGH IMPEDANCE
VBAT = 4.2V
= I
I
CHG
DONE
UOK AND/OR DOK = 0
CHG = HIGH IMPEDANCE
FLT = HIGH IMPEDANCE
4.1V < V
BAT
= 0mA
I
CHG
UOK AND/OR DOK = LOW
CEN = 0
RESET TIMER
< 3V
/10
V
> 3.0V
BATT
RESET TIMER
< 4.2V
I
CHG
AND V
AND THERMAL
OR INPUT LIMIT
NOT EXCEEDED;
RESET TIMER
TERM
TIMER > 15s
< 4.2V
CEN = HI OR
REMOVE AND RECONNECT
THE INPUT SOURCE(S)
state when the thermistor resistance falls below 3.97kΩ
(too hot) or rises above 28.7kΩ (too cold). This corresponds to a 0°C to +50°C range when using a 10kΩ
NTC thermistor with a beta of 3500. The general relation
of thermistor resistance to temperature is defined by
the following equation:
where:
R
T
= The resistance in Ω of the thermistor at tempera-
ture T in Celsius
R25= The resistance in Ω of the thermistor at +25°C
ß = The material constant of the thermistor, which typically ranges from 3000K to 5000K
T = The temperature of the thermistor in °C
Table 4 shows the MAX8903A THM temperature limits
for different thermistor material constants.
Some designs might prefer other thermistor temperature limits. Threshold adjustment can be accommodated by changing RTB, connecting a resistor in series
and/or in parallel with the thermistor, or using a thermistor with different ß. For example, a +45°C hot threshold
and 0°C cold threshold can be realized by using a thermistor with a ß of 4250 and connecting 120kΩ in parallel. Since the thermistor resistance near 0°C is much
higher than it is near +50°C, a large parallel resistance
lowers the cold threshold, while only slightly lowering
the hot threshold. Conversely, a small series resistance
Figure 7. Thermistor Monitor Circuitry
Table 3. Fault Temperatures for Different
Thermistors
CEN
THERMISTOR
CIRCUITRY
VL
VL
MAX8903A
ALTERNATE
THERMISTOR
CONNECTION
RTS
R
T
RTP
RTB
0.74 VL
THM
0.28 VL
R
T
0.03 VL
GND
Thermistor ß (K)30003250350037504250
RTB (kΩ) (Figure 7)1010101010
Resistance at +25°C
(kΩ)
Resistance at +50°C
(kΩ)
Resistance at 0°C (kΩ) 25.14 27.15 29.32 31.66 36.91
Nominal Hot Trip
Temperature (°C)
Nominal Cold Trip
Temperature (°C)
1010101010
4.594.304.033.783316
5553504946
-3-1024.5
COLD
THM
OUT OF
RANGE
DISABLE
CHARGER
⎧
β
⎨
25
⎩
RR e
=×
T
⎛
⎜
⎝
T
+
1
−
2731298
⎫
⎞
⎟
⎬
⎠
⎭
ALL COMPARATORS
60mV HYSTERESIS
HOT
ENABLE THM
MAX8903A
2A 1-Cell Li+ DC-DC Charger for USB*
and Adapter Power
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
20
____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
raises the cold threshold, while only slightly raising the
hot threshold. Raising RTBlowers both the hot and cold
thresholds, while lowering R
TB
raises both thresholds.
Note that since VL is active whenever valid input power
is connected at DC or USB, thermistor bias current
flows at all times, even when charging is disabled (CEN
= high). When using a 10kΩ thermistor and a 10kΩ
pullup to VL, this results in an additional 250µA load.
This load can be reduced to 25µA by instead using a
100kΩ thermistor and 100kΩ pullup resistor.
Power Dissipation
PCB Layout and Routing
Good design minimizes ground bounce and voltage
gradients in the ground plane, which can result in instability or regulation errors. The GND and PGs should
connect to the power-ground plane at only one point to
minimize the effects of power-ground currents. Battery
ground should connect directly to the power-ground
plane. The ISET and IDC current-setting resistors
should connect directly to GND to avoid current errors.
Connect GND to the exposed pad directly under the IC.
Use multiple tightly spaced vias to the ground plane
under the exposed pad to help cool the IC. Position
input capacitors from DC, SYS, BAT, and USB to the
power-ground plane as close as possible to the IC.
Keep high current traces such as those to DC, SYS,
and BAT as short and wide as possible. Refer to the
MAX8903A Evaluation Kit for a suitable PCB layout
example.
Table 4. Package Thermal Characteristics
Pin Configuration
Chip Information
PROCESS: BiCMOS
Package Information
For the latest package outline information and land patterns, go
to www.maxim-ic.com/packages
.
PACKAGE TYPEPACKAGE CODEDOCUMENT NO.
28 TQFN-EPT2844-1
21-0139
28-PIN 4mm x 4mm THIN QFN
SINGLE-LAYER PCBMULTILAYER PCB
Continuous
Power
Dissipation
θ
JA
θ
JC
1666.7mW
Derate 20.8mW/°C
above +70°C
48°C/W35°C/W
3°C/W3°C/W
2286mW
Derate 28.6mW/°C
above +70°C
TOP VIEW
22
CHG
SYS
23
24
SYS
25
26
CS
27
LX
28
LX
*EXPOSED PAD
+
12CS4567
UOK
BAT
FLT
BAT
20211917 16 15
MAX8903A
3
PG
PG
THIN QFN
4mm x 4mm
USB
18
DC
DC
DCM
*EP
THM
BST
USUS
IUSB
14
CEN
ISET
13
12
GND
IDC
11
10
CT
VL
9
8
DOK
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