Rainbow Electronics MAX6963 User Manual
General Description
The MAX6960–MAX6963 are compact cathode-row display drivers that interface microprocessors to 8 x 8 dotmatrix red, green, and yellow (R,G,Y) LED displays
through a high-speed 4-wire serial interface.
The MAX6960–MAX6963 drive two monocolor 8 x 8
matrix displays, or a single RGY 8 x 8 matrix display with
no external components. The driver can also be used
with external pass transistors to control red, green, blue
(RGB) and other displays at higher currents and voltages.
The MAX6960–MAX6963 feature open- and short-circuit
LED detection, and provide both analog and digital tile
segment current calibration to allow 8 x 8 displays from
different batches to be compensated or color matched.
A local 3-wire bus synchronizes multiple interconnected
MAX6960–MAX6963s and automatically allocates memory
map addresses to suit the user’s display-panel
architecture.
The MAX6960–MAX6963s’ 4-wire interface connects multiple drivers, with display memory mapping shared and
allocated among the drivers. A single global write operation can send a command to all MAX6960s in a panel.
The MAX6963 drives monocolor displays with two-step
intensity control. The MAX6962 drives monocolor displays
with two-step or four-step intensity control. The MAX6961
drives monocolor or RGY displays with two-step intensity
control. The MAX6960 drives monocolor or RGY displays
with two-step or four-step intensity control.
Features
♦ 2.7V to 3.6V Operation
♦ High-Speed 20MHz Serial Interface
♦ Trimmed 40mA or 20mA Peak Segment Current
♦ Directly Drives Either Two Monocolor or One RGY
Cathode-Row 8 x 8 Matrix Displays
♦ Analog Digit-by-Digit Segment Current Calibration
♦ Digital Digit-by-Digit Segment Current Calibration
♦ 256-Step Panel Intensity Control (All Drivers)
♦ Four Steps per Color Pixel-Level Intensity Control
♦ Open/Short LED Detection
♦ Burst White to Display Memory Planes
♦ Global Command Access All Devices
♦ Can Control RGB Panels or Higher
Current/Voltage Panels with External Pass
Transistors
♦ Multiple Display Data Planes Ease Animation
♦ Automatic Plane Switching from 63 Planes per
Second to One Plane Every 63s, with Interrupt
♦ Slew-Rate-Limited Segment Drivers for Lower EMI
♦ Driver Switching Timing Can Be Spread Between
Multiple Drivers to Flatten Power-Supply Peak
Demand
♦ Low-Power Shutdown with Full Data Retention
♦ -40°C to +125°C Temperature Range
MAX6960–MAX6963
4-Wire Serially Interfaced
8 x 8 Matrix Graphic LED Drivers
________________________________________________________________ Maxim Integrated Products 1
Ordering Information
19-3696; Rev 0; 7/05
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
Pin Configurations continued at end of data sheet.
PART
PIN-PACKAGE
PKG
CODE
M A X6 9 6 0AM H
44 MQFP —
M AX6960ATH
44 TQFN *
T4477- 3
M A X6 9 6 1AM H
44 MQFP —
M AX6961ATH
44 TQFN *
T4477-3
M A X6 9 6 2AM H
44 MQFP —
M AX6962ATH
44 TQFN *
T4477-3
M A X6 9 6 3AM H
44 MQFP —
M AX6963ATH
44 TQFN *
T4477-3
COL13
COL12
COL11
COL10
COL9
V+
COL8
COL7
COL6
COL5
COL4
1
2
3
4
5
6
7
8
9
10
11
1213141516171819202122
4443424140393837363534
33
32
31
30
29
28
27
26
25
24
23
GND
OSC
CS
DIN
DOUT
CLK
RST
COL1
COL2
COL3
V+
GND
RISET1
RISET0
ADDCLK
ADDIN
ADDOUTV+COL16
COL15
COL14
V+
MQFP
MAX6960-MAX6963
TOP VIEW
Pin Configurations
Applications
Message Boards Industrial Controls
Gaming Machines Audio/Video Equipment
*EP = Exposed pad.
TEMP RANGE
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
MAX6960–MAX6963
4-Wire Serially Interfaced
8 x 8 Matrix Graphic LED Drivers
2 _______________________________________________________________________________________
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS
(V+ = 2.7V to 3.6V, TA= T
MIN
to T
MAX
, typical values at V+ = 3.3V, TA= +25°C, unless otherwise noted.) (Note 1)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
Voltage (with respect to GND)
V+ .............................................................................-0.3V to +4V
All Other Pins................................................-0.3V to (V+ + 0.3V)
ROW1–ROW8 Sink Current ..............................................750mA
COL1–COL16 Source Current ...........................................48mA
Continuous Power Dissipation (T
A
= +70°C)
44-Pin MQFP
(derate 12.7 mW/°C over +70°C)...............................1012mW
44-Pin TQFN
(derate 27mW/°C over +70°C)...................................2162mW
Operating Temperature Range
(T
MIN
to T
MAX
) ..............................................-40°C to +125°C
Junction Temperature......................................................+150°C
Storage Temperature Range .............................-65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
PARAMETER
CONDITIONS
UNITS
Operating Supply Voltage V+ 2.7 3.6 V
TA = +25°C
375
500Shutdown Supply Current I
SHDN
Shutdown mode, all
digital inputs at V+
or GND
T
A
= T
MIN
to T
MAX
600
µA
TA = +25°C 7.5 9
10Operating Supply Current I+
Intensity set to full,
no display load
connected
T
A
= T
MIN
to T
MAX
11
mA
Master Clock Frequency f
OSC
1 8.5
MHz
Dead-Clock Protection
Frequency
f
OSC
50
200 kHz
OSC High Time t
CH
40 ns
OSC Low Time t
CL
40 ns
TA = +25°C 384042
37 43
V
LED
= 2.3V, V+ =
3.15V to 3.6V,
current = high
T
A
= T
MIN
to T
MAX
37 44
TA = +25°C 192021
Anode Column Source Current
COL1–COL16
I
SEG
V
LED
= 2.3V, V+ =
2.7V to 3.6V, current
= low
T
A
= T
MIN
to T
MAX
22
mA
V
LED
= 2.3V, V+ = 3.15V to 3.6V,
current = high
Anode Column Source-Current
Temperature Variation
COL1–COL16
I
TC
V
LED
= 2.2V, V+ = 2.7V to 3.3V,
current = low
ppm/°C
Segment Current Slew Rate
TA = +25°C30
mA/µs
SYMBOL
MIN TYP MAX
250
TA = T
to +85°C
MIN
TA = T
to +85°C
MIN
90.5
∆I
/∆t
SEG
TA = T
to +85°C
MIN
TA = T
to +85°C 18.5 21.5
MIN
18.5
200
200
MAX6960–MAX6963
4-Wire Serially Interfaced
8 x 8 Matrix Graphic LED Drivers
_______________________________________________________________________________________ 3
ELECTRICAL CHARACTERISTICS (continued)
(V+ = 2.7V to 3.6V, TA= T
MIN
to T
MAX
, typical values at V+ = 3.3V, TA= +25°C, unless otherwise noted.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
LOGIC INPUTS AND OUTPUTS
Input Leakage Current
DIN, CLK, CS, OSC, ADDIN,
ADDCLK, RST
I
IH
, I
IL
nA
Logic-High Input Voltage
DIN, CLK, CS, OSC, ADDIN,
ADDCLK
V
IHI
0.7 x
V+
V
Logic-Low Input Voltage
DIN, CLK, CS, OSC, ADDIN,
ADDCLK
V
ILO
0.3 x
V+
V
Logic-High Input Voltage RST V
IHR
0.95 x
V+
V
Logic-Low Input Voltage RST V
ILR
0.4 x
V+
V
t
FTDO
C
LOAD
= 100pF 10 ns
DOUT Output High Voltage V
OHDOISOURCE
= 20mA
V+ -
0.3
V
DOUT Output Low Voltage V
OLDOISINK
= 20mA 0.3 V
ADDOUT Output High Voltage
I
SOURCE
= 500µA
V+ -
0.3
V
ADDOUT Output Low Voltage
I
SINK
= 500µA 0.3 V
ADDCLK Output High Voltage
I
SOURCE
= 2.5mA
V+ -
0.3
V
ADDCLK Output Low Voltage
I
SINK
= 2.5mA 0.3 V
TIMING CHARACTERISTICS
CLK Clock Period t
CP
50 ns
CLK Pulse-Width High t
CH
22 ns
CLK Pulse-Width Low t
CL
22 ns
CS Fall to CLK Rise Setup Time t
CSS
ns
CLK Rise to CS Rise Hold Time t
CSH
0ns
DIN Setup Time t
DS
ns
DIN Hold Time t
DH
10 ns
Output Data Propagation Delay t
DO
22 ns
Minimum CS Pulse High t
CSW
25 ns
Note 1: All parameters tested at TA= +25°C. Specifications over temperature are guaranteed by design.
DOUT Output Rise and Fall Times
V
OHADO
V
OLADO
V
OHACK
V
OLACK
-200 +20 +200
12.5
12.5
MAX6960–MAX6963
4-Wire Serially Interfaced
8 x 8 Matrix Graphic LED Drivers
4 _______________________________________________________________________________________
Typical Operating Characteristics
(TA = +25°C, unless otherwise noted.)
OPERATING SUPPLY CURRENT
vs. TEMPERATURE
MAX6960 toc01
TEMPERATURE (°C)
SUPPLY CURRENT (mA)
925926-7
7.2
7.4
7.6
7.8
8.0
7.0
-40 125
3.6V
3.3V
2.7V
SHUTDOWN SUPPLY CURRENT
vs. TEMPERATURE
MAX6960 toc02
TEMPERATURE (°C)
SUPPLY CURRENT (mA)
925926-7
0.1
0.2
0.3
0.4
0
-40 125
3.6V
3.3V
2.7V
DEAD-CLOCK OSCILLATOR
vs. SUPPLY VOLTAGE
MAX6960 toc03
SUPPLY VOLTAGE (V)
DEAD-CLOCK OSCILLATOR
3.383.162.942.72
85
90
95
100
80
2.50 3.60
+25°C
-40°C
+125°C
PEAK-OUTPUT SOURCE CURRENT
vs. SUPPLY VOLTAGE (HIGH-CURRENT MODE)
MAX6960 toc04
SUPPLY VOLTAGE (V)
PEAK-OUTPUT CURRENT (mA)
3.43.12.8
37
39
41
43
45
35
2.5 3.7
2.3V LED
PEAK-OUTPUT SOURCE CURRENT
vs.SUPPLY VOLTAGE (LOW-CURRENT MODE)
MAX6960 toc05
SUPPLY VOLTAGE (V)
PEAK-OUTPUT CURRENT (mA)
3.53.33.12.92.7
18
19
20
21
22
17
2.5 3.7
2.2V LED
PEAK-OUTPUT SOURCE CURRENT
vs. TEMPERATURE (HIGH-CURRENT MODE)
MAX6960 toc06
TEMPERATURE (°C)
PEAK-OUTPUT CURRENT (mA)
925926-7
39.6
40.0
40.4
40.8
39.2
-40 125
2.3V LED
3.6V
3.3V
3.15V
Typical Operating Characteristics
MAX6960–MAX6963
4-Wire Serially Interfaced
8 x 8 Matrix Graphic LED Drivers
_______________________________________________________________________________________ 5
Pin Description
PIN
NAME FUNCTION
1, 6, 11,
1, 6, 11,
GND Ground
LE D C athod e D r i ve r s. ROW 1 to RO W 8 outp uts si nk cur r ent fr om the d i sp l ay' s cathod e r ow s.
13 13 OSC Multiplex Clock Input. Drive OSC with a 1MHz to 8.5MHz CMOS clock.
14 14 CS
Chip-Select Input. Serial data is loaded into the shift register when CS is low. Data is
loaded into the data latch on CS's rising edge.
15 15 DIN
Serial-Data Input. Data from DIN loads into the internal shift register on CLK's rising edge.
16 16 DOUT Serial-Data Output. The output is tri-state.
17 17 CLK Serial-Clock Input. On CLK's rising edge data shifts into the internal shift register.
18 18 RST
Reset Input. Hold RST low until at least 50ms after all interconnected MAX6960s are
powered up.
19, 20,
21,
23–27,
29–33,
35, 36,
37
19, 20,
21,
23–27,
29–33,
35, 36,
37
LED Anode Drivers. COL1 to COL16 outputs source current into the display's anode
columns.
22, 28,
22, 28,
V+
Positive Supply Voltage. Bypass V+ to GND with a single 47µF bulk capacitor per chip
plus a 0.1µF ceramic capacitor per V+.
39 39 ADDOUT
Address-Data Output. Connect ADDOUT to ADDIN of the next MAX6960. Use ADDOUT of
the last MAX6960 as a plane change interrupt output.
40 40 ADDIN
Address-Data Input. For first MAX6960, connect ADDIN to V+. For other MAX6960s,
connect ADDIN to ADDOUT of the preceding MAX6960.
41 41 ADDCLK
Address-Clock Input/Output. Connect ADDCLK of all MAX6960 drivers together, ensuring
that only one MAX6960's ADDIN input is connected to V+.
42 42 RISET0
Digit 0 Current Setting. Connect RISET0 to GND to program all of digit 0's segment
currents to 40mA. Leave RISET0 open circuit to program all of digit 0's segment currents
to 20mA. Connect RISET0 to GND through a fixed or variable resistor to adjust all of digit
0's segment currents between 20mA and 40mA.
43 43 RISET1
Digit 1 Current Setting. Connect RISET1 to GND to program all of digit 1's segment
currents to 40mA. Leave RISET1 open circuit to program all of digit 1's segment currents
to 20mA. Connect RISET1 to GND through a fixed or variable resistor to adjust all of digit
1's segment currents between 20mA and 40mA.
— EP EP Exposed Pad on Package Underside. Connect to GND.
MQFP TQFN
12, 44
2–5, 7–10 2–5, 7–10 ROW1–ROW8
34, 38
12, 44
COL1–COL16
34, 38
MAX6960–MAX6963
4-Wire Serially Interfaced
8 x 8 Matrix Graphic LED Drivers
6 _______________________________________________________________________________________
Quick-Start Guide
Selecting the Appropriate Driver
The MAX6960–MAX6963 matrix LED drivers are available in four versions, with different levels of functionality
(Table 1). The two-part ID bits in the fault and device ID
register (Table 32) identify the driver type to the interface software. The ID bits may be of use if the same
panel software is used to drive more than one type of
display panel, because the software can automatically
detect the panel type.
This data sheet uses the generic name MAX6960 to
refer to the family of four parts MAX6960 through
MAX6963, unless there is a specific difference to
discuss.
The purpose of this quick-start guide is to provide an
overview of the capabilities of the MAX6960 so that the
driver can be easily evaluated for a particular application, without fighting through a complex data sheet.
Terminology
• Pixel: One “point” on a display. Comprises one LED
for a monocolor display, two LEDs for an RGY display, and three LEDs for an RGB display.
• Monocolor: Display has only one color, typically red
for low-cost signs or orange for traffic signs. Varying
AVAILABLE FUNCTIONS
PART
RGB 2
RGB
RGY
PIXEL
RGY
1 BIT PER
PIXEL
2 BITS PER
PIXEL
1 BIT PER
PIXEL
REGISTER LIMITATIONS
MAX6960
√√ √ √ √ √None.
MAX6961
— √ — √ — √
PI bit (bit D7) in global panel
configuration register is fixed at 0
(Table 22).
MAX6962
√√—— √√
C bit (bit D6) in global panel
configuration register is fixed at 0
(Table 21).
MAX6963
— √ —— — √
C bit (bit D6) in global panel
configuration register is fixed at 0
(Table 21).
PI bit (bit D7) in global panel
configuration register is fixed at 0
(Table 22).
Table 1. Levels of Functionality
DISPLAY CONFIGURATION MAXIMUM PIXEL COUNT
EXAMPLE MAXIMUM PANEL (PIXELS)
Monocolor 32,768 256 x 128
RGY 16,384 256 x 64
RGB
32,768 (3 buses required; see Figure 17)
128 x 85
Table 2. Maximum Display Matrix on a Single 4-Wire Interface
256 DRIVERS ON 4-WIRE INTERFACE, 50 FRAMES PER SECOND UPDATE RATE
DISPLAY-MEMORY-ACCESS METHOD
1-BIT-PER-PIXEL INTENSITY
CONTROL (Mbps)
2-BITS-PER-PIXEL INTENSITY
CONTROL (Mbps)
8-bit indirect display memory addressing
1.64 3.28
24-bit direct display memory addressing 4.92 9.83
Table 3. 4-Wire Interface Speed Requirements for Animation
*When operated per Figure 17.
MONOCOLOR
BITS PER
PIXEL*
1 BIT PER
PIXEL*
2 BITS PER
MONOCOLOR
MAX6960–MAX6963
4-Wire Serially Interfaced
8 x 8 Matrix Graphic LED Drivers
_______________________________________________________________________________________ 7
the current through the LED changes the intensity of
the red.
• Bicolor: Literally means two color, and usually refers
to LEDs built with two LED dice of different colors,
typically red and green or red and orange/yellow.
• Tricolor: Literally means three color, and can refer to
LEDs built with three LED dice of different colors, typically red, green, and blue. The term is also used to
refer to a display built with bicolor LEDs, because there
are three main colors available (red, green, yellow).
• RGY: Display uses one red LED (R) and one green
LED (G) per pixel. When both red and green LEDs
are lit, the resulting color is yellow (Y). Varying the
current through the LEDs changes the intensity of the
pixel and changes the color from red through shades
of orange and yellow to green.
• RGB: Display uses one red LED (R), one green LED
(G), and one blue LED (B) per pixel. Varying the current through the LEDs changes the intensity of the
pixel and changes the color through many shades
limited by the current control resolution.
MAX6960 Applications
The MAX6960 is a multiplexed, constant-current LED
driver intended for high-efficiency indoor signage and
message boards.
The high efficiency arises because the driver operates
from a 3.3V nominal supply with minimal voltage headroom required across the driver output stages. The
problem of removing heat from even a small display is
therefore minimized.
The maximum peak LED drive current is 40mA, which
when multiplexed eight ways, provides an average current of 5mA per LED. This current drive is expected to
be adequate for indoor applications, but inadequate for
outdoor signs operating in direct sun.
The MAX6960 directly drives monocolor (typically red
or orange/yellow) or RGY (typically red/green or
red/yellow) graphic displays using LEDs with a forward
voltage drop up to 2.5V. Blue LEDs and some green
LEDs cannot be driven directly because of their high
forward voltage drop (around 3.5V to 4.5V). For these
displays, the MAX6960 can be used as a graphic controller, just as it can be used for applications requiring
higher peak segment currents, and in RGB panels
needing a higher driver voltage for the blue LEDs. In
these cases, the MAX6960 can be used with external
drive transistors to control anode-row displays, with all
driver features including pixel-level intensity control still
available (see the Applications Information section and
Figure 17).
Display Intensity Control
Five levels of intensity control are provided:
• A 256-step PWM panel intensity adjustment sets all
MAX6960s simultaneously as a global panel brightness control (Table 27). The 256-step resolution is
fine enough to allow fade-in/fade-out graphic effects,
as well as provide a means for compensating a
panel for background lighting.
• A 2-bits-per-pixel intensity control allows four brightness levels to be set independently per pixel. The
pixel-level intensity control can be set to be either
arithmetic (off, 1/3, 2/3, full) or geometric (off, 1/4,
1/2, full) for full flexibility (Table 24), and allows four
colors to be displayed on monocolor panels, or 16
colors to be displayed on RGY panels, or 64 colors
to be displayed on RGB panels.
• The LED drive current can be selected between
either a 40mA peak per segment and a lower 20mA
peak current on a digit-by-digit basis using the
R
ISET0
and R
ISET1
pins. The lower (20mA) current
may be the better choice to drive high-efficiency displays, and this setting allows the MAX6960 to operate from a supply voltage as low as 2.7V.
• The LED drive current can be adjusted between
40mA and 20mA peak current on a digit-by-digit
basis using fixed or adjustable resistors connected
from the R
ISET0
and R
ISET1
pins to GND. These controls enable analog relative adjustments in digit
intensity, typically to calibrate digits from different
batches, or to color balance RGY displays.
• The digit intensity controls allow each digit’s operating current to be scaled down in 256 steps from the
global panel intensity adjustment. The effective operating current for each digit becomes n/256th of the
panel intensity value. These controls enable digital
relative adjustments in digit intensity in addition to
the analog approach outlined above.
Display Size Limitations
The maximum display size that can be handled by a
single 4-wire serial interface is given in Table 2, which
is for the maximum 256 interconnected MAX6960s.
Larger display panels can be designed using a separate CS line for each group of (up to) 256 MAX6960s.
Each group would also have its own local 3-wire bus to
allocate the driver addresses. The 4-wire interface
speeds requirement when continuously updating display memory for high-speed animations is given in
Table 3.
MAX6960–MAX6963
4-Wire Serially Interfaced
8 x 8 Matrix Graphic LED Drivers
8 _______________________________________________________________________________________
Software Control
The hardware features are designed to simplify the
software interface and eliminate software timing dependencies:
• Two or four planes of display memory are stored,
allowing images to be preloaded into the MAX6960–
MAX6963 frame memory.
• Animation timing is built in, sequencing through the
two or four planes automatically. System software
has to update the upcoming plane(s) with new data
ahead of time, but do not be concerned about exact
timing. The frame rate is adjustable to as fast as 63
frames a second for animations, or to as slow as one
frame change every 63s for advertising sequencing.
• Multiple MAX6960s interconnect and share display
memory so that the software “sees” the display as
memory-mapped planes of contiguous RAM.
• Global commands that need to be received and
acted on by every MAX6960 in a panel do just that,
with one write.
Hardware Design
A MAX6960 normally drives an 8 x 16 LED matrix, comprising 8 cathode rows and 16 anode columns, or
8 anode rows and 16 cathode columns with external
drivers.
The MAX6960 standard wiring connection to either two
monocolor 8 x 8 digits, or to a single RGY 8 x 8 digit is
shown in Table 4. Figure 3 shows the display pin naming.
Figures 1 and 2 show example displays with the
MAX6960 drivers connecting to monocolor and RGY panels. Figure 4 shows how the display memory maps to the
physical pixels on the display panel, provided that the
MAX6960 drivers are interconnected correctly in a rasterlike manner from top left of the panel to bottom right.
Detailed Description
Overview
The MAX6960 is an LED display driver capable of driving
either two monocolor 8 x 8 cathode-row matrix digits, or a
single RGY 8 x 8 cathode-row matrix digit. The architecture of the driver is designed to allow a large graphic
DRIVER PINS ROW1–ROW8
DRIVER PINS COL1–COL8
DRIVER PINS COL9–COL16
Monocolor digit 0 (red*)
Digit 0 (red*) rows (cathodes)
R1 to R8
C8
—
Monocolor digit 1 (green*)
Digit 1 (green*) rows
(cathodes) R1 to R8
—
Digit 1 columns (anodes) C1 to
C8
RGY red/green
Red/green rows (cathodes) R1
to R8
Red columns (anodes) C1 toC8Green columns (anodes) C1 to
C8
Table 4. Standard Driver Connection to Monocolor and RGY 8 x 8 Displays
*Digit 0 of a monocolor display is called red, and digit 1 is called green in the data sheet.
RED
DRIVER0
RED RED
DRIVER1
RED RED
DRIVER2
RED RED
DRIVER3
RED RED
DRIVER4
RED RED
DRIVER5
RED
RED
DRIVER6
RED RED
DRIVER7
RED RED
DRIVER8
RED RED
DRIVER9
RED RED
DRIVER10
RED RED
DRIVER11
RED
RED
DRIVER12
RED RED
DRIVER13
RED RED
DRIVER14
RED RED
DRIVER15
RED RED
DRIVER16
RED RED
DRIVER17
RED
RED
DRIVER18
RED RED
DRIVER19
RED RED
DRIVER20
RED RED
DRIVER21
RED RED
DRIVER22
RED RED
DRIVER23
RED
Figure 1. Monocolor 1-Bit-per-Pixel, 96-Pixel x 32-Pixel Display Example
Digit 0 columns (anodes) C1 to
MAX6960–MAX6963
4-Wire Serially Interfaced
8 x 8 Matrix Graphic LED Drivers
_______________________________________________________________________________________ 9
display panel to be driven easily and intuitively by multiple MAX6960s using 8 x 8 cathode-row matrix digits. The
MAX6960s in a display-driver design not only share the
host 4-wire interface, but they also share a local 3-wire
interface that is not connected to the host. The local 3wire interface works with the user’s driver settings to configure all the MAX6960s to appear to the host interface as
one contiguous memory-mapped driver.
The pixel level-intensity control uses frame modulation.
Pixels are enabled and disabled on a frame-by-frame
basis over a 12-frame super frame (Table 5). The effective pixel frame duty cycle within a super frame sets each
pixel’s effective intensity. The 12-frame period of a super
frame allows arithmetic and geometric intensity scales to
be mixed on the same driver. This allows the user to set
up an RGY display with a different color scale for red and
RED
DRIVER0
GREEN GREEN GREEN GREEN GREEN GREEN
GREEN GREEN GREEN GREEN GREEN GREEN
GREEN GREEN GREEN GREEN GREEN GREEN
GREEN GREEN GREEN GREEN GREEN GREEN
RED
DRIVER1
RED
DRIVER2
RED
DRIVER3
RED
DRIVER4
RED
DRIVER5
RED
DRIVER6
RED
DRIVER7
RED
DRIVER8
RED
DRIVER9
RED
DRIVER10
RED
DRIVER11
RED
DRIVER12
RED
DRIVER13
RED
DRIVER14
RED
DRIVER15
RED
DRIVER16
RED
DRIVER17
RED
DRIVER18
RED
DRIVER19
RED
DRIVER20
RED
DRIVER21
RED
DRIVER22
RED
DRIVER23
Figure 2. RGY 1-Bit-per-Pixel 48-Pixel x 32-Pixel Display Example
COLUMN 1
COLUMN 2
COLUMN 3
COLUMN 4
COLUMN 5
COLUMN 6
COLUMN 7
COLUMN 8
ROW 1
ROW 2
ROW 3
ROW 4
ROW 5
ROW 6
ROW 7
ROW 8
MONOCOLOR
COLUMN 1 (RED)
ROW 1
ROW 2
ROW 3
ROW 4
ROW 5
ROW 6
ROW 7
ROW 8
RGY
COLUMN 9 (GREEN)
Figure 3. 8 x 8 Matrix Pin Assignment
FIRST DISPLAY PIXEL
MAPS TO FIRST PLANE
LAST DISPLAY PIXEL
MAPS TO LAST PLANE
MEMORY LOCATION
Figure 4. How Plane Memory Across Multiple
MAX6960–MAX6963 Maps to Display Pixels
MAX6960–MAX6963
4-Wire Serially Interfaced
8 x 8 Matrix Graphic LED Drivers
10 ______________________________________________________________________________________
green.The MAX6960 uses display memory planes to
store the display images. A memory plane is the exact
amount of memory required to store the display image.
The memory plane architecture allows one plane to be
used to refresh the display, while at least one other plane
is available to build up the next image. The global plane
counter register (Table 30) allows the plane used to
refresh the display to be selected either directly on command, or automatically under MAX6960 control.
Automatic plane switching can be set from 63 plane
changes a second to one plane change every 63s.
Display Memory Addressing
The MAX6960 contains 64 bytes of display mapping
memory. This display memory provides four memory
planes (of 16 bytes) when 1-bit-per-pixel intensity control is selected, or two memory planes (of 32 bytes)
when 2-bits-per-pixel intensity control is used (Table 6).
The 64 bytes of display memory in a MAX6960 could
be accessed with 6 bits of addressing on a driver-bydriver basis.
The MAX6960 uses a 14-bit addressing scheme. The
address map encompasses up to 256 MAX6960 drivers, all connected to the host through a common 4wire interface, and also interconnected through a local
3-wire interface. The purpose of the 3-wire interface is
to actively segment the 14-bit address space among
the (up to) 256 MAX6960s.
The total display memory is already partitioned among
these MAX6960 drivers in a register format. The
MAX6960s repartition these registers to appear as contiguous planes of display memory, organized by color
(red, then green) and then into planes (P0 to P4)
(Table 6).
Register Addressing Modes
The MAX6960 accepts 8-bit, 16-bit, and 24-bit transmissions. All MAX6960s sharing an interface receive
and decode all these transmissions, but the content of
a transmission determines which MAX6960s store and
use a particular transmission, and which discard it
(Table 7).
PATTERN OF MULTIPLEX CYCLES FOR WHICH A PIXEL IS ENABLED
PIXEL
GRADUATION
BIT
BIT
PIXEL
INTENSITY
SETTING
11
Both 1 1 Full
1
Arithmetic 1 0 2/3
1
Geometric 1 0 1/2
0
Arithmetic 0 1 1/3
0
Geometric 0 1 1/4
0
Both 0 0 Off
0
Table 5. Frame Modulation with Pixel Intensity
GLOBAL PANEL CONFIGURATION
REGISTER
(PI BIT)
COLOR
(C BIT)
PIXEL-LEVEL
INTENSITY
CONTROL
DISPLAY TYPE
DISPLAY MAPPING
ADDRESSES PER PLANE
DISPLAY
PLANES
AVAILABLE
0 0 1 bit per pixel Monocolor 16 red contiguous 4
0 1 1 bit per pixel RGY
8 red contiguous,
8 green contiguous
4
10
Monocolor
16 red contiguous,
16 red contiguous
2
11
RGY
16 red
(2 noncontiguous groups of 8),
16 green
(2 noncontiguous groups of 8)
2
Table 6. Panel Configuration
012345678910
11111111111
10110110110
10101010101
01001001001
01000100010
00000000000
PLANES/INTENSITY
2 bits per pixel
2 bits per pixel
MAX6960–MAX6963
4-Wire Serially Interfaced
8 x 8 Matrix Graphic LED Drivers
______________________________________________________________________________________ 11
8-Bit Transmissions
Eight-bit transmissions are write-only, data-only
accesses that write data to the display memory indirected by the global display indirect address register
(Figure 6). The global display indirect address register
autoincrements after the write access. Eight-bit transmissions provide the quickest method of updating a
plane of display memory of the MAX6960. It is the most
suitable display update method if the host system
builds an image in local memory, and then dumps the
image into a display plane of the MAX6960.
16-Bit Transmissions
Sixteen-bit transmissions are read/write, commandand-data accesses to the MAX6960’s configuration
registers (Figure 7). A write can generally be global
(updates all MAX6960s on the 4-wire bus with the same
data) or specific (updates just the MAX6960 indirected
by the global driver indirect address register). Note:
The global driver indirect address register selects a
specific MAX6960. This is not the same as the global display indirect address register, which points to
display memory that could be in any MAX6960. A
16-bit read is always indirected through the global driver indirect address register to select only one
MAX6960 to respond. When a read or write is indirected through the global driver indirect address register,
the 16-bit command can choose whether the global driver indirect address is autoincremented after the command has been executed. This allows the host to set up
one or more registers in consecutive MAX6960s with
the display indirect address, autoincrementing only
when required.
8-, 16-, OR 24-BIT DATA PACKET SENT TO MAX6960
DATA FORMAT
D23
D22
D21
D20
D19
D18
D17
D16
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
8-bit indirect display
memory addressing.
Address is global display
indirect address (14 bits)
stored as {MSB, LSB} in
{register 0x0A, register
0x09}.
— 8 bits of display memory
16-bit device addressing.
—
4-bit
address
8 bits of driver register data
Factory reserved; do not
write to this address.
—
—
24-bit direct display
memory addressing
(monocolor 1 bit per
pixel).
12-bit addressing across 256 drivers,
4096 x 8 red pixels
8 bits of display memory
(1 bit per pixel)
24-bit direct display
memory addressing
(RGY 1 bit per pixel).
12-bit addressing across 256 drivers,
2048 x 8 red pixels, and
2048 x 8 green pixels
8 bits of display memory
(1 bit per pixel)
24-bit direct display
memory addressing
(monocolor 2 bits per
pixel).
0, 1
13-bit addressing across 256 drivers,
4096 x 4 red pixels
8 bits of display memory
(2 bits per pixel)
24-bit direct display
memory addressing
(RGY 2 bits per pixel).
0, 1
13-bit addressing across 256 drivers,
4096 x 4 red pixels, and
4096 x 4 green pixels
8 bits of display memory
(2 bits per pixel)
Table 7. Register Addressing Modes
R/W X
R/W X
Planes
0, 1, 2, 3
Planes
0, 1, 2, 3
R/W AI L/G 0
1
Planes
Planes
R/W X
R/W X
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