Rainbow Electronics MAX6900 User Manual

For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.

General Description

The MAX6900, I2C™-bus-compatible real-time clock
(RTC) in a 6-pin TDFN package contains a real-time
clock/calendar and 31-byte

✕

8-bit wide of static ran­dom access memory (SRAM). The real-time clock/cal­endar provides seconds, minutes, hours, day, date,
month, and year information. The end of the month date
is automatically adjusted for months with fewer than 31
days, including corrections for leap year up to the year

2100. The clock operates in either the 24hr or 12hr for­mat with an AM/PM indicator.

Applications

Portable Instruments

Point-of-Sale Equipment

Intelligent Instruments

Battery-Powered Products

Features

♦ Real-Time Clock Counts Seconds, Minutes,

Hours, Date, Month, Day, and Year

♦ Leap Year Compensation Valid up to Year 2100

♦ Fast (400kHz) I

2

C-Bus-Compatible Interface from

2.0V to 5.5V

♦ 31

✕

8 SRAM for Scratchpad Data Storage

♦ Uses Standard 32.768kHz, 12.5pF Load, Watch

Crystal

♦ Ultra-Low 225nA (typ) Timekeeping Current

♦ Single-Byte or Multiple-Byte (Burst Mode) Data

Transfer for Read or Write of Clock Registers or
SRAM

♦ 6-Pin 3mm x 3mm x 0.8mm TDFN Surface-Mount

Package

♦ No External Crystal Bias Resistors or Capacitors

Required

MAX6900

I2C-Compatible RTC in a TDFN

________________________________________________________________ Maxim Integrated Products 1

19-1942; Rev 3; 6/03

Typical Operating Circuit

X1

GNDX2

1 6 SDA

5 SCL

V

CC

MAX6900

TDFN

TOP VIEW

2

34

Pin Configuration

Ordering Information

Related Real-Time Clock Products

I2C is a trademark of Philips Corp. Purchase of I2C components
of Maxim Integrated Products, Inc., or one of its sublicensed
Associated Companies, conveys a license under the Philips I

2

C
Patent Rights to use these components in an I2C system, provid­ed that the system conforms to the I2C Standard Specification
as defined by Philips.

SPI is a trademark of Motorola, Inc.

PART TEMP RANGE

MAX6900ETT-T -40°C to +85°C 6 TDFN AEU

PIN­PACKAGE

TOP

MARK

PART SERIAL BUS SRAM

ALARM

FUNCTION

OUTPUT

FREQUENCY

PIN-PACKAGE

MAX6900 I2C compatible 31 ✕ 8 ——6 TDFN

MAX6901 3-wire 31 ✕ 8 Polled 32kHz 8 TDFN

MAX6902 SPI™ compatible 31 ✕ 8 Polled — 8 TDFN

V

CC

V

CC

V

CC

µC

RPU RPU

RPU = t

r/Cbus

0.01µF

5

6

SCL

SDA

1

V

CC

MAX6900

GND

4

X1

X2

2

CRYSTAL

3

MAX6900

I2C-Compatible RTC in a TDFN

2 _______________________________________________________________________________________

ABSOLUTE MAXIMUM RATINGS

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.

VCCto GND..............................................................-0.3V to +6V

All Other Pins to GND ................................-0.3V to (V

CC

+ 0.3V)

Input Current

All Pins ............................................................................20mA

Output Current

All Outputs .......................................................................20mA

Rate of Rise, V

CC

............................................................100V/µs

Continuous Power Dissipation (T

A

= +70°C)

6-Pin TDFN (derate 24.4mW/°C above +70°C) .......1951.0mW

Operating Temperature Range ...............................T

MIN

to T

MAX

MAX6900 ETT-T .......................T

MIN

= -40°C, T

MAX

= +85°C

Junction Temperature .....................................................+150°C

Storage Temperature Range ............................ -65°C to +150°C

ESD Protection (all pins, Human Body model) ..................2000V

Lead Temperature (soldering, 10s) ...…………………….+300°C

DC ELECTRICAL CHARACTERISTICS

(VCC= +2.0V to +5.5V, TA= T

MIN

to T

MAX

, unless otherwise noted. Typical values are at VCC= +3.3V, TA= +25°C.) (Note 1)

AC ELECTRICAL CHARACTERISTICS

(VCC= +2.0V to +5.5V, TA= T

MIN

to T

MAX

, unless otherwise noted. Typical values are at VCC= +3.3V, TA= +25°C.) (Notes 1, 6)

Operating Voltage Range V

Active Supply Current (Note 2) I

Timekeeping Supply Current
(Note 3)

2-WIRE DIGITAL INPUTS SCL, SDA

Input High Voltage V

Input Low Voltage V

Input Hysteresis (Note 5) V

Input Leakage Current (Note 4) 0 < VIN < V

Input Capacitance (Note 5) 10 pF

2-WIRE DIGITAL OUTPUT SDA

Output Low Voltage V

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

CC

CC

I

TK

IH

IL

HYS

OL

VCC = +2.0V 30

VCC = +5.0V 110

VCC = +2.0V 0.225 0.630

VCC = +5.0V 1.2 1.7

CC

I

= 4mA 0.4 V

SINK

2 5.5 V

0.7 x V

CC

0.05 x
V

CC

-10 10 nA

0.3 x
V

CC

µA

µA

V

V

V

OSCILLATOR

X1 to Ground Capacitance 25 pF

X2 to Ground Capacitance 25 pF

FAST I2C-BUS-COMPATIBLE TIMING

SCL Clock Frequency f

Bus Free Time Between STOP
and START Condition (Note 4)

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

SCL

t

BUF

0 400 kHz

1.3 µs

MAX6900

I2C-Compatible RTC in a TDFN

_______________________________________________________________________________________ 3

AC ELECTRICAL CHARACTERISTICS (continued)

(VCC= +2.0V to +5.5V, TA= T

MIN

to T

MAX

, unless otherwise noted. Typical values are at VCC= +3.3V, TA= +25°C.) (Notes 1, 6)

Note 1: All parameters are 100% tested at TA= +25°C. Limits over temperature are guaranteed by design and not production tested.
Note 2: I

CC

is specified with SCL = 400kHz and SDA = 400kHz.

Note 3: I

TK

is specified with SCL = Logic High (4.7kΩ pullup resistor) and SDA = Logic High (4.7kΩ pullup resistor);

I

2

C-compatible bus inactive.

Note 4: MAX6900 I/O pins do not obstruct the SDA and SCL lines if V

CC

is switched off.

Note 5: Guaranteed by design. Not subject to production testing.
Note 6: All values referred to V

IH

min

and V

IL

max

levels.

Note 7: The MAX6900 internally provides a hold time of at least 300ns for the SDA signal (referred to the V

IH

min

of the SCL signal)

in order to bridge the undefined region of the falling edge of SCL.

Note 8: C

B

= total capacitance of one bus line in pF.

Note 9: The maximum t

f

for the SDA and SCL bus lines is specified at 300ns. The maximum fall time for the SDA output stage tfis
specified at 250ns. This allows series protection resistors to be connected between the SDA/SCL pins and the SDA/SCL
bus lines without exceeding the maximum specified t

f

.

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

Hold Time After (Repeated)
START Condition (After this
Period, the First Clock Is
Generated)

Repeated START Condition
Setup Time

STOP Condition Setup Time t

Data Hold Time (Note 7) t

Data Setup Time t

SCL Low Period t

SCL High Period t

Minimum SCL/SDA Rise Time
(Note 8)

Maximum SCL/SDA Rise Time
(Note 8)

Minimum SCL/SDA Fall Time
(Receiving) (Notes 8, 9)

Maximum SCL/SDA Fall Time
(Receiving) (Notes 8, 9)

Minimum SDA Fall Time
(Transmitting) (Notes 8, 9)

Maximum SDA Fall Time
(Transmitting) (Notes 8, 9)

Pulse Width of Spike Suppressed t

Capacitive Load for Each
Bus Line

t

HD:STA

t

SU:STA

SU:STO

HD:DAT

SU:DAT

LOW

HIGH

t

r

t

r

t

f

t

f

t

f

t

f

SP

C

B

0.6 µs

0.6 µs

0.6 µs
0 0.9 µs

100 ns

1.3 µs

0.6 µs

20 +

0.1C

B

ns

300 ns

20 +

0.1C

B

ns

300 ns

20 +

0.1C

B

ns

250 ns

50 ns

400 pF

Detailed Description

The MAX6900 contains eight timekeeping registers,
burst address registers, a control register, an on-chip

32.768kHz oscillator circuit, and a serial 2-wire, I2C­compatible interface. There are also 31 bytes, 8 bits
wide of SRAM on board. Time and calendar data are
stored in the registers in a binary-coded decimal (BCD)
format. Figure 1 shows an I2C-bus-compatible timing
diagram. Figure 2 shows the MAX6900 functional dia­gram.

Real-Time Clock

The RTC provides seconds, minutes, hours, day, date,
month, and year information. The end of the month is
automatically adjusted for months with fewer than 31

MAX6900

I2C-Compatible RTC in a TDFN

4 _______________________________________________________________________________________

Typical Operating Characteristics

(TA = +25°C, unless otherwise noted.)

0

0.3

0.4

0.1

0.2

0.6

0.5

1.0

0.7

0.8

0.9

1.1

1.4

1.5

1.2

1.3

1.6

1.0 2.0 2.5 3.01.5 3.5 4.0 4.5 5.55.0 6.0

TIMEKEEPING CURRENT vs. V

CC

MAX6900 toc01

VCC (V)

TIMEKEEPING CURRENT (µA)

Pin Description

Figure 1. Detailed

I

2

C-Bus Timing Diagrams

PIN NAME FUNCTION

1VCCPower Supply

2 X1 32.768kHz External Crystal

3 X2 32.768kHz External Crystal

4 GND Ground

5 SCL I2C-Bus-Compatible Clock Input

6 SDA

— PAD Ground

PROTOCOL

SCL

SDA

2

I

C-Bus-Compatible Data

Input/Output

START

CONDITION

(S)

t

t

LOW

r

t

SU:STA

t

BUF

t

HD:STA

BIT 7
MSB
(A7)

t

HIGH

t

HD:DAT

BIT 6

(A6)

1/f

SCL

t

f

t

HD:DAT

BIT 0

LSB

(R/W)

ACKNOWLEDGE

(A)

t

SU:STO

STOP

CONDITION

(P)

days, including corrections for leap year up to the year

2100.

Crystal Oscillator

The MAX6900 uses an external, standard 12.5pF load
watch crystal. No other external components are
required for this timekeeping oscillator. Power-up oscil­lator start-time is dependent mainly upon applied V

CC

and ambient temperature. The MAX6900, because of
its low timekeeping current, exhibits a typical startup
time between 5s to 10s.

I2C-Compatible Interface

Interfacing the MAX6900 with a microprocessor or
other I2C master is made easier by using the serial, I2C­bus-compatible or other I2C master interface. Only 2
wires are required to communicate with the clock and
SRAM: SCL (serial clock) and SDA (data line). Data is
transferred to and from the MAX6900 over the I/O data
line, SDA. The MAX6900 uses 7-bit slave ID address­ing. The MAX6900 does not respond to general call
address commands.

Applications Information

I2C-Bus-Compatible Interface

The I2C-bus-compatible serial interface allows bidirec­tional, 2-wire communication between multiple ICs. The
two lines are SDA and SCL. Connect both lines to a
positive supply through individual pullup resistors. A
device on the I2C-compatible bus that generates a
message is called a transmitter and a device that
receives the message is a receiver. The device that
controls the message is the master and the devices
that are controlled by the master are called slaves
(Figure 3). The word message refers to data in the form
of three 8-bit bytes for a Single Read or Write. The first
byte is the Slave ID byte, the second byte is the
Address/Command byte, and the third is the data.

Data transfer can only be initiated when the bus is not
busy (both SDA and SCL are high). A high-to-low tran­sition of SDA while SCL is high is defined as the Start
(S) condition; low-to-high transition of the data line
while SCL is high is defined as the Stop (P) condition
(Figure 4).

MAX6900

I2C-Compatible RTC in a TDFN

_______________________________________________________________________________________ 5

Figure 2. Functional Diagram

VCC

GND

SCL

SDA

ADDRESS
REGISTER

31 X 8

SRAM

1Hz

SECONDS

MINUTES

HOURS

DATE

MONTH

DAY

YEAR

CONTROL

CENTURY

CLOCK
BURST

X1

X2

OSCILLATOR

32.768kHz

2

C BUS

I

INTERFACE

DIVIDER

CONTROL

LOGIC

MAX6900

I2C-Compatible RTC in a TDFN

6 _______________________________________________________________________________________

After the Start condition occurs, 1 bit of data is trans­ferred for each clock pulse. The data on SDA must
remain stable during the high portion of the clock pulse
as changes in data during this time are interpreted as a
control signal (Figure 5). Any time a start condition
occurs, the Slave ID must follow immediately, regard­less of completion of the previous data transfer.

Before any data is transmitted on the I

2

C-bus-compati­ble serial interface, the device that is expected to
respond is addressed first. The first byte sent after the
start (S) procedure is the Address byte or 7-bit Slave

ID. The MAX6900 acts as a slave transmitter/receiver.
Therefore, SCL is only an input clock signal and SDA is
a bidirectional data line. The Slave Address for the
MAX6900 is shown in Figure 6.

Figure 5. I2C Bus Bit Transfer

Figure 6. I2C Bus Slave Address or 7-Bit Slave ID

Figure 3. I2C Bus System Configuration

Figure 4. I2C Bus Start and Stop Conditions

SDA

SCL

SDA

SCL

S

START CONDITION STOP CONDITION

SDA

MASTER

TRANSMITTER/

RECEIVER

SLAVE

RECEIVER

SLAVE

TRANSMITTER/

RECEIVER

MASTER

TRANSMITTER

MASTER

TRANSMITTER/

RECEIVER

SDA

SCL

P

SCL

DATA LINE

STABLE;

DATA VALID

CHANGE
OF DATA

ALLOWED

RD/W

0000101

BIT 0BIT 7