Rainbow Electronics MAX6871 User Manual

General Description
The MAX6870/MAX6871 EEPROM-configurable, multi­voltage supply sequencers/supervisors monitor several voltage detector inputs, two auxiliary inputs, and four general-purpose logic inputs. The MAX6870/MAX6871 feature programmable outputs for highly configurable power-supply sequencing applications. The MAX6870 features six voltage detector inputs and eight program­mable outputs, while the MAX6871 features four voltage detector inputs and five programmable outputs. Manual reset and margin disable inputs offer additional flexibility.
All voltage detectors offer two configurable thresholds for undervoltage/overvoltage or dual undervoltage detection. One high voltage input (IN1) provides detec­tor threshold voltages from +2.5V to +13.2V in 50mV increments, or from +1.25V to +7.625V in 25mV incre­ments. A bipolar input (IN2) provides detector threshold voltages from ±2.5V to ±15.25V in 50mV increments, or from ±1.25V to ±7.625V in 25mV increments. Positive inputs (IN3–IN6) provide detector threshold voltages from +1V to +5.5V in 20mV increments, or from +0.5V to +3.05V in 10mV increments.
Programmable output stages control power-supply sequencing or system resets/interrupts. Programmable output options include: active-high, active-low, open­drain, weak pullup, push-pull, and charge pump. Programmable timing delay blocks configure each output to wait between 25µs and 1600ms before deasserting. A fault register logs the condition that caused each output to assert (undervoltage, overvoltage, manual reset, etc.).
An internal 10-bit ADC monitors the voltage detector inputs, and two auxiliary inputs through a multiplexer that automatically sequences through all inputs every 200ms. A SMBusTM-/I2CTM-compatible, serial data inter­face programs and communicates with the configuration EEPROM, the configuration registers, the internal 4kb user EEPROM, the ADC registers, and the fault registers of the MAX6870/MAX6871.
The MAX6870/MAX6871 are available in a 7mm x 7mm x 0.8mm 32-pin thin QFN package and operate over the extended -40°C to +85°C temperature range.
Applications
Telecommunications/Central Office Systems Networking Systems Servers/Workstations Basestations Storage Equipment Multimicroprocessor/Voltage Systems
Features
Six (MAX6870) or Four (MAX6871) Configurable
Input Voltage Detectors
One High Voltage Input (+1.25V to +7.625V or
+2.5V to +13.2V Thresholds)
One Bipolar Voltage Input (±1.25V to ±7.625V
or ±2.5V to ±15.25V Thresholds)
Four (MAX6870) or Two (MAX6871) Positive
Voltage Inputs (+0.5V to +3.05V or +1V to +5.5V Thresholds)
Four General-Purpose Logic Inputs
Two Configurable Watchdog Timers
Eight (MAX6870) or Five (MAX6871)
Programmable Outputs
Active-High, Active-Low, Open-Drain, Weak
Pullup, Push-Pull, Charge-Pump
Timing Delays from 25µs to 1600ms
10-Bit Internal ADC Monitors the Input Voltage
Detectors and Two Auxiliary Inputs
Margining Disable and Manual Reset Controls
Internal 1.25V Reference or External Reference
Input
4kb Internal User EEPROM
Endurance: 100,000 Erase/Write Cycles Data Retention: 10 Years
I2C/SMBus-Compatible Serial
Configuration/Communication Interface
±1% Threshold Accuracy
MAX6870/MAX6871
EEPROM-Programmable Hex/Quad
Power-Supply Sequencers/Supervisors with ADC
________________________________________________________________ Maxim Integrated Products 1
Ordering Information
19-3384; Rev 1; 9/04
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
EVALUATION KIT
AVAILABLE
Pin Configurations, Typical Operating Circuit, and Selector Guide appear at end of data sheet.
PART
TEMP RANGE
PIN­PACKAGE
PKG
CODE
MAX6870ETJ
T3277-2
MAX6871ETJ
T3277-2
SMBus is a trademark of Intel Corp.
I
2
C is a trademark of Philips Corp.
Purchase of I
2
C components from Maxim Integrated Products, Inc., or one of its sublicensed Associated Companies, conveys a license under the Philips I
2
C Patent Rights to use these com-
ponents in an I
2
C system, provided that the system conforms
to the I
2
C Standard Specification as defined by Philips.
-40°C to +85°C 32 Thin QFN
-40°C to +85°C 32 Thin QFN
MAX6870/MAX6871
EEPROM-Programmable Hex/Quad Power-Supply Sequencers/Supervisors with ADC
2 _______________________________________________________________________________________
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS
(V
IN1
= +6.5V to +13.2V, V
IN2
= +10V, V
IN3
to V
IN6
= +2.7V to +5.5V, AUXIN_ = GPI_ = GND, MARGIN = MR = DBP, TA= -40°Cto
+85°C, unless otherwise noted. Typical values are at T
A
= +25°C.) (Notes 1 and 2)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
All Voltages referenced to GND IN3–IN6, ABP, SDA, SCL, A0, A1,
GPI1–GPI4, MR, MARGIN, PO5–PO8
(MAX6870), PO3/PO4/PO5 (MAX6871)............-0.3V to +6V
IN1, PO1–PO4 (MAX6870), PO1/PO2 (MAX6871)....-0.3V to +14V
IN2 ...........................................................................-20V to +20V
DBP, AUXIN1, AUXIN2, REFIN.................................-0.3V to +3V
Input/Output Current (all pins)..........................................±20mA
Continuous Power Dissipation (T
A
= +70°C) 32-Pin 7mm x 7mm Thin QFN
(derate 33.3mW/°C above +70°C).............................2667mW
Operating Temperature Range ...........................-40°C to +85°C
Maximum Junction Temperature .....................................+150°C
Storage Temperature Range .............................-65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
PARAMETER
CONDITIONS MIN
UNITS
V
IN1
Voltage on IN1 to ensure the device is fully operational, IN3 to IN6 = GND
4.0
Operating Voltage Range (Note 3)
V
IN3
to
V
IN6
Voltage on any one of IN3 to IN6 to ensure the device is fully operational, IN1 = GND
2.7 5.5
V
IN1 Supply Voltage (Note 3)
V
IN1P
Minimum voltage on IN1 to guarantee that the device is powered through IN1
6.5 V
Undervoltage Lockout
Minimum voltage on one of IN3 to IN6 to
2.5 V
V
IN1
= +13.2V, IN2 to IN6 = GND, no load 1.2 1.5
Supply Current I
CC
Writing to configuration registers or EEPROM, no load
1.3 2
mA
V
IN1
(50mV increments) 2.5
V
IN1
(25mV increments)
V
IN2
(50mV increments)
V
IN2
(25mV increments)
V
IN3
to V
IN6
(20mV increments) 1.0 5.5
Threshold Range V
TH
V
IN3
to V
IN6
(10mV increments)
V
TA = +25°C-1.0
IN1 to IN6 positive, V
IN_
falling
-1.5
TA = +25°C-1.5
-15.25V V
IN2
-5V,
V
IN2
falling
-2 +2
%
TA = +25°C -75 +75
Threshold Accuracy
-5V V
IN2
0, V
IN2
falling
mV
Threshold Hysteresis
0.3
% V
TH
Reset Threshold Temperature Coefficient
10
ppm/
°C
Threshold-Voltage Differential Nonlinearity
-1 +1
LSB
SYM B O L
TYP MAX
13.2
V
UVLO
V
TH-HYST
VTH/°C
VTH DNL
guarantee the device is EEPROM configured.
13.2
1.250 7.625
±2.50 ±15.25
±1.250 ±7.625
0.50 3.05
TA = -40°C to +85°C
TA = -40°C to +85°C
TA = -40°C to +85°C -100 +100
+1.0
+1.5
+1.5
MAX6870/MAX6871
EEPROM-Programmable Hex/Quad
Power-Supply Sequencers/Supervisors with ADC
_______________________________________________________________________________________ 3
PARAMETER
CONDITIONS MIN
UNITS
IN1 Input Leakage Current I
LIN1
For V
IN1
< the highest of V
IN3
to V
IN6
100 140 µA
IN2 Input Impedance R
IN2
160 230 320
k
IN3 to IN6 Input Impedance
R
IN3
to
R
IN6
V
IN1
> 6.5V
70 100 145
k
Power-Up Delay
t
PU
V
ABP
V
UVLO
3.5
ms
IN_ to PO_ Delay t
DPO
V
IN_
falling or rising, 100mV overdrive 25 µs
000 25 µs
001
010
011
25
100 45 50 55
101 180 200 220
110 360 400 440
PO_ Timeout Period t
RP
Register contents (Table 25)
111
ms
V
ABP
+2.5V, I
SINK
= 500µA 0.3
PO1–PO4 (MAX6870), PO1/PO2 (MAX6871) Output Low (Note 3)
V
OL
V
ABP
+4.0V, I
SINK
= 2mA 0.4
V
V
ABP
+2.5V, I
SINK
= 1mA 0.3
P O5–P O8 ( M AX 6870) , P O 3/P O4/
P O5 ( M AX 6871) O utp ut Low ( N ote 3)
V
OL
V
ABP
+4.0V, I
SINK
= 4mA 0.4
V
PO1–PO8 Output Initial Pulldown Current
I
PD
V
ABP
V
UVLO
, V
PO_
= 0.8V 10 40 µA
PO1–PO8 Output Open-Drain Leakage Current
I
LKG
Output high impedance -1 +1 µA
PO1–PO8 Output Pullup
Resistance, Weak Pullup Selected
R
PU
V
PO_
= 2V 6.6 10
k
PO1–PO4 (MAX6870), PO1/PO2 (MAX6871) Turn-On Time, Charge Pump Selected (Note 4)
t
ON
C
PO_
= 1500pF, V
ABP
= +3.3V,
V
PO_
= +7.8V
0.5 1.5 3.0
ms
PO1–PO4 (MAX6870), PO1/PO2 (MAX6871) Turn-Off Time, Charge Pump Selected
t
OFF
C
PO_
= 1500pF, V
ABP
= +3.3V,
V
PO_
= +0.5V
30 µs
With respect to V
ABP
, I
PO_
< 100nA 5.5
PO1–PO4 (MAX6870), PO1/PO2 (MAX6871) Output High,
Charge Pump Selected (Notes 3, 4)
With respect to V
ABP
, I
PO_
< 1µA 4.0 5.0 6.0
V
Any one of V
IN3
to V
IN6
+2.7V, I
SOURCE
=
10mA, output pulled up to the same IN_
1.5
Any one of V
IN3
to V
IN6
+2.7V, I
SOURCE
=
1mA, output pulled up to the same IN_
PO5–PO8 (MAX6870), PO3/PO4/ PO5 (MAX6871) Output High, Push-Pull Selected (Note 3)
V
OH
Any one of V
IN3
to V
IN6
+4.5V, I
SOURCE
=
2mA, output pulled up to the same IN_
V
ELECTRICAL CHARACTERISTICS (continued)
(V
IN1
= +6.5V to +13.2V, V
IN2
= +10V, V
IN3
to V
IN6
= +2.7V to +5.5V, AUXIN_ = GPI_ = GND, MARGIN = MR = DBP, TA= -40°Cto
+85°C, unless otherwise noted. Typical values are at T
A
= +25°C.) (Notes 1 and 2)
SYMBOL
TYP MAX
1.406 1.5625 1.719
5.625 6.25 6.875
22.5
1440 1600 1760
27.5
15.0
V
OHCP
0.8 x V
IN_
0.8 x V
IN_
MAX6870/MAX6871
EEPROM-Programmable Hex/Quad Power-Supply Sequencers/Supervisors with ADC
4 _______________________________________________________________________________________
PARAMETER
SYM B O L
CONDITIONS MIN
TYP
MAX
UNITS
V
IL
0.8
MR, MARGIN, GPI_ Input Voltage
V
IH
1.4
V
MR Input Pulse Width t
MR
s
MR Glitch Rejection 100 ns MR to PO_ Delay t
DMR
s
MR to V
DBP
Pullup Current I
MR
V MR = +1.4V 5 10 15 µA
MARGIN to V
DBP
Pullup Current
V
MARGIN
= +1.4V 5 10 15 µA
GPI_ to PO_ Delay
200 ns
GPI_ Pulldown Current I
GPI_
V
GPI_
= +0.8V 5 10 15 µA
Watchdog Input Pulse Width t
WDI
GPI_ configured as a watchdog input 50 ns
000
001
25
010 90 100 110
011 360 400 440
ms
100
101
110
Watchdog Timeout Period t
WD
Register Contents (Table 28)
111
s
Reference Input Voltage Range
V
Reference Input Resistance
V
REFIN
= +1.25V 500
k
IN1, LSB = 18.3mV 0
IN1, LSB = 9.16mV 0
IN2, LSB = 18.3mV 0
IN2, LSB = 9.16mV 0
IN3 to IN6, LSB = 7.32mV 0
IN3 to IN6, LSB = 3.66mV 0
ADC Range
AUXIN_, LSB = 1.2mV 0
V
IN1 to IN6 positive
Internal Reference
IN2 negative
ADC Total Unadjusted Error (Note 5)
TUE
E xter nal Refer ence, IN 1 to IN 6 p osi ti ve ( N ote 6)
%FSR
ADC Differential Nonlinearity DNL (Note 7) ±1
LSB
ADC Total Monitoring Cycle Time
t
C
Monitors all 8 inputs 200 266
ms
AUXIN_ Input Leakage Current
V
AUXIN_
= 1.25V -1 +1 µA
SERIAL INTERFACE LOGIC (SDA, SCL, A0, A1)
Logic Input Low Voltage V
IL
0.8 V
Logic Input High Voltage V
IH
2.0 V
Input Leakage Current I
LKG
-1 +1 µA
Output Voltage Low V
OL
I
SINK
= 3mA 0.4 V
Input/Output Capacitance C
I/O
10 pF
ELECTRICAL CHARACTERISTICS (continued)
(V
IN1
= +6.5V to +13.2V, V
IN2
= +10V, V
IN3
to V
IN6
= +2.7V to +5.5V, AUXIN_ = GPI_ = GND, MARGIN = MR = DBP, TA= -40°Cto
+85°C, unless otherwise noted. Typical values are at T
A
= +25°C.) (Notes 1 and 2)
I
MARGIN
t
DGPI_
V
REFIN
R
REFIN
I
LAUXIN_
5.625 6.25 6.875
22.5
1.44 1.60 1.76
5.76 6.40 7.04
23.04 25.60 28.16
92.16 102.40 112.64
1.225 1.25 1.275
±1.0
9.366
±15.25
±9.366
3.746
1.249
27.5
13.2
5.50
±1.0
±1.0
MAX6870/MAX6871
EEPROM-Programmable Hex/Quad
Power-Supply Sequencers/Supervisors with ADC
_______________________________________________________________________________________ 5
Note 1: Specifications guaranteed for the stated global conditions. The device also meets the parameters specified when 0 < V
IN1
< +6.5V, and at least one of V
IN3
through V
IN6
is between +2.7V and +5.5V, while the remaining V
IN3
through V
IN6
are
between 0 and +5.5V.
Note 2: Device may be supplied from any one of IN_, except IN2. Note 3: The internal supply voltage, measured at ABP, equals the maximum of IN3 to IN6 if V
IN1
= 0, or equals +5.4V if V
IN1
>
+6.5V. For +4V < V
IN1
< +6.5V and V
IN3
through V
IN6
> +2.7V, the input that powers the device cannot be determined.
Note 4: 100% production tested at T
A
= +25°C and TA= +125°C. Specifications at TA= -40°C are guaranteed by design.
Note 5: V
IN_
> 0.3 x ADC range.
Note 6: Does not include the inaccuracy of the external +1.25V voltage reference. Note 7: DNL implicitly guaranteed by design in a sigma-delta converter. Note 8: C
BUS
= total capacitance of one bus line in pF. Rise and fall times are measured between 0.1 x V
BUS
and 0.9 x V
BUS
.
Note 9: Input filters on SDA, SCL, A0, and A1 suppress noise spikes < 50ns. Note 10: An additional cycle is required when writing to configuration memory for the first time.
TIMING CHARACTERISTICS
(IN1 = GND, V
IN2
= +10V, V
IN3
to V
IN6
= +2.7V to +5.5V, AUXIN_ = GPI_ = GND, MARGIN = MR = DBP, TA= -40°C to +85°C,
unless otherwise noted. Typical values are at T
A
= +25°C.) (Notes 1 and 2)
PARAMETER
SYM B O L
CONDITIONS
MIN
TYP
MAX
UNITS
TIMING CHARACTERISTICS (Figure 2)
Serial Clock Frequency f
SCL
kHz
Clock Low Period t
LOW
1.3 µs
Clock High Period
0.6 µs
Bus-Free Time t
BUF
1.3 µs
START Setup Time
0.6 µs
START Hold Time
0.6 µs
STOP Setup Time
0.6 µs
Data-In Setup Time
ns
Data-In Hold Time
0
ns
Receive SCL/SDA Minimum Rise Time t
R
(Note 8)
0.1 x
ns
Receive SCL/SDA Maximum Rise Time t
R
(Note 8)
ns
Receive SCL/SDA Minimum Fall Time t
F
(Note 8)
0.1 x
ns
Receive SCL/SDA Maximum Fall Time t
F
(Note 8)
ns
Transmit SDA Fall Time t
F
C
BUS
= 400pF
0.1 x
ns
Pulse Width of Spike Suppressed t
SP
(Note 9) 50 ns
EEPROM Byte Write Cycle Time t
WR
(Note 10) 11 ms
t
HIGH
t
SU:STA
t
HD:STA
t
SU:STO
t
SU:DAT
t
HD:DAT
100
20 +
C
BUS
20 +
C
BUS
300
20 +
C
BUS
300
400
900
300
MAX6870/MAX6871
EEPROM-Programmable Hex/Quad Power-Supply Sequencers/Supervisors with ADC
6 _______________________________________________________________________________________
Typical Operating Characteristics
(V
IN1
= +6.5V to +13.2V, V
IN2
= +10V, V
IN3–IN6
= +2.7V to +5.5V, AUXIN_ = GPI_ = GND, MARGIN = MR = DBP, TA= +25°C,
unless otherwise noted.)
SUPPLY CURRENT
vs. SUPPLY VOLTAGE (IN1)
MAX6870/71 toc01
SUPPLY VOLTAGE (V)
SUPPLY CURRENT (mA)
12.511.510.59.58.57.5
0.9
1.0
1.1
1.2
1.3
1.4
1.5
0.8
6.5 13.5
TA = +85°C
TA = +25°C
TA = -40°C
SUPPLY CURRENT
vs. SUPPLY VOLTAGE (IN3 TO IN6)
MAX6870/71 toc02
SUPPLY VOLTAGE (V)
SUPPLY CURRENT (mA)
5.04.54.03.53.0
0.9
1.0
1.1
1.2
1.3
1.4
1.5
0.8
2.5 5.5
TA = +25°C
TA = +85°C
TA = -40°C
NORMALIZED PO_ TIMEOUT PERIOD
vs. TEMPERATURE
MAX6870/71 toc03
TEMPERATURE (°C)
NORMALIZED PO_ TIMEOUT PERIOD
6035-15 10
0.97
0.98
0.99
1.00
1.02
1.01
1.03
1.04
0.96
-40 85
IN_ TO PO_
PROPAGATION DELAY vs. TEMPERATURE
MAX6870/71 toc04
TEMPERATURE (°C)
IN_ TO PO_ OUTPUT PROPAGATION DELAY (µs)
603510-15
12
14
16
18
20
22
24
26
28
30
10
-40 85
100mV OVERDRIVE
NORMALIZED WATCHDOG TIMEOUT PERIOD
vs. TEMPERATURE
MAX6870/71 toc05
TEMPERATURE (°C)
NORMALIZED WATCHDOG TIMEOUT PERIOD
6035-15 10
0.985
0.990
0.995
1.000
1.010
1.005
1.015
1.020
0.980
-40 85
NORMALIZED IN_ THRESHOLD
vs. TEMPERATURE
MAX6870/71 toc06
TEMPERATURE (°C)
NORMALIZED IN_ THRESHOLD
603510-15
0.992
0.994
0.996
0.998
1.000
1.002
1.004
1.006
1.008
1.010
0.990
-40 85
IN3 THRESHOLD = 1V, 20mV/STEP RANGE
MAXIMUM IN_ TRANSIENT DURATION
vs. IN_ THRESHOLD OVERDRIVE
MAX6870/71 toc07
IN_ THRESHOLD OVERDRIVE (mV)
MAXIMUM_ TRANSIENT DURATION (µs)
10010
10
20
30
40
50
60
70
80
90
100
110
120
130
0
1 1000
PO_ ASSERTION OCCURS ABOVE THIS LINE
OUTPUT VOLTAGE LOW
vs. SINK CURRENT
MAX6870/71 toc08
I
SINK
(mA)
V
OL
(mV)
131210
11
3456 789
1
2
50
100
150
200
250
300
350
400
450
0
014
15
OPEN-DRAIN, CHARGE PUMP, OR WEAK PULLUP PO1–PO4 (MAX6870) PO1/PO2 (MAX6871)
PUSH-PULL PO5–PO8 (MAX6870) PO3/PO4/PO5 (MAX6871)
MAX6870/MAX6871
EEPROM-Programmable Hex/Quad
Power-Supply Sequencers/Supervisors with ADC
_______________________________________________________________________________________ 7
OUTPUT VOLTAGE HIGH vs. SOURCE CURRENT
(PUSH-PULL OUTPUT)
MAX6870/71 toc10
I
OUT
(mA)
V
OH
(V)
555040 4510 15 20 25 30 355
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
6.0
0
060
PUSH-PULL TO IN3 IN3 = 5V
PO5–PO8 (MAX6870)
PO3/PO4/PO5 (MAX6871)
OUTPUT VOLTAGE HIGH vs. SOURCE CURRENT
(CHARGE-PUMP OUTPUT)
MAX6870/71 toc11
SOURCE CURRENT (µA)
OUTPUT VOLTAGE HIGH (V)
4321
3.5
4.0
4.5
5.0
5.5
6.0
3.0 05
MEASURED RELATIVE TO V
ABP
PO1–PO4 (MAX6870)
PO1/PO2 (MAX6871)
MR TO PO_ PROPAGATION DELAY
vs. TEMPERATURE
MAX6870/71 toc12
TEMPERATURE (°C)
MR TO PO_ PROPAGATION DELAY (µs)
6035-15 10
1.55
1.60
1.65
1.70
1.80
1.75
1.85
1.90
1.50
-40 85
MAXIMUM MR TRANSIENT DURATION
vs. MR THRESHOLD OVERDRIVE
MAX6870/71 toc13
MR THRESHOLD OVERDRIVE (mV)
MAXIMUM MR TRANSIENT DURATION (µs)
10010
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1.0
1.1
1.2
0
1 1000
PO_ ASSERTION OCCURS ABOVE THIS LINE
OUTPUT VOLTAGE HIGH vs. SOURCE CURRENT
(WEAK PULLUP OUTPUT)
MAX6870/71 toc09
I
OUT
(mA)
V
OH
(V)
4.54.03.0 3.51.0 1.5 2.0 2.50.5
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
6.0
0
05.0
WEAK PULLUP TO ABP
Typical Operating Characteristics (continued)
(V
IN1
= +6.5V to +13.2V, V
IN2
= +10V, V
IN3–IN6
= +2.7V to +5.5V, AUXIN_ = GPI_ = GND, MARGIN = MR = DBP, TA= +25°C,
unless otherwise noted.)
ADC ACCURACY
vs. TEMPERATURE
MAX6870/71 toc14
TEMPERATURE (°C)
TOTAL UNADJUSTED ERROR (%)
603510-15
-0.8
-0.6
-0.4
-0.2
0
0.2
0.4
0.6
0.8
1.0
-1.0
-40 85
V
IN2
= -12V,
50mV/STEP RANGE
V
IN3
= 5V,
20mV/STEP RANGE
V
IN1
= 9V,
25mV/STEP RANGE
V
AUXIN1
= 1V
FET (IRF7811W)
TURN-ON WITH CHARGE PUMP
MAX6870/71 toc15
V
PO1
10V/div
V
SOURCE
2V/div
I
DRAIN
5A/div
SEE FIGURE 9
MAX6870/MAX6871
EEPROM-Programmable Hex/Quad Power-Supply Sequencers/Supervisors with ADC
8 _______________________________________________________________________________________
Pin Description
PIN
NAME
FUNCTION
1 3 PO2
Programmable Output 2. Configurable, active-high, active-low, open-drain, weak pullup, or charge-pump output. PO2 pulls low with a 10µA internal current sink for +1V < V
ABP
< V
UVLO
.
PO2 assumes its programmed conditional output state when ABP exceeds UVLO.
2 5 PO3
Programmable Output 3. Configurable, active-high, active-low, open-drain, weak pullup (MAX6870), push-pull (MAX6871), or charge-pump (MAX6870) output. PO3 pulls low with a 10µA internal current sink for +1V < V
ABP
< V
UVLO
. PO3 assumes its programmed conditional
output state when ABP exceeds UVLO.
3 6 PO4
Programmable Output 4. Configurable, active-high, active-low, open-drain, weak pullup (MAX6870), push-pull (MAX6871), or charge-pump (MAX6870) output. PO4 pulls low with a 10µA internal current sink for +1V < V
ABP
< V
UVLO
. PO4 assumes its programmed conditional
output state when ABP exceeds UVLO.
4 4 GND Ground
5 7 PO5
Programmable Output 5. Configurable, active-high, active-low, open-drain, weak pullup, or push-pull output. PO5 pulls low with a 10µA internal current sink for +1V < V
ABP
< V
UVLO
. PO5
assumes its programmed conditional output state when ABP exceeds UVLO.
6 PO6
Programmable Output 6. Configurable, active-high, active-low, open-drain, weak pullup, or push-pull output. PO6 pulls low with a 10µA internal current sink for +1V < V
ABP
< V
UVLO
. PO6
assumes its programmed conditional output state when ABP exceeds UVLO.
7 PO7
Programmable Output 7. Configurable, active-high, active-low, open-drain, weak pullup, or push-pull output. PO7 pulls low with a 10µA internal current sink for +1V < V
ABP
< V
UVLO
. PO7
assumes its programmed conditional output state when ABP exceeds UVLO.
8 PO8
Programmable Output 8. Configurable, active-high, active-low, open-drain, weak pullup, or push-pull output. PO8 pulls low with a 10µA internal current sink for +1V < V
ABP
< V
UVLO
.
PO8 assumes its programmed conditional output state when ABP exceeds UVLO.
9, 10
1, 8, 9, 10,
N.C. No Connection. Not internally connected.
11 11
Margin Input. Configure MARGIN to either assert PO_ into a programmed state or to hold PO_ in its existing state when driving MARGIN low. See Table 8. Leave MARGIN unconnected or connect to DBP if unused. MARGIN overrides MR if both assert at the same time. MARGIN is internally pulled up to DBP through a 10µA current source.
12 12 MR
Manual Reset Input. Configure MR to either assert PO_ into a programmed state or to have no effect on PO_ when driving MR low. See Table 7. Leave MR unconnected or connect to DBP if unused. MR is internally pulled up to DBP through a 10µA current source.
13 13 SDA Serial Data Input/Output (Open-Drain). SDA requires an external pullup resistor.
14 14 SCL Serial Clock Input. SCL requires an external pullup resistor.
15 15 A0
Address Input 0. Address inputs allow up to four MAX6870/MAX6871 connections on one common bus. Connect A0 to GND or to the serial interface power supply.
16 16 A1
Address Input 1. Address inputs allow up to four MAX6870/MAX6871 connections on one common bus. Connect A1 to GND or to the serial interface power supply.
MAX6870 MAX6871
25, 26, 32
MARGIN
MAX6870/MAX6871
EEPROM-Programmable Hex/Quad
Power-Supply Sequencers/Supervisors with ADC
_______________________________________________________________________________________ 9
Pin Description (continued)
PIN
MAX6870
FUNCTION
17 17 GPI4
General-Purpose Logic Input 4. An internal 10µA current source pulls GPI4 to GND. Configure GPI4 to control watchdog timer functions or the programmable outputs.
18 18 GPI3
General-Purpose Logic Input 3. An internal 10µA current source pulls GPI3 to GND. Configure GPI3 to control watchdog timer functions or the programmable outputs.
19 19 GPI2
General-Purpose Logic Input 2. An internal 10µA current source pulls GPI2 to GND. Configure GPI2 to control watchdog timer functions or the programmable outputs.
20 20 GPI1
General-Purpose Logic Input 1. An internal 10µA current source pulls GPI1 to GND. Configure GPI1 to control watchdog timer functions or the programmable outputs.
21 21 ABP
Internal Power-Supply Output. Bypass ABP to GND with a 1µF ceramic capacitor. ABP powers the internal circuitry of the MAX6870/MAX6871. ABP supplies the input voltage to the internal charge pumps when the programmable outputs are configured as charge-pump outputs. Do not use ABP to supply power to external circuitry.
22 22 DBP
Internal Digital Power-Supply Output. Bypass DBP to GND with a 1µF ceramic capacitor. DBP supplies power to the EEPROM memory and the internal logic circuitry. Do not use DBP to supply power to external circuitry.
23 23
Auxiliary Input 2. A 10-bit ADC monitors the input voltage at AUXIN2. The high-impedance AUXIN2 input accepts input voltages up to V
REFIN
. AUXIN2 does not influence EEPROM-
configurable power-supply sequencing or reset detection functions.
24 24
Auxiliary Input 1. A 10-bit ADC monitors the input voltage at AUXIN1. The high-impedance AUXIN1 input accepts input voltages up to V
REFIN
. AUXIN1 does not influence EEPROM-
configurable power-supply sequencing or reset detection functions.
25 IN6
Voltage Input 6. Configure IN6 to detect voltage thresholds between +1V and +5.5V in 20mV increments, or +0.5V to +3.05V in 10mV increments. For improved noise immunity, bypass IN6 to GND with a 0.1µF capacitor installed as close to the device as possible.
26 IN5
Voltage Input 5. Configure IN5 to detect voltage thresholds between +1V and +5.5V in 20mV increments, or +0.5V to +3.05V in 10mV increments. For improved noise immunity, bypass IN5 to GND with a 0.1µF capacitor installed as close to the device as possible.
27 27 IN4
Voltage Input 4. Configure IN4 to detect voltage thresholds between +1V and +5.5V in 20mV increments, or +0.5V to +3.05V in 10mV increments. For improved noise immunity, bypass IN4 to GND with a 0.1µF capacitor installed as close to the device as possible.
28 28 IN3
Voltage Input 3. Configure IN3 to detect voltage thresholds between +1V and +5.5V in 20mV increments, or +0.5V to +3.05V in 10mV increments. For improved noise immunity, bypass IN3 to GND with a 0.1µF capacitor installed as close to the device as possible.
29 29 IN2
Bipolar Voltage Input 2. Configure IN2 to detect negative voltage thresholds from -2.5V to
-15.25V in 50mV increments or -1.25V to -7.625V in 25mV increments. Alternatively, configure IN2 to detect positive voltage thresholds from +2.5V to +15.25V in 50mV increments or +1.25V to +7.625V in 25mV increments. For improved noise immunity, bypass IN2 to GND with a 0.1µF capacitor installed as close to the device as possible.
MAX6871
NAME
AUXIN2
AUXIN1
MAX6870/MAX6871
Detailed Description
The MAX6870/MAX6871 EEPROM-configurable, multi­voltage supply sequencers/supervisors monitor several voltage-detector inputs, two auxiliary inputs and four general-purpose logic inputs, and feature programma­ble outputs for highly-configurable, power-supply sequencing applications. The MAX6870 features six voltage-detector inputs and eight programmable out­puts, while the MAX6871 features four voltage-detector inputs and five programmable outputs. Manual reset and margin disable inputs simplify board-level testing during the manufacturing process. The MAX6870/ MAX6871 feature an accurate internal 1.25V reference. For greater accuracy, connect an external +1.25V ref­erence to REFIN.
All voltage detectors provide two configurable thresh­olds for undervoltage/overvoltage or dual undervoltage detection. One high-voltage input (IN1) provides detec­tor threshold voltages from +1.25V to +7.625V in 25mV increments or +2.5V to +13.2V in 50mV increments. A bipolar input (IN2) provides detector threshold volt­ages from ±1.25V to ±7.625V in 25mV increments, or ±2.5V to ±15.25V in 50mV increments. Positive inputs (IN3–IN6) provide detector threshold voltages from +0.5V to +3.05V in 10mV increments, or +1.0V to +5.5V in 20mV increments.
An internal 10-bit ADC monitors the voltage-detector inputs and two auxiliary inputs through a multiplexer that automatically sequences through all inputs every 200ms. The host controller communicates with the MAX6870/MAX6871s internal 4kb user EEPROM, configuration EEPROM, configuration registers, ADC registers, and fault registers through an SMBus/I
2
C-
compatible serial interface (see Figure 1).
Programmable output options include active-high, active-low, open-drain, weak pullup, push-pull, and charge pump. Select the charge-pump output feature to drive n-channel FETs for power-supply sequencing (see the Applications Information section). The outputs swing between 0 and (V
ABP
+ 5V) when configured for
charge-pump operation.
Program each output to assert on any voltage-detector input, general-purpose logic input, watchdog timer, manual reset, or other output stages. Programmable timing-delay blocks configure each output to wait between 25µs and 1600ms before deasserting. A fault register logs the conditions that caused each output to assert (undervoltage, overvoltage, manual reset, etc.).
The MAX6870/MAX6871 feature two watchdog timers, adding flexibility. Program each watchdog timer to assert one or more programmable outputs. Program each
EEPROM-Programmable Hex/Quad Power-Supply Sequencers/Supervisors with ADC
10 ______________________________________________________________________________________
Pin Description (continued)
PIN
MAX6870
NAME
FUNCTION
30 30 IN1
High Voltage Input 1. Configure IN1 to detect voltage thresholds from +2.5V to +13.2V in 50mV increments or +1.25V to +7.625V in 25mV increments. For improved noise immunity, bypass IN1 to GND with a 0.1µF capacitor installed as close to the device as possible.
31 31
Reference Voltage Input. Configure the MAX6870/MAX6871 to use either an internal reference or external reference (see Table 9). When configured for an internal reference, leave REFIN unconnected. When configured for an external reference, connect a +1.225V to +1.275V reference to REFIN.
32 2 PO1
Programmable Output 1. Configurable active-high, active-low, open-drain, weak pullup, or charge-pump output. PO1 pulls low with a weak 10µA internal current sink for +1V < V
ABP
< V
UVLO
. PO1 assumes its programmed conditional output state when ABP exceeds UVLO.
——EP Exposed Paddle. Exposed paddle is internally connected to GND.
MAX6871
REFIN
MAX6870/MAX6871
EEPROM-Programmable Hex/Quad
Power-Supply Sequencers/Supervisors with ADC
______________________________________________________________________________________ 11
COMPARATORS
ADC MUX
ADC
ADC REGISTERS
REGISTER BANK
CONTROLLER
EEPROM
(USER AND
CONFIG)
OUTPUT STAGES
LOGIC NETWORK
FOR PO_
WATCHDOG
TIMERS
GPI_
GPI_, MR,
MARGIN
PO_
IN_
SDA,
SCL
ANALOG BLOCK
DIGITAL BLOCK
SERIAL
INTERFACE
AUXIN_
Figure 1. Top Level Block Diagram
watchdog timer to clear on a combination of one GPI_ input and one programmable output, one of the GPI_ inputs only, or one of the programmable outputs only. The initial and normal watchdog timeout periods are independently programmable from 6.25ms to 102.4s.
A virtual diode-ORing scheme selects the input that pow­ers the MAX6870/MAX6871. The MAX6870/MAX6871
derive power from IN1 if V
IN1
> +6.5V or from the highest
voltage on IN3–IN6 if V
IN1
< +2.7V. The power source
cannot be determined if +4V < V
IN1
< +6.5V and one
of V
IN3
through V
IN6
> +2.7V. The programmable out­puts maintain the correct programmed logic state for V
ABP
> V
UVLO
. One of IN3 through IN6 must be greater than +2.7V or IN1 must be greater than +4V for device operation.
MAX6870/MAX6871
EEPROM-Programmable Hex/Quad Power-Supply Sequencers/Supervisors with ADC
12 ______________________________________________________________________________________
ADC
TIMING
SERIAL
INTERFACE
MAX6870 MAX6871
1.25V V
REF
IN2 DETECTOR
IN_ DETECTOR
IN1
IN2
IN3
IN4
AUXIN1 AUXIN2
IN5
(N.C.)
IN6
(N.C.)
IN3 DETECTOR
IN4 DETECTOR
IN5 DETECTOR
IN6 DETECTOR
PROGRAMMABLE
ARRAY
TIMING BLOCK 2
TIMING BLOCK 3
TIMING BLOCK 4
TIMING BLOCK 5
TIMING BLOCK 6
TIMING BLOCK 7
TIMING BLOCK 8
PO2 OUTPUT
PO3 OUTPUT
PO4 OUTPUT
PO5 OUTPUT
PO6 OUTPUT
PO7 OUTPUT
PO8 OUTPUT
ADC
REGISTERS
TIMING BLOCK 1
V
ABP
+ 5V
CHARGE PUMP*
MUX
GPI1
GPI2
GPI3
GPI4
MARGIN
MR
IN3–IN6
(IN3–IN4)
PO_ OUTPUT
*PO1–PO4 ONLY (PO1, PO2)
ABP
MUX
P1**
10k
PO1
PO2
PO3
PO4
PO5
PO6 (N.C.)
PO7 (N.C.)
PO8 (N.C.)
SDA
SCL
A0
A1
OPEN­DRAIN
** PO5–PO8 ONLY (PO3, PO4, PO5)
ADC
MUX
MAIN
OSCILLATOR
IN1 IN2 IN3 IN4 IN5
IN6 AUXIN1 AUXIN2
EEPROM
CHARGE PUMP
CONFIG
REGISTERS
CONFIG
EEPROM
USER
EEPROM
1µF
ABP
DBP
1µF
2.55V LDO
5.4V LDO
(VIRTUAL
DIODES)
REFIN
GND
( ) ARE FOR MAX6871 ONLY.
ADC
Functional Diagram
MAX6870/MAX6871
EEPROM-Programmable Hex/Quad
Power-Supply Sequencers/Supervisors with ADC
______________________________________________________________________________________ 13
Powering the MAX6870/MAX6871
The MAX6870/MAX6871 derive power from the positive voltage-detector inputs: IN1, or IN3–IN6. A virtual diode­ORing scheme selects the positive input that supplies power to the device (see the Functional Diagram). IN1 must be at least +4V or one of IN3–IN6 (MAX6870)/ IN3/IN4 (MAX6871) must be at least +2.7V to ensure device operation. An internal LDO regulates IN1 down to +5.4V.
The highest input voltage on IN3–IN6 (MAX6870)/ IN3/IN4 (MAX6871) supplies power to the device, unless V
IN1
+6.5V, in which case IN1 supplies power to the
device. For +4V < V
IN1
< +6.5V and one of V
IN3
through
V
IN6
> +2.7V, the input power source cannot be deter­mined due to the dropout voltage of the LDO. Internal hysteresis ensures that the supply input that initially pow­ered the device continues to power the device when multiple input voltages are within 50mV of each other.
ABP powers the analog circuitry; bypass ABP to GND with a 1µF ceramic capacitor installed as close to the device as possible. The internal supply voltage, mea­sured at ABP, equals the maximum of IN3–IN6 (MAX6870)/IN3/IN4 (MAX6871) if V
IN1
= 0, or equals
+5.4V when V
IN1
> +6.5V. Do not use ABP to provide
power to external circuitry.
The MAX6870/MAX6871 also generate a digital supply voltage (DBP) for the internal logic circuitry and the EEPROM; bypass DBP to GND with a 1µF ceramic capacitor installed as close to the device as possible. The nominal DBP output voltage is +2.55V. Do not use DBP to provide power to external circuitry.
ADC
The MAX6870/MAX6871 feature an internal 10-bit ADC that monitors the voltage-detector inputs and auxiliary inputs through an internal multiplexer that sequences through all input voltages in 200ms. Registers 50h to 5Fh store the ADC data. Read the ADC data from the MAX6870/MAX6871 with the serial interface. The ADC strictly monitors input voltages and has no effect on power-supply sequencing, reset detection, or the pro­grammable outputs.
Inputs
The MAX6870/MAX6871 contain multiple logic and volt­age-detector inputs. Each voltage-detector input is simultaneously monitored for primary and secondary thresholds. The primary threshold must be an under­voltage threshold. The secondary threshold may be an undervoltage or overvoltage threshold. Table 1 summa­rizes these various inputs.
Table 1. Programmable Features
FEATURE DESCRIPTION
High Voltage Input
(IN1)
Primary undervoltage threshold
Secondary overvoltage or undervoltage threshold
+2.5V to +13.2V threshold in 50mV increments
+1.25V to +7.625V threshold in 25mV increments
Bipolar Voltage Input
(IN2)
Primary undervoltage threshold
Secondary overvoltage or undervoltage threshold
±2.5V to ±15.25V threshold in 50mV increments
±1.25V to ±7.625V threshold in 25mV increments
Positive Voltage Input
IN3–IN6 (MAX6870) IN3, IN4 (MAX6871)
Primary undervoltage threshold
Secondary overvoltage or undervoltage threshold
+1V to +5.5V threshold in 20mV increments
+0.5V to +3.05V threshold in 10mV increments
Programmable Outputs
PO1–PO4 (MAX6870),
PO1, PO2 (MAX6871)
Active high or active low
Open-drain, weak pullup, or charge-pump output
Weak pullup to IN3IN6 (IN3 or IN4 for MAX6871) or ABP
Dependent on MR, MARGIN, IN_, GPI1GPI4 , WDI1 and WDI2, and/or PO_
Programmable timeout periods of 25µs, 1.5625ms, 6.25ms, 25ms, 50ms, 200ms, 400ms, or 1.6s
Programmable Outputs
PO5–PO8 (MAX6870),
PO3, PO4, PO5
(MAX6871)
Active high or active low
Open-drain, weak pullup, or push-pull output
Weak pullup to IN3IN6 (IN3 or IN4 for MAX6871) or ABP
Push-pull to IN3IN6 (IN3 or IN4 for MAX6871)
Dependent on MR, MARGIN, IN_, GPI1–GPI4 , WDI1 and WDI2 , and/or IN_
Programmable timeout periods of 25µs, 1.5625ms, 6.25ms, 25ms, 50ms, 200ms, 400ms, or 1.6s
Set the primary and secondary threshold voltages for each voltage-detector input with registers 00h–0Bh. Each primary threshold voltage must be an undervolt­age threshold. Configure each secondary threshold voltage as an undervoltage or overvoltage threshold (see register 0Ch). Set the threshold range for each voltage detector with register 0Dh.
High Voltage Input (IN1)
IN1 offers threshold voltages of +2.5V to +13.2V in 50mV increments, or +1.25V to +7.625V in 25mV incre­ments. Use the following equations to set the threshold voltages for IN1:
where V
TH
is the desired threshold voltage and x is the decimal code for the desired threshold (Table 2). For the +2.5V to +13.2V range, x must equal 214 or less, otherwise the threshold exceeds the maximum operat­ing voltage of IN1.
Bipolar Voltage Input (IN2)
IN2 offers negative thresholds from -2.5V to -15.25V in 50mV increments, or from -1.25V to -7.625V in 25mV increments. Alternatively, IN2 offers positive thresholds from +2.5V to +15.25V in 50mV increments, or +1.25V to +7.625V in 25mV increments. Use the following equations to set the threshold voltages for IN2:
x
VV
V
for V to V range
TH
=++
− .
.
. .
125
0 025
1 25 7 625
x
VV
V
for V to V range
TH
=++
− .
.
. .
25
005
2 5 13 2
MAX6870/MAX6871
EEPROM-Programmable Hex/Quad Power-Supply Sequencers/Supervisors with ADC
14 ______________________________________________________________________________________
Table 1. Programmable Features (continued)
FEATURE DESCRIPTION
General-Purpose Logic
Inputs (GPI1–GPI4)
Active high or active low logic levels
Configure GPI_ as inputs to watchdog timers or programmable output stages
Watchdog Timers
Clear dependent on any combination of one GPI_ input and one programmable output, a GPI_ input
only, or a programmable output only
Initial watchdog timeout period of 6.25ms, 25ms, 100ms, 400ms, 1.6s, 6.4s, 25.6s, or 102.4s
Normal watchdog timeout period of 6.25ms, 25ms, 100ms, 400ms, 1.6s, 6.4s, 25.6s, or 102.4s
Watchdog enable/disable
Initial watchdog timeout period enable/disable
Auxiliary Inputs
(AUXIN1, AUXIN2)
Monitored by the internal 10-bit ADC
Manual Reset Input
(MR)
Forces PO_ into the active output state when MR = GND
PO_ deassert after MR releases high and the PO_ timeout period expires
PO_ cannot be a function of MR only
Margining Input
(MARGIN)
Holds PO_ in existing state or asserts PO_ to a programmed output state, independent of changes in
monitored inputs or watchdog timers, when MARGIN = GND
Overrides MR when both assert at the same time
Reference Input
(REFIN)
Internal +1.25V reference voltage
Goes high-impedance when internal reference selected
External reference voltage input from +1.225V to +1.275V
Sets ADC voltage range
10-Bit ADC*
Monitors IN_, AUXIN1, and AUXIN2
Completes conversion of all eight inputs in 200ms
Reference voltage sets ADC range
Read ADC data from SMBus/I
2
C interface
Write Disable Locks user EEPROM based on PO_
Configuration Lock Locks configuration EEPROM
*ADC does not control programmable outputs.
where VTHis the desired threshold voltage and x is the decimal code for the desired threshold (Table 3).
IN3–IN6
IN3–IN6 offer positive voltage detectors monitor volt­ages from +1V to +5.5V in 20mV increments, or +0.5V to +3.05V in 10mV increments. Use the following equa­tions to set the threshold voltages for IN_:
where VTHis the desired threshold voltage and x is the decimal code for the desired threshold (Table 4). For the +1V to +5.5V range, x must equal 225 or less, oth­erwise the threshold exceeds the maximum operating voltage of IN3–IN6.
x
VV
V
for V to V range
TH
=++
− .
.
. .
05
001
05 305
x
VV
V
for V to V range
TH
=++
.
.
1
002
155
x
VV
V
for V to V range
TH
=++
− .
.
. .
125
0 025
1 25 7 625
x
VV
V
for V to V range
TH
=++
− .
.
. .
25
005
2 5 15 25
x
VV
V
for V to V range
TH
=
()
−−
−− .
.
. .
125
0 025
1 25 7 625
x
VV
V
for V to V range
TH
=
()
−−
.
.
. .
25
005
2 5 15 25
MAX6870/MAX6871
EEPROM-Programmable Hex/Quad
Power-Supply Sequencers/Supervisors with ADC
______________________________________________________________________________________ 15
Table 2. IN1 Threshold Settings
REGISTER
ADDRESS
EEPROM
MEMORY
BIT
DESCRIPTION
00h 8000h [7:0]
IN1 primary undervoltage detector threshold (V1A) (see equations in the High Voltage Input (IN1) section).
06h 8006h [7:0]
IN1 secondary undervoltage/overvoltage detector threshold (V1B) (see equations in the High Voltage Input (IN1) section).
0Ch 800Ch [0]
IN1 secondary overvoltage/undervoltage selection. 0 = overvoltage threshold. 1 = undervoltage threshold.
0Dh 800Dh [0]
IN 1 r ang e sel ecti on. 0 = 2.5V to 13.2V r ang e i n 50m V i ncr em ents. 1 = 1.25V to 7.625V r ang e i n 25m V i ncr em ents.
Table 3. IN2 Threshold Settings
REGISTER
ADDRESS
EEPROM
MEMORY
BIT
DESCRIPTION
01h 8001h [7:0]
IN2 primary undervoltage detector threshold (V2A) (see equations in the Bipolar Voltage Input (IN2) section).
07h 8007h [7:0]
IN2 secondary undervoltage/overvoltage detector threshold (V2B) (see equations in the Bipolar Voltage Input (IN2) section).
0Ch 800Ch [1]
IN2 secondary overvoltage/undervoltage selection. 0 = overvoltage threshold. 1 = undervoltage threshold.
0Dh 800Dh [7:6]
IN2 range selection. 00 = -2.5V to -15.25V range in 50mV increments. 01 = -1.25V to -7.625V range in 25mV increments. 10 = +2.5V to +15.25V range in 50mV increments. 11 = +1.25V to +7.625V range in 25mV increments.
ADDRESS
RANGE
ADDRESS
RANGE
MAX6870/MAX6871
EEPROM-Programmable Hex/Quad Power-Supply Sequencers/Supervisors with ADC
16 ______________________________________________________________________________________
Table 4. IN3–IN6 Threshold Settings
REGISTER
ADDRESS
EEPROM
MEMORY
BIT
DESCRIPTION
02h 8002h [7:0] IN3 primary undervoltage detector threshold (V3A) (see equations in the IN3–IN6 section).
03h 8003h [7:0] IN4 primary undervoltage detector threshold (V4A) (see equations in the IN3–IN6 section).
04h 8004h [7:0]
IN5 (MAX6870 only) primary undervoltage detector threshold (V5A) (see equations in the IN3–IN6 section).
05h 8005h [7:0]
IN6 (MAX6870 only) primary undervoltage detector threshold (V6A) (see equations in the IN3–IN6 section).
08h 8008h [7:0]
IN3 secondary undervoltage/overvoltage detector threshold (V3B) (see equations in the IN3–IN6 section).
09h 8009h [7:0]
IN4 secondary undervoltage/overvoltage detector threshold (V4B) (see equations in the IN3–IN6 section).
0Ah 800Ah [7:0]
IN5 (MAX6870 only) secondary undervoltage/overvoltage detector threshold (V5B) (see equations in the IN3–IN6 section).
0Bh 800Bh [7:0]
IN6 (MAX6870 only) secondary undervoltage/overvoltage detector threshold (V6B) (see equations in the IN3–IN6 section).
[2]
IN3 secondary overvoltage/undervoltage selection. 0 = overvoltage threshold. 1 = undervoltage threshold.
[3]
IN4 secondary overvoltage/undervoltage selection. 0 = overvoltage threshold. 1 = undervoltage threshold.
[4]
IN5 (MAX6870 only) secondary overvoltage/undervoltage selection. 0 = overvoltage threshold. 1 = undervoltage threshold.
[5]
IN6 (MAX6870 only) secondary overvoltage/undervoltage selection. 0 = overvoltage threshold. 1 = undervoltage threshold.
0Ch 800Ch
[7:6] Not used.
[1]
IN 3 r ang e sel ecti on. 0 = + 1V to + 5.5V r ang e i n 20m V i ncr em ents. 1 = + 0.5V to + 3.05V r ang e i n 10m V i ncr em ents.
[2]
IN 4 r ang e sel ecti on. 0 = + 1V to + 5.5V r ang e i n 20m V i ncr em ents. 1 = + 0.5V to + 3.05V r ang e i n 10m V i ncr em ents.
[3]
IN 5 ( M AX 6870 onl y) r ang e sel ecti on. 0 = + 1V to + 5.5V r ang e i n 20m V i ncr em ents. 1 = + 0.5V to + 3.05V r ang e i n 10m V i ncr em ents.
[4]
IN 6 ( M AX 6870 onl y) r ang e sel ecti on. 0 = + 1V to + 5.5V r ang e i n 20m V i ncr em ents. 1 = + 0.5V to + 3.05V r ang e i n 10m V i ncr em ents.
0Dh 800Dh
[5] Not used.
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