The MAX5961 0 to 16V, quad, hot-swap controller provides complete protection for systems with up to four
distinct supply voltages. The device allows the safe
insertion and removal of circuit cards into live backplanes. The MAX5961 is an advanced hot-swap controller that monitors voltage and current with an internal
10-bit ADC. The device provides two levels of overcurrent circuit-breaker protection; a fast-trip threshold for a
fast turn-off, and a lower slow-trip threshold for a
delayed turn-off. The maximum overcurrent circuitbreaker threshold range is set independently for each
channel with a trilevel input (ILIM_) or by programming
though an I2C interface.
The internal 10-bit ADC is multiplexed to monitor the
output voltage and current of each hot-swap channel.
The total time to cycle through all the eight measurements is 100µs (typ). Each 10-bit value is stored in an
internal circular buffer so that 50 past samples of each
signal can be read back through the I2C interface at
any time or after a fault condition.
The MAX5961 can be configured as four independent
hot-swap controllers, hot-swap controllers operating in
pairs, or as a group of four hot-swap controllers.
The device also includes five digital comparators per
hot-swap channel to implement overcurrent warning,
two levels of overvoltage detection, and two levels of
undervoltage detection. The limits for overcurrent, overvoltage, and undervoltage are user-programmable.
When any of the measured values violates the programmable limits, an external ALERT signal is asserted. In
addition to the ALERT signal, depending on the selected operating mode, the MAX5961 can deassert a
power-good signal and/or turn-off the external MOSFET.
The MAX5961 is available in a 48-pin thin QFN package and operates over the -40°C to +85°C extended
temperature range.
Applications
PCI Express®Hot Plug
Servers
Disk Drives
Storage Systems
ASICs
Features
o Four Independent Hot-Swap Controllers Protect
from 0 to 16V (Provided IN ≥ 2.7V)
o 10-Bit ADC Monitors Voltage and Current of Each
Channel
o Circular Buffer Stores 5ms of Current and Voltage
Measurements
o Four Independent Internal Charge Pumps
Generate n-Channel MOSFET Gate Drives
o Internal 500mA Gate Pulldown Current for Fast
Shutdown
o VariableSpeed/BiLevel™ Circuit-Breaker Protection
o Alert Output Indicates Undervoltage Warning,
Undervoltage Critical, Overvoltage Warning,
Overvoltage Critical, and Overcurrent Warning for
Each Channel
o Independent Power-Good Outputs
o Autoretry or Latched Fault Management
o 400kHz I
(VIN= 2.7V to 16V, TA = -40°C to +85°C, unless otherwise noted. Typical values are at VIN= 3.3V and TA= +25°C.) (Note 1)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
IN, SENSE_, MON_, GATE_ to AGND ....................-0.3V to +30V
PG_, ON_, FAULT_, SDA, SCL, ALERT,
REG, DREG, POL, RETRY, HWEN .........................-0.3V to +6V
DREG to REG ........................................................-0.3V to +0.3V
ILIM_, MODE, PROT, A0, A1 ....................-0.3V to (V
REG
+ 0.3V)
GATE_ to MON_ (same channel) .............................-0.3V to +6V
SENSE_ to MON_ (same channel) ...........................-0.3V to +6V
GND1, GND2, GND3, GND4, DGND to AGND.....-0.3V to +0.3V
SDA, ALERT Current ...........................................-20mA to 50mA
GATE_, MON_, GND_ Current ..........................................500mA
Input/Output Current (all other pins) ...................................20mA
31GATE4Channel 4 Gate-Drive Output. Connect to gate of an external n-channel MOSFET.
32GND4
33GND2
34GATE2Channel 2 Gate-Drive Output. Connect to gate of an external n-channel MOSFET.
35MON2Channel 2 Voltage Monitoring Input
36SENSE2
37ILIM4
38ILIM3
39ILIM2
40ILIM1
41INPower-Supply Input. Connect to a voltage from 2.7V to 16V. Bypass to AGND with a 1µF capacitor.
42AGNDAnalog Ground. Connect all GND_ and DGND to AGND externally using a star connection.
43REG
44A1Three-State I2C Address Input 1
45A0Three-State I2C Address Input 0
46PROT
47MODE
48HWEN
—EPExposed Pad. EP is internally grounded. Connect externally to AGND.
Channel 4 Current-Sense Input. Connect SENSE4 to the source of an external MOSFET and to one end of
R
Channel 4 Gate Discharge Current Ground Return. Connect all GND_ and DGND to AGND externally
using a star connection.
Channel 2 Gate Discharge Current Ground Return. Connect all GND_ and DGND to AGND externally
using a star connection.
Channel 2 Current-Sense Input. Connect SENSE2 to the source of an external MOSFET and to one end of
R
Channel 4 Three-State Current-Sense Range Selection Input. Set the circuit-breaker threshold range by
connecting to DGND, DREG, or leave unconnected (see Table 7b).
Channel 3 Three-State Current-Sense Range Selection Input. Set the circuit-breaker threshold range by
connecting to DGND, DREG, or leave unconnected (see Table 7b).
Channel 2 Three-State Current-Sense Range Selection Input. Set the circuit-breaker threshold range by
connecting to DGND, DREG, or leave unconnected (see Table 7b).
Channel 1 Three-State Current-Sense Range Selection Input. Set the circuit-breaker threshold range by
connecting to DGND, DREG, or leave unconnected (see Table 7b).
Internal Regulator Output. Bypass to ground with a 1µF capacitor. Connect only to DREG and logic-input
pullup resistors. Do not use to power external circuitry.
Protection Behavior Input. Three-state input sets one of three different response options for undervoltage
and overvoltage events (see Table 29).
Hot-Swap Three-State Mode Select Input. Connect MODE to DGND, DREG, or leave it unconnected to
operate the hot-swap channels independently, in pairs, or as a group of four, respectively (see Table 2).
Hardware Enable Input. Connect to DREG or DGND. State is read upon power-up as V
UVLO threshold and sets Chx_EN2 bits with this value. After UVLO, this input becomes inactive until
power is cycled.