Rainbow Electronics MAX5812 User Manual

Page 1

General Description

The MAX5812 is a single, 12-bit voltage-output, digital-toanalog converter (DAC) with an I2C™-compatible 2-wire interface that operates at clock rates up to 400kHz. The device operates from a single 2.7V to 5.5V supply and draws only 100µA at VDD= 3.6V. A low-power powerdown mode decreases current consumption to less than 1µA. The MAX5812 features three software-selectable power-down output impedances: 100kΩ, 1kΩ, and high impedance. Other features include an internal precision Rail-to-Rail®output buffer and a power-on reset circuit that powers up the DAC in the 100kΩ power-down mode.

The MAX5812 features a double-buffered I2C-compatible serial interface that allows multiple devices to share a single bus. All logic inputs are CMOS-logic compatible and buffered with Schmitt triggers, allowing direct interfacing to optocoupled and transformer-isolated interfaces. The MAX5812 minimizes digital noise feedthrough by disconnecting the clock (SCL) signal from the rest of the device when an address mismatch is detected.

The MAX5812 is specified over the extended temperature range of -40°C to +85°C and is available in a space-saving 6-pin SOT23 package. Refer to the MAX5811 for the 10-bit version.

Applications

Digital Gain and Offset Adjustments

Programmable Voltage and Current Sources

Programmable Attenuation

VCO/Varactor Diode Control

Low-Cost Instrumentation

Battery-Operated Equipment

Features

♦ Ultra-Low Supply Current

100µA at V

= 3.6V

130µA at VDD= 5.5V

♦ 300nA Low-Power Power-Down Mode

♦ Single 2.7V to 5.5V Supply Voltage

♦ Fast 400kHz I

C-Compatible 2-Wire Serial

Interface

♦ Schmitt-Trigger Inputs for Direct Interfacing to

Optocouplers

♦ Rail-to-Rail Output Buffer Amplifier

♦ Three Software-Selectable Power-Down Output

Impedances

100kΩ, 1kΩ, and High Impedance

♦ Read-Back Mode for Bus and Data Checking

♦ Power-On Reset to Zero

♦ Miniature 6-Pin SOT23 Package

MAX5812

12-Bit Low-Power, 2-Wire, Serial

Voltage-Output DAC

________________________________________________________________ Maxim Integrated Products 1

Pin Configuration

Ordering Information

Typical Operating Circuit

19-2340; Rev 0; 1/02

For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.

Rail-to-Rail is a registered trademark of Nippon Motorola, Ltd. I

C is a trademark of Philips Corporation.

Selector Guide appears at end of data sheet. Functional Diagram appears at end of data sheet.

PART TEMP RANGE

MAX5812LEUT -40°C to +85°C 6 SOT23 AAYT

MAX5812MEUT -40°C to +85°C 6 SOT23 AAYV

MAX5812NEUT -40°C to +85°C 6 SOT23 AAYX

MAX5812PEUT -40°C to +85°C 6 SOT23 AAYZ

PINPACKAGE

TOP

MARK

µC

SCL

SDA

SCL

SDA

SCL

SDA

MAX5812

OUT

TOP VIEW

GND

SDA

OUT

ADD

MAX5812

SOT23

SCL

Page 2

MAX5812

12-Bit Low-Power, 2-Wire, Serial Voltage-Output DAC

2 _______________________________________________________________________________________

ABSOLUTE MAXIMUM RATINGS

ELECTRICAL CHARACTERISTICS

(VDD= +2.7V to +5.5V, GND = 0, RL= 5kΩ, CL= 200pF, TA= T

MIN

to T

MAX

, unless otherwise noted. Typical values are at

= +5V, TA= +25°C.) (Note 1)

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

VDD, SCL, SDA to GND............................................-0.3V to +6V

OUT, ADD to GND........................................-0.3V to V

+ 0.3V

Maximum Current Into Any Pin ...........................................50mA

Continuous Power Dissipation (T

= +70°C)

6-Pin SOT23 (derate 9.1mW above +70°C).................727mW

Operating Temperature Range ...........................-40°C to +85°C

Maximum Junction Temperature .....................................+150°C

Storage Temperature Range .............................-65°C to +150°C

Lead Temperature (soldering, 10s) .................................+300°C

STATIC ACCURACY (Note 2)

Resolution N 12 Bits

Integral Nonlinearity INL (Note 3) ±2 ±16 LSB

Differential Nonlinearity DNL Guaranteed monotonic (Note 3) ±1 LSB

Zero-Code Error ZCE

Zero-Code Error Tempco 2.3 ppm/oC

Gain Error GE Code = FFF hex -0.8 -3 %FS

Gain-Error Tempco 0.26 ppm/oC

DAC OUTPUT

Output Voltage Range No load (Note 4) 0 V

DC Output Impedance Code = 800 hex 1.2 Ω

Short-Circuit Current

Wake-Up Time

DAC Output Leakage Current

DIGITAL INPUTS (SCL, SDA)

Input High Voltage V

Input Low Voltage V

Input Hysteresis 0.05 ✕ V

Input Leakage Current Digital inputs = 0 or V

Input Capacitance 6pF

DIGITAL OUTPUT (SDA)

Output Logic Low Voltage V

Three-State Leakage Current I

Three-State Output Capacitance 6pF

DYNAMIC PERFORMANCE

Voltage-Output Slew Rate SR 0.5 V/µs

Voltage-Output Settling Time

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

Code = 000 hex, V

VDD = 5V, V

VDD = 5V 8

Power-down mode = high impedance, V

SINK

Digital inputs = 0 or V

To 1/2LSB code 400 hex to C00 hex or C00 hex to 400 hex (Note 5)

OUT

= 3V, V

OUT

= 3V 8

= 5.5V, V

= 3mA 0.4 V

= 2.7V

= full scale (short to GND) 42.2

= full scale (short to GND) 15.1

= VDD or GND

OUT

±6 ±40 mV

±0.1 ±1 µA

0.7 ✕ V

0.3 ✕ V

±0.1 ±1µA

412µs

µs

Page 3

MAX5812

12-Bit Low-Power, 2-Wire, Serial

Voltage-Output DAC

_______________________________________________________________________________________ 3

Note 1: All devices are 100% production tested at TA= +25°C and are guaranteed by design for TA= T

MIN

to T

MAX

Note 2: Static specifications are tested with the output unloaded. Note 3: Linearity is guaranteed from codes 115 to 3981. Note 4: Offset and gain error limit the FSR. Note 5: Guaranteed by design. Not production tested.

ELECTRICAL CHARACTERISTICS (continued)

(VDD= +2.7V to +5.5V, GND = 0, RL= 5kΩ, CL= 200pF, TA= T

MIN

to T

MAX

, unless otherwise noted. Typical values are at

= +5V, TA= +25°C.) (Note 1)

Digital Feedthrough Code = 000 hex, digital inputs from 0 to V

Digital-to-Analog Glitch Impulse

POWER SUPPLIES

Supply Voltage Range V

Supply Current with No Load

Power-Down Supply Current All digital inputs at 0 or V

TIMING CHARACTERISTICS (Figure 1)

Serial Clock Frequency f

Bus Free Time Between STOP and START Conditions

START Condition Hold Time t

SCL Pulse Width Low t

SCL Pulse Width High t

Repeated START Setup Time t

Data Hold Time t

Data Setup Time t

SDA and SCL Receiving Rise Time

SDA and SCL Receiving Fall Time

SDA Transmitting Fall Time t

STOP Condition Setup Time t

Bus Capacitance C

Maximum Duration of Suppressed Pulse Widths

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

Major carry transition, code = 7FF hex to 800 hex and 800 hex to 7FF hex

All digital inputs at 0 or VDD = 3.6V 100 170

All digital inputs at 0 or V

SCL

BUF

HD, STA

LOW

HIGH

SU, STA

HD, DAT

SU, DAT

SU-STO

(Note 5) 0 300 ns

(Note 5)

(Note 5) 400 pF

= 5.5V 130 190

= 5.5V 0.3 1 µA

2.7 5.5 V

0 400 kHz

1.3 µs

0.6 µs

1.3 µs

0.6 µs

00.9µs

100 ns

20 +

0.1C

0.6 µs

050ns

0.2 nV-s

12 nV-s

µA

250 ns

Page 4

MAX5812

12-Bit Low-Power, 2-Wire, Serial Voltage-Output DAC

4 _______________________________________________________________________________________

Typical Operating Characteristics

(VDD= +5V, RL= 5kΩ, TA= +25°C.)

INTEGRAL NONLINEARITY

vs. INPUT CODE

-1

-2

INTEGRAL NONLINEARITY (LSB)

-3

-4 0 1024 2048 3072 4096

INPUT CODE

MAX5812 toc01

INTEGRAL NONLINEARITY (LSB)

INTEGRAL NONLINEARITY

vs. SUPPLY VOLTAGE

2.7 4.13.4 4.8 5.5 SUPPLY VOLTAGE (V)

MAX5812 toc02

INTEGRAL NONLINEARITY (LSB)

-40 10-15 35 60 85

INTEGRAL NONLINEARITY

vs. TEMPERATURE

MAX5812 toc03

TEMPERATURE (°C)

DIFFERENTIAL NONLINEARITY

vs. INPUT CODE

1.00

0.75

0.50

0.25

-0.25

-0.50

DIFFERENTIAL NONLINEARITY (LSB)

-0.75

-1.00 0 1024 2048 3072 4096

INPUT CODE

ZERO-CODE ERROR

vs. SUPPLY VOLTAGE

ZERO-CODE ERROR (mV)

2.7 4.13.4 4.8 5.5 SUPPLY VOLTAGE (V)

NO LOAD

DIFFERENTIAL NONLINEARITY

MAX5812 toc04

-0.25

-0.50

-0.75

DIFFERENTIAL NONLINEARITY (LSB)

-1.00

2.7 4.13.4 4.8 5.5

MAX8512 toc07

ZERO-CODE ERROR (mV)

-40 10-15 35 60 85

vs. SUPPLY VOLTAGE

SUPPLY VOLTAGE (V)

ZERO-CODE ERROR

vs. TEMPERATURE

NO LOAD

TEMPERATURE (°C)

DIFFERENTIAL NONLINEARITY

MAX5812 toc05

-0.25

-0.50

-0.75

DIFFERENTIAL NONLINEARITY (LSB)

-1.00

-40 10-15 35 60 85

-2.0

MAX5812 toc08

-1.6

-1.2

-0.8

GAIN ERROR (%FSR)

-0.4

2.7 4.13.4 4.8 5.5

vs. TEMPERATURE

MAX5812 toc06

TEMPERATURE (°C)

GAIN ERROR

vs. SUPPLY VOLTAGE

MAX5812 toc09

NO LOAD

SUPPLY VOLTAGE (V)

Page 5

MAX5812

12-Bit Low-Power, 2-Wire, Serial

Voltage-Output DAC

_______________________________________________________________________________________ 5

Typical Operating Characteristics (continued)

(VDD= +5V, RL= 5kΩ, TA= +25°C.)

Note 6: The ability to drive loads less than 5kΩ is not implied.

GAIN ERROR vs. TEMPERATURE

-2.0

-1.6

-1.2

-0.8

GAIN ERROR (%FSR)

-0.4

NO LOAD

-40

10-15 35 60 85

TEMPERATURE (°C)

SUPPLY CURRENT

vs. INPUT CODE

120

100

SUPPLY CURRENT (µA)

NO LOAD

0 1638819 32762457 4096

INPUT CODE

POWER-DOWN SUPPLY CURRENT

vs. SUPPLY VOLTAGE

500

vs. OUTPUT SOURCE CURRENT (NOTE 6)

MAX5812 toc10

DAC OUTPUT VOLTAGE (V)

010

100

MAX5812 toc13

SUPPLY CURRENT (µA)

-40 10-15 35 60 85

DAC OUTPUT VOLTAGE

CODE = FFF hex

4268

OUTPUT SOURCE CURRENT (mA)

SUPPLY CURRENT

vs. TEMPERATURE

NO LOAD CODE = FFF hex

TEMPERATURE (°C)

POWER-UP GLITCH

MAX5812 toc17

2.5

MAX5812 toc11

2.0

1.5

1.0

DAC OUTPUT VOLTAGE (V)

0.5

100

MAX5812 toc14

SUPPLY CURRENT (µA)

DAC OUTPUT VOLTAGE

vs. OUTPUT SINK CURRENT (NOTE 6)

CODE = 400 hex

0426810

OUTPUT SINK CURRENT (mA)

SUPPLY CURRENT

vs. SUPPLY VOLTAGE

CODE = FFF hex NO LOAD

2.7 4.1 4.83.4 5.5 SUPPLY VOLTAGE (V)

EXITING SHUTDOWN

MAX5812 toc12

MAX5812 toc15

MAX5812 toc18

400

300

200

100

POWER-DOWN SUPPLY CURRENT (nA)

2.7 4.13.4 4.8 5.5

TA = -40°C

TA = +25°C

Z NO LOAD

SUPPLY VOLTAGE (V)

= HIGH IMPEDANCE

OUT

TA = +85°C

MAX5812 toc16

OUT

100µs/div

10mV/div

= 200pF CODE = 800 hex

LOAD

2µs/div

500mV/divOUT

Page 6

MAX5812

12-Bit Low-Power, 2-Wire, Serial Voltage-Output DAC

6 _______________________________________________________________________________________

Typical Operating Characteristics (continued)

(VDD= +5V, RL= 5kΩ, TA= +25°C.)

MAJOR CARRY TRANSITION

(POSITIVE)

MAX5812 toc19

5mV/divOUT

2µs/div

LOAD

= 200pF

= 5kΩ

CODE = 7FF hex TO 800 hex

MAJOR CARRY TRANSITION

(NEGATIVE)

MAX5812 toc20

5mV/divOUT

2µs/div

LOAD

= 200pF

= 5kΩ

CODE = 7FF hex TO 800 hex

SETTLING TIME

(POSITIVE)

MAX5812 toc21

500mV/divOUT

2µs/div

LOAD

= 200pF CODE = 400 hex to C00 hex

SETTLING TIME

(NEGATIVE)

MAX5812 toc22

500mV/divOUT

2µs/div

LOAD

= 200pF CODE = C00 hex to 400 hex

DIGITAL FEEDTHROUGH

MAX5812 toc23

2mV/div

2V/div

OUT

SCL

40µs/div

LOAD

= 200pF

SCL

= 12kHz

CODE = 000 hex

Page 7

MAX5812

12-Bit Low-Power, 2-Wire, Serial

Voltage-Output DAC

_______________________________________________________________________________________ 7

Detailed Description

The MAX5812 is a 12-bit, voltage-output DAC with an I2C/SMBus-compatible 2-wire interface. The device consists of a serial interface, power-down circuitry, input and DAC registers, a 12-bit resistor string DAC, unitygain output buffer, and output resistor network. The serial interface decodes the address and control bits, routing the data to either the input or DAC register. Data can be directly written to the DAC register immediately updating the device output, or can be written to the input register without changing the DAC output. Both registers retain data as long as the device is powered.

DAC Operation

The MAX5812 uses a segmented resistor string DAC architecture, which saves power in the overall system and guarantees output monotonicity. The MAX5812’s input coding is straight binary with the output voltage given by the following equation:

where N = 12(bits), and D = the decimal value of the input code (0 to 4095).

Output Buffer

The MAX5812 analog output is buffered by a precision unity-gain follower that slews 0.5V/µs. The buffer output

swings rail-to-rail and is capable of driving 5kΩ in parallel with 200pF. The output settles to ±0.5LSB within 4µs.

Power-On Reset

The MAX5812 features an internal power-on-reset (POR) circuit that initializes the device upon power-up. The DAC registers are set to zero-scale and the device is powered down with the output buffer disabled and the output pulled to GND through the 100kΩ termination resistor. Following power-up, a wake-up command must be initiated before conversions are performed.

Power-Down Modes

The MAX5812 has three software-controlled, lowpower, power-down modes. All three modes disable the output buffer and disconnect the DAC resistor string from VDD, reducing supply current draw to 300nA. In power-down mode 0, the device output is high impedance. In power-down mode 1, the device output is internally pulled to GND by a 1kΩ termination resistor. In power-down mode 2, the device output is internally pulled to GND by a 100kΩ termination resistor. Table 1 shows the power-down mode command words.

Upon wake-up, the DAC output is restored to its previous value. Data is retained in the input and DAC registers during power-down mode.

Digital Interface

The MAX5812 features an I2C/SMBus-compatible 2-wire interface consisting of a serial data line (SDA)

Pin Description

Table 1. Power-Down Command Bits

PIN NAME FUNCTION

1VDDPower Supply and DAC Reference Input

2 GND Ground

3 SDA Bidirectional Serial Data I/O

4 SCL Serial Clock Line

5 ADD Address Select. A logic high sets the address LSB to 1; a logic low sets the address LSB to 0.

6 OUT Analog Output

OUT

()

REF

POWER-DOWN

COMMAND BITS

PD1 PD0

0 0 Power-up device. DAC output restored to previous value.

0 1 Power-down mode 0. Powers down device with output floating.

1 0 Power-down mode 1. Powers down device with output terminated with 1kΩ to GND.

1 1 Power-down mode 2. Powers down device with output terminated with 100kΩ to GND.

MODE/FUNCTION

Page 8

MAX5812

12-Bit Low-Power, 2-Wire, Serial Voltage-Output DAC

8 _______________________________________________________________________________________

and a serial clock line (SCL). The MAX5812 is SMBus compatible within the range of VDD= 2.7V to 3.6V. SDA and SCL facilitate bidirectional communication between the MAX5812 and the master at rates up to 400kHz. Figure 1 shows the 2-wire interface timing diagram. The MAX5812 is a transmit/receive slave-only device, relying upon a master to generate a clock signal. The master, typically a microcontroller, initiates data transfer on the bus and generates SCL to permit that transfer.

A master device communicates to the MAX5812 by transmitting the proper address followed by command and/or data words. Each transmit sequence is framed by a START (S) or REPEATED START (Sr) condition and a STOP (P) condition. Each word transmitted over the bus is 8 bits long and is always followed by an acknowledge clock pulse.

The MAX5812 SDA and SCL drivers are open-drain outputs, requiring a pullup resistor (500Ω or greater) to generate a logic high voltage (see the Typical Operating Circuit). Series resistors RSare optional. These series resistors protect the input stages of the MAX5812 from high-voltage spikes on the bus lines and minimize crosstalk and undershoot of the bus signals.

Bit Transfer

One data bit is transferred during each SCL clock cycle. The data on SDA must remain stable during the high period of the SCL clock pulse. Changes in SDA while the SCL is high are control signals (see the START and STOP Conditions section). SDA and SCL idle high when the I2C bus is not busy.

START and STOP Conditions

When the serial interface is inactive, SDA and SCL idle high. A master device initiates communication by issuing a START condition. A START condition is a high-to-

Figure 1. Two-Wire Serial lnterface Timing Diagram

Figure 2. START/STOP Conditions

Figure 3. Early STOP condition

SDA

SU, STA

HD, STA

SCL

HD, STA

LOW

SU, DAT

HD, DAT

HIGH

BUF

SU, STO

REPEATED START CONDITIONSTART CONDITION

SSr

SCL

SDA

SCL

SDA

SCL

SDA

STOP START

LEGAL STOP CONDITION

STOP

CONDITION

START

CONDITION

START

ILLEGAL EARLY STOP CONDITION

ILLEGAL

STOP

Page 9

MAX5812

12-Bit Low-Power, 2-Wire, Serial

Voltage-Output DAC

_______________________________________________________________________________________ 9

low transition on SDA with SCL high. A STOP condition is a low-to-high transition on SDA while SCL is high (Figure 2). A START condition from the master signals the beginning of a transmission to the MAX5812. The master terminates transmission by issuing a not acknowledge followed by a STOP condition (see the Acknowledge Bit section). The STOP condition frees the bus. If a repeated START condition (Sr) is generated instead of a STOP condition, the bus remains active. When a STOP condition or incorrect address is detected, the MAX5812 internally disconnects SCL from the serial interface until the next START condition, minimizing digital noise and feedthrough.

Early STOP Conditions

The MAX5812 recognizes a STOP condition at any point during transmission except when a STOP condition occurs in the same high pulse as a START condition (Figure 3). This condition is not a legal I2C format, at least one clock pulse must separate any START and STOP conditions.

Repeated START Conditions

A repeated start (S

) condition might indicate a change of data direction on the bus. Such a change occurs when a command word is required to initiate a read operation. Sralso can be used when the bus master is writing to several I2C devices and does not want to relinquish control of the bus. The MAX5812 serial interface supports continuous write operations with or without an Srcondition separating them. Continuous read operations require Srconditions because of the change in direction of data flow.

Acknowledge Bit (ACK)

The acknowledge bit (ACK) is the ninth bit attached to any 8-bit data word. ACK is always generated by the receiving device. The MAX5812 generates an ACK when receiving an address or data by pulling SDA low during the ninth clock period. When transmitting data, the MAX5812 waits for the receiving device to generate an ACK. Monitoring ACK allows detection of unsuccessful data transfers. An unsuccessful data transfer occurs if a receiving device is busy or if a system fault has occurred. In the event of an unsuccessful data transfer, the bus master should reattempt communication at a later time.

Slave Address

A bus master initiates communication with a slave device by issuing a START condition followed by the 7-bit slave address (Figure 4). When idle, the MAX5812 waits for a START condition followed by its slave address. The serial interface compares each address

value bit-by-bit, allowing the interface to power-down immediately when an incorrect address is detected. The LSB of the address word is the Read/Write (R/W) bit. R/W indicates whether the master is writing to or reading from the MAX5812 (R/W = 0 selects the write condition, R/W = 1 selects the read condition). After receiving the proper address, the MAX5812 issues an ACK by pulling SDA low for one clock cycle.

The MAX5812 has eight factory/user-programmed addresses (Table 2). Address bits A6 through A1 are preset; A0 is controlled by ADD. Connecting ADD to GND sets A0 = 0. Connecting ADD to VDDsets A0 = 1. This feature allows up to eight MAX5812s to share a bus.

Write Data Format

In write mode (R/W = 0), data that follows the address byte controls the MAX5812 (Figure 5). Bits C3–C0 configure the MAX5812 (Table 3). Bits D11–D0 are DAC data. Input and DAC registers update on the falling edge of SCL during the acknowledge bit. Should the write cycle be prematurely aborted, data will not be updated and the write cycle must be repeated. Figure 6 shows two example write data sequences.

Figure 4. Slave Address Byte Definition

Table 2. MAX5812 I2C Slave Addresses

Figure 5. Command Byte Definition

PART V

MAX5812L GND 0010 000

MAX5812L V

MAX5812M GND 0010 010

MAX5812M V

MAX5812N GND 0110 100

MAX5812N V

MAX5812P GND 1010 100

MAX5812P V

S A6A5A4A3A2A1A0R/W

C3 C2 C1 C0 D11 D10 D9 D8

ADD

DEVICE ADDRESS

...A0)

0010 001

0010 011

0110 101

1010 101

Page 10

MAX5812

12-Bit Low-Power, 2-Wire, Serial Voltage-Output DAC

10 ______________________________________________________________________________________

Table 3. Command Byte Definitions

Figure 6. Example Write Command Sequences

*When C3 = 0 and C2 = 1, data bits D11 and D10 write to the power-down registers (PD1 and PD0). X = Don’t care.

C3 C2 C1 C0 D11/PD1* D10/PD0* D9–D8

1100

1101

1110

1111 X X XX

10XX X X XX

0 1 X X 0 0 XX Powers up device.

01XX 0 1 XX

01XX 1 0 XX

01XX 1 1 XX

SERIAL DATA INPUT

DAC

DATA

DAC

DATA

DAC

DATA

DAC

DATA

DAC

DATA

DAC

DATA

DAC

DATA

DAC

DATA

DAC

DATA

Load DAC with a new data from the following data byte and update DAC output simultaneously as soon as data is available from the serial bus. The DAC and input registers are updated with the new data.

Load input register with the data from the following data byte. DAC output remains unchanged.

Load input register with data from the following data byte. Update DAC output to the previously stored data.

Update DAC output from input register. The device will ignore any new data.

Read data request. Data bits are ignored. The contents of the DAC register are available on the bus.

Power-down mode 0. Powers down device with output floating.

Power-down mode 1. Powers down device with output terminated with 1kΩ to GND.

Power-down mode 2. Powers down device with output terminated with 100kΩ to GND.

FUNCTION

MSB

A6 A5 A4 A3 A2 A1 A0 C3 C2 C1 C0 D11 D10 D9 D8

MSB

D7 D6 D5 D4 D3 D2 D1 D0 P

MSB

A6 A5 A4 A3 A2 A1 A0 C3 C2 X X PD1 PD0 X X PR/W ACK ACK

EXAMPLE WRITE TO POWER-DOWN REGISTER SEQUENCE

LSB MSB LSB

R/W ACK

LSB

ACK

EXAMPLE WRITE DATA SEQUENCE

LSB

MSB

LSB

ACK

Page 11

MAX5812

12-Bit Low-Power, 2-Wire, Serial

Voltage-Output DAC

______________________________________________________________________________________ 11

Read Data Format

In read mode (R/W = 1), the MAX5812 writes the contents of the DAC register to the bus. The direction of data flow reverses after the address acknowledge by the MAX5812. The device transmits the first byte of data, waits for the master to acknowledge, and then transmits the second byte. Figure 7 shows an exampleread data sequence.

C Compatibility

The MAX5812 is compatible with existing I2C systems. SCL and SDA are high-impedance inputs; SDA has an open drain that pulls the data line low during the ninth clock pulse. The Typical Operating Circuit shows a typical I

C application. The communication protocol sup-

ports standard I

C 8-bit communications. The general

call address is ignored. The MAX5812 address is com-

patible only with the 7-bit I

C addressing protocol. Ten-

bit address formats are not supported.

Digital Feedthrough Suppression

When the MAX5812 detects an address mismatch, the serial interface disconnects the SCL signal from the core circuitry. This minimizes digital feedthrough caused by the SCL signal on a static output. The serial interface reconnects the SCL signal when a valid START condition is detected.

Applications Information

Powering the Device From an

External Reference

The MAX5812 uses the VDDas the DAC voltage reference. Any power-supply noise is directly coupled to the device output. The circuit in Figure 8 uses a precision voltage reference to power the MAX5812, isolating the device from any power-supply noise. Powering the MAX5812 in such a manner greatly improves overall performance, especially in noisy systems. The MAX6030 (3V, 75ppm/°C) or the MAX6050 (5V, 75ppm/°C) precision voltage references are ideal choices because of the low power requirements of the MAX5812.

Digital Inputs and Interface Logic

The MAX5812 2-wire digital interface is I2C and SMBuscompatible. The two digital inputs (SCL and SDA) load

Figure 7. Example Read Word Data Sequence

Figure 8. Powering the MAX5812 from An External Reference

MSB LSB MSB LSB

SA6

Sr A6

MSB LSB

D7 D6 D5 D4 D3 D2 D1 D0

A4 A3 A2 A1 A0 C3 C2

DATA BYTES GENERATED BY MASTER DEVICE

A4 A3 A2 A1 A0

DATA BYTES GENERATED BY MAX5812

MAX6030/

MAX6050

GND

OUT

MAX5812

GND

R/W

= 0

LSBMSB

R/W

= 1

OUT

XX XXX

ACK

MSB LSB

ACK

ACK P

PD0 D11 D10 D9 D8

PD1

ACK GENERATED BY

MASTER DEVICE

ACK

Page 12

MAX5812

the digital input serially into the DAC. Schmitt-trigger buffered inputs allow slow transition interfaces such as optocouplers to interface directly to the device. The digital inputs are compatible with CMOS logic levels.

Power-Supply Bypassing and

Ground Management

Careful PC board layout is important for optimal system performance. Keep analog and digital signals separate to reduce noise injection and digital feedthrough. Use a ground plane to ensure that the ground return from GND to the power supply ground is short and low impedance. Bypass V

with a 0.1µF capacitor to

ground as close to the device as possible.

Chip Information

TRANSISTOR COUNT: 7172

PROCESS: BiCMOS

12-Bit Low-Power, 2-Wire, Serial Voltage-Output DAC

12 ______________________________________________________________________________________

Functional Diagram

Selector Guide

INPUT

MUX AND DAC

SERIAL

INTERFACE

SDA ADD SCL GND

12-BIT

DAC

POWER-DOWN

CIRCUITRY

OUT

RESISTOR NETWORK

MAX5812

PART ADDRESS

MAX5812LEUT 0010 00X

MAX5812MEUT 0010 01X

MAX5812NEUT 0110 10X

MAX5812PEUT 1010 10X

Page 13

MAX5812

12-Bit Low-Power, 2-Wire, Serial

Voltage-Output DAC

Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.

Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 13

Package Information