Rainbow Electronics MAX5811 User Manual

General Description

The MAX5811 is a single, 10-bit voltage-output digital-to­analog converter (DAC) with an I2C™-compatible 2-wire
interface that operates at clock rates up to 400kHz. The
device operates from a single 2.7V to 5.5V supply and
draws only 100µA at VDD= 3.6V. A low-power power­down mode decreases current consumption to less than
1µA. The MAX5811 features three software-selectable
power-down output impedances: 100kΩ, 1kΩ, and high
impedance. Other features include an internal precision
Rail-to-Rail®output buffer and a power-on reset (POR)
circuit that powers up the DAC in the 100kΩ power-down
mode.

The MAX5811 features a double-buffered I2C-compatible
serial interface that allows multiple devices to share a sin­gle bus. All logic inputs are CMOS-logic compatible and
buffered with Schmitt triggers, allowing direct interfacing
to optocoupled and transformer-isolated interfaces. The
MAX5811 minimizes digital noise feedthrough by discon­necting the clock (SCL) signal from the rest of the device
when an address mismatch is detected.

The MAX5811 is specified over the extended temperature
range of -40°C to +85°C and is available in a space-sav­ing 6-pin SOT23 package. Refer to the MAX5812 data
sheet for the 12-bit version.

Applications

Digital Gain and Offset Adjustments
Programmable Voltage and Current Sources
Programmable Attenuation
VCO/Varactor Diode Control
Low-Cost Instrumentation
Battery-Operated Equipment

Features

♦ Ultra-Low Supply Current

100µA at V

DD

= 3.6V

130µA at VDD= 5.5V

♦ 300nA Low-Power Power-Down Mode

♦ Single 2.7V to 5.5V Supply Voltage

♦ Fast 400kHz I

2

C-Compatible 2-Wire Serial

Interface

♦ Schmitt-Trigger Inputs for Direct Interfacing

to Optocouplers

♦ Rail-to-Rail Output Buffer Amplifier

♦ Three Software-Selectable Power-Down Output

Impedances

100kΩ, 1kΩ, and High Impedance

♦ Read-Back Mode for Bus and Data Checking

♦ Power-On Reset to Zero

♦ Miniature 6-Pin SOT23 Package

MAX5811

10-Bit, Low-Power, 2-Wire Interface, Serial,

Voltage-Output DAC

________________________________________________________________ Maxim Integrated Products 1

Pin Configuration

Ordering Information

Typical Operating Circuit

19-2270; Rev 0; 1/02

For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.

Functional Diagram appears at end of data sheet.

Rail-to-Rail is a registered trademark of Nippon Motorola, Ltd.
I

2

C is a trademark of Philips Corp.

PART TEMP RANGE

MAX5811LEUT-T -40°C to +85°C 6 SOT23-6 AAYS

MAX5811MEUT-T -40°C to +85°C 6 SOT23-6 AAYU

MAX5811NEUT-T -40°C to +85°C 6 SOT23-6 AAYW

MAX5811PEUT-T -40°C to +85°C 6 SOT23-6 AAYY

PIN­PACKAGE

TOP

MARK

V

DD

µC

SCL

SDA

R

R

P

P

R

S

SCL

R

S

SDA

R

S

SCL

R

S

SDA

MAX5811

MAX5811

V

OUT

V

OUT

DD

DD

V

DD

TOP VIEW

1

V

DD

2

GND

3

SDA

6

OUT

ADD

MAX5811

SOT23

5

SCL

4

MAX5811

10-Bit Low Power 2-Wire Interface Serial,
Voltage-Output DAC

2 _______________________________________________________________________________________

ABSOLUTE MAXIMUM RATINGS

ELECTRICAL CHARACTERISTICS

(VDD= +2.7V to +5.5V, GND = 0, RL= 5kΩ, CL= 200pF, TA= T

MIN

to T

MAX

, unless otherwise noted. Typical values are at

V

DD

= +5V, TA= +25°C.) (Note 1)

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.

VDD, SCL, SDA to GND............................................-0.3V to +6V

OUT, ADD to GND........................................-0.3V to V

DD

+ 0.3V

Maximum Current into Any Pin............................................50mA

Continuous Power Dissipation (T

A

= +70°C)

6-Pin SOT23 (derate 9.1mW above +70°C).................727mW

Operating Temperature Range ...........................-40°C to +85°C

Maximum Junction Temperature .....................................+150°C

Storage Temperature Range .............................-65°C to +150°C

Lead Temperature (soldering, 10s) .................................+300°C

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

STATIC ACCURACY (Note 2)

Resolution N 10 Bits

Integral Nonlinearity INL (Note 3) ±0.5 ±4 LSB

Differential Nonlinearity DNL Guaranteed monotonic (Note 3) ±0.5 LSB

Zero-Code Error ZCE Code = 000 hex, VDD = 2.7V ±6 ±40 mV

Zero-Code Error Tempco 2.3 ppm/°C

Gain Error GE Code = 3FF hex -0.8 -3 %FS

Gain-Error Tempco 0.26 ppm/°C

DAC OUTPUT

Output Voltage Range No load (Note 4) 0 V

DC Output Impedance Code = 200 hex 1.2 Ω

Short-Circuit Current

Wake-Up Time

DAC Output Leakage Current

DIGITAL INPUTS (SCL, SDA)

Input High Voltage V

Input Low Voltage V

Input Hysteresis

Input Leakage Current Digital inputs = 0 or V

Input Capacitance 6pF

DIGITAL OUTPUT (SDA)

Output Logic Low Voltage V

Three-State Leakage Current I

Three-State Output Capacitance 6pF

VDD = 5V, V

V

= 3V, V

DD

VDD = 5V 8

V

= 3V 8

DD

Power-down mode = high impedance,

= 5.5V, V

V

DD

IH

IL

I

OL

L

= 3mA 0.4 V

SINK

Digital inputs = 0 or V

= full scale (short to GND) 42.2

OUT

= full scale (short to GND) 15.1

OUT

= VDD or GND

OUT

DD

DD

±0.1 ±1 µA

0.7 x
V

DD

0.05 x
V

DD

±0.1 ±1µA

±0.1 ±1µA

DD

0.3 x
V

DD

V

mA

µs

V

V

V

MAX5811

10-Bit Low Power 2-Wire Interface Serial,

Voltage-Output DAC

_______________________________________________________________________________________ 3

Note 1: All devices are 100% production tested at TA= +25°C and are guaranteed by design for TA= T

MIN

to T

MAX

.

Note 2: Static specifications are tested with the output unloaded.
Note 3: Linearity is guaranteed from codes 29 to 995.
Note 4: Offset and gain error limit the FSR.
Note 5: Guaranteed by design. Not production tested.

ELECTRICAL CHARACTERISTICS (continued)

(VDD= +2.7V to +5.5V, GND = 0, RL= 5kΩ, CL= 200pF, TA= T

MIN

to T

MAX

, unless otherwise noted. Typical values are at

V

DD

= +5V, TA= +25°C.) (Note 1)

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

DYNAMIC PERFORMANCE

Voltage-Output Slew Rate SR 0.5 V/µs

Voltage-Output Settling Time

Digital Feedthrough Code = 000 hex, digital inputs from 0 to V

Digital-to-Analog Glitch Impulse

POWER SUPPLIES

Supply Voltage Range V

Supply Current with
No Load

Power-Down Supply Current All digital inputs at 0 or V

TIMING CHARACTERISTICS (Figure 1)

Serial Clock Frequency f

Bus-Free Time Between STOP
and START Conditions

START Condition Hold Time t

SCL Pulse Width Low t

SCL Pulse Width High t

Repeated START Setup Time t

Data Hold Time t

Data Setup Time t

SDA and SCL Receiving
Rise Time

SDA and SCL Receiving
Fall Time

SDA Transmitting Fall Time t

STOP Condition Setup Time t

Bus Capacitance C

Maximum Duration of
Suppressed Pulse Widths

SCL

t

BUF

HD,STA

LOW

HIGH

SU,STA

HD,DAT

SU,DAT

SU,STO

t

To 1/2LSB code 100 hex to 300 hex or 300
hex to 100 hex (Note 5)

Major-carry transition (code = 1FF hex to 200
hex and 200 hex to 1FF hex)

DD

All digital inputs at 0 or VDD = 3.6V 100 170

All digital inputs at 0 or V

(Note 5) 0 300 ns

t

r

(Note 5) 0 300 ns

t

f

(Note 5)

f

(Note 5) 400 pF

b

SP

DD

DD

412µs

DD

2.7 5.5 V

= 5.5V 130 190

= 5.5V 0.3 1 µA

0 400 kHz

1.3 µs

0.6 µs

1.3 µs

0.6 µs

0.6 µs

0 0.9 µs

100 ns

20 +

0.1C

0.6 µs

050ns

0.2 nV-s

12 nV-s

b

250 ns

MAX5811

10-Bit Low Power 2-Wire Interface Serial,
Voltage-Output DAC

4 _______________________________________________________________________________________

Typical Operating Characteristics

(VDD= +5V, RL= 5kΩ, TA= +25°C.)

INTEGRAL NONLINEARITY

vs. INPUT CODE

1.00

0.75

0.50

0.25

0

-0.25

-0.50

INTEGRAL NONLINEARITY (LSB)

-0.75

-1.00
0 256 512 768 1024

INPUT CODE

DIFFERENTIAL NONLINEARITY

vs. INPUT CODE

1.00

0.75

0.50

0.25

0

-0.25

-0.50

DIFFERENTIAL NONLINEARITY (LSB)

-0.75

-1.00
0 256 512 768 1024

INPUT CODE

ZERO-CODE ERROR

vs. SUPPLY VOLTAGE

10

1.25

MAX5811 toc01

1.00

0.75

0.50

INTEGRAL NONLINEARITY (LSB)

0.25

0

0

MAX5811 toc04

-0.1

-0.2

-0.3

-0.4

DIFFERENTIAL NONLINEARITY (LSB)

-0.5

10

INTEGRAL NONLINEARITY

vs. SUPPLY VOLTAGE

2.7 4.13.4 4.8 5.5
SUPPLY VOLTAGE (V)

DIFFERENTIAL NONLINEARITY

vs. SUPPLY VOLTAGE

2.7 4.13.4 4.8 5.5
SUPPLY VOLTAGE (V)

ZERO-CODE ERROR

vs. TEMPERATURE

1.25

MAX5811 toc02

1.00

0.75

0.50

INTEGRAL NONLINEARITY (LSB)

0.25

0

-40 10-15 35 60 85

DIFFERENTIAL NONLINEARITY

0

MAX5811 toc05

-0.1

-0.2

-0.3

-0.4

DIFFERENTIAL NONLINEARITY (LSB)

-0.5

-40 10-15 35 60 85

-2.0

INTEGRAL NONLINEARITY

vs. TEMPERATURE

vs. TEMPERATURE

vs. SUPPLY VOLTAGE

MAX5811 toc03

TEMPERATURE (°C)

MAX5811 toc06

TEMPERATURE (°C)

GAIN ERROR

8

6

4

ZERO-CODE ERROR (mV)

2

NO LOAD

0

2.7 4.13.4 4.8 5.5
SUPPLY VOLTAGE (V)

MAX8511 toc07

ZERO-CODE ERROR (mV)

8

6

4

2

NO LOAD

0

-40 10-15 35 60 85
TEMPERATURE (°C)

MAX5811 toc08

GAIN ERROR (%FSR)

-1.6

-1.2

-0.8

-0.4

0

2.7 4.13.4 4.8 5.5
SUPPLY VOLTAGE (V)

MAX5811 toc09

NO LOAD

MAX5811

10-Bit Low Power 2-Wire Interface Serial,

Voltage-Output DAC

_______________________________________________________________________________________ 5

Typical Operating Characteristics (continued)

(VDD= +5V, RL= 5kΩ, TA= +25°C.)

GAIN ERROR vs. TEMPERATURE

-2.0

-1.6

-1.2

-0.8

GAIN ERROR (%FSR)

-0.4

NO LOAD

0

-40

10-15 35 60 85

TEMPERATURE (°C)

SUPPLY CURRENT

vs. INPUT CODE

120

100

80

60

40

SUPPLY CURRENT (µA)

20

NO LOAD

0

0 512256 768 1024

INPUT CODE

6

MAX5811 toc10

MAX5811 toc13

5

4

3

2

DAC OUTPUT VOLTAGE (V)

1

0

100

95

90

SUPPLY CURRENT (µA)

85

80

DAC OUTPUT VOLTAGE

vs. OUTPUT SOURCE CURRENT (NOTE 6)

2.5

MAX5811 toc11

2.0

1.5

1.0

DAC OUTPUT VOLTAGE (V)

CODE = 3FF hex

010

4268

OUTPUT SOURCE CURRENT (mA)

0.5

0

SUPPLY CURRENT

vs. TEMPERATURE

100

MAX5811 toc14

90

80

70

SUPPLY CURRENT (µA)

NO LOAD
CODE = 3FF hex

-40 10-15 35 60 85
TEMPERATURE (°C)

60

50

DAC OUTPUT VOLTAGE

vs. OUTPUT SINK CURRENT (NOTE 6)

CODE = 100 hex

0426810

OUTPUT SINK CURRENT (mA)

SUPPLY CURRENT

vs. SUPPLY VOLTAGE

2.5 4.53.5 5.5
SUPPLY VOLTAGE (V)

CODE = 3FF hex
NO LOAD

MAX5811 roc12

MAX5811 toc15

POWER-DOWN SUPPLY CURRENT

vs. SUPPLY VOLTAGE

500

400

300

200

100

POWER-DOWN SUPPLY CURRENT (nA)

0

2.7 4.13.4 4.8 5.5

TA = -40°C

TA = +25°C

Z
NO LOAD

SUPPLY VOLTAGE (V)

= HIGH IMPEDANCE

OUT

TA = +85°C

MAX58111 toc16

V

OUT

POWER-UP GLITCH

DD

100µs/div

MAX5811 toc17

5V

0

10mV/div

EXITING SHUTDOWN

= 200pF CODE = 200 hex

C

LOAD

2µs/div

MAX5811 toc18

500mV/divOUT

MAX5811

10-Bit Low Power 2-Wire Interface Serial,
Voltage-Output DAC

6 _______________________________________________________________________________________

Typical Operating Characteristics (continued)

(VDD= +5V, RL= 5kΩ, TA= +25°C.)

OUT

5V

0

10mV/div

V

DD

100µs/div

MAJOR-CARRY TRANSITION

(POSITIVE)

MAX5811 toc19

MAJOR-CARRY TRANSITION

(NEGATIVE)

MAX5811 toc20

5mV/divOUT

2µs/div

C

LOAD

= 200pF

R

L

= 5kΩ

CODE = 200 hex to 1FF hex

SETTLING TIME

(POSITIVE)

MAX5811 toc21

500mV/divOUT

2µs/div

C

LOAD

= 200pF CODE = 100 hex to 300 hex

SETTLING TIME

(NEGATIVE)

MAX5811 toc22

500mV/divOUT

2µs/div

C

LOAD

= 200pF CODE = 300 hex to 100 hex

DIGITAL FEEDTHROUGH

MAX5811 toc23

C

LOAD

= 200pF

f

SCL

= 12kHz

CODE = 000 hex

Note 6: The ability to drive loads less than 5kΩ is not implied.

MAX5811

10-Bit Low Power 2-Wire Interface Serial,

Voltage-Output DAC

_______________________________________________________________________________________ 7

Detailed Description

The MAX5811 is a 10-bit, voltage-output DAC with an
I2C/SMBus-compatible 2-wire interface. The device
consists of a serial interface, power-down circuitry,
input and DAC registers, a 10-bit resistor string DAC,
unity-gain output buffer, and output resistor network.
The serial interface decodes the address and control
bits, routing the data to either the input or DAC register.
Data can be directly written to the DAC register imme­diately updating the device output, or can be written to
the input register without changing the DAC output.
Both registers retain data as long as the device is pow­ered.

DAC Operation

The MAX5811 uses a segmented resistor string DAC
architecture, which saves power in the overall system
and guarantees output monotonicity. The MAX5811’s
input coding is straight binary, with the output voltage
given by the following equation:

where N = 10 (bits), and D = the decimal value of the
input code (0 to 1023).

Output Buffer

The MAX5811 analog output is buffered by a precision,
unity-gain follower that slews at about 0.5V/µs. The

buffer output swings rail-to-rail, and is capable of dri­ving 5kΩ in parallel with 200pF. The output settles to
±0.5LSB within 4µs.

Power-On Reset

The MAX5811 features an internal POR circuit that ini­tializes the device upon power-up. The DAC registers
are set to zero scale and the device is powered-down
with the output buffer disabled and the output pulled to
GND through the 100kΩ termination resistor. Following
power-up, a wake-up command must be initiated
before any conversions are performed.

Power-Down Modes

The MAX5811 has three software-controlled low-power
power-down modes. All three modes disable the output
buffer and disconnect the DAC resistor string from V

DD

,
reducing supply current draw to 300nA. In power-down
mode 0, the device output is high impedance. In
power-down mode 1, the device output is internally
pulled to GND by a 1kΩ termination resistor. In power­down mode 2, the device output is internally pulled to
GND by a 100kΩ termination resistor. Table 1 shows
the power-down mode command words.

Upon wake-up, the DAC output is restored to its previ­ous value. Data is retained in the input and DAC regis­ters during power-down mode.

Digital Interface

The MAX5811 features an I2C/SMBus-compatible 2­wire interface consisting of a serial data line (SDA) and

Pin Description

Table 1. Power-Down Command Bits

PIN NAME FUNCTION

1VDDPower Supply and DAC Reference Input

2 GND Ground

3 SDA Bidirectional Serial Data I/O

4 SCL Serial Clock Line

5 ADD Address Select. A logic high sets the address LSB to 1, a logic low sets the address LSB to 0.

6 OUT Analog Output

V

OUT

=

VD

()

×

REF

N

2

POWER-DOWN

COMMAND BITS

PD1 PD0

0 0 Power-up device. DAC output restored to previous value.

0 1 Power-down mode 0. Power-down device with output floating.

1 0 Power-down mode 1. Power-down device with output terminated with 1kΩ to GND.

1 1 Power-down mode 2. Power-down device with output terminated with 100kΩ to GND.

MODE/FUNCTION

MAX5811

10-Bit Low Power 2-Wire Interface Serial,
Voltage-Output DAC

8 _______________________________________________________________________________________

a serial clock line (SCL). The MAX5811 is SMBus com­patible within the range of VDD= 2.7V to 3.6V. SDA and
SCL facilitate bidirectional communication between the
MAX5811 and the master at rates up to 400kHz. Figure
1 shows the 2-wire interface timing diagram. The
MAX5811 is a transmit/receive slave-only device, rely­ing upon a master to generate a clock signal. The mas­ter (typically a microcontroller) initiates data transfer on
the bus and generates SCL to permit that transfer.

A master device communicates to the MAX5811 by
transmitting the proper address followed by command
and/or data words. Each transmit sequence is framed
by a START (S) or REPEATED START (Sr) condition and
a STOP (P) condition. Each word transmitted over the
bus is 8 bits long and is always followed by an
acknowledge clock pulse.

The MAX5811 SDA and SCL drivers are open-drain
outputs, requiring a pullup resistor (500Ω or greater) to
generate a logic high voltage (see Typical Operating
Circuit). Series resistors RSare optional. These series
resistors protect the input stages of the MAX5811 from
high-voltage spikes on the bus lines, and minimize
crosstalk and undershoot of the bus signals.

Bit Transfer

One data bit is transferred during each SCL clock
cycle. The data on SDA must remain stable during the
high period of the SCL clock pulse. Changes in SDA
while SCL is high are control signals (see START and
STOP Conditions). SDA and SCL idle high when the
I2C bus is not busy.

START and STOP Conditions

When the serial interface is inactive, SDA and SCL idle
high. A master device initiates communication by issu­ing a START condition. A START condition is a high-to-

Figure 1. 2-Wire Serial lnterface Timing Diagram

Figure 2. START/STOP Conditions

Figure 3. Early STOP Condition

SDA

t

SU, STA

t

HD, STA

t

SP

t

SU, STO

SCL

t

HD, STA

t

LOW

t

SU, DAT

t

HD, DAT

t

HIGH

t

R

t

F

t

BUF

REPEATED START CONDITIONSTART CONDITION

SS

SCL

SDA

SCL

SDA

STOP START

LEGAL STOP CONDITION

SCL

SDA

CONDITION

r

STOP

START

CONDITION

P

START

ILLEGAL EARLY STOP CONDITION

ILLEGAL

STOP

MAX5811

10-Bit Low Power 2-Wire Interface Serial,

Voltage-Output DAC

_______________________________________________________________________________________ 9

low transition on SDA with SCL high. A STOP condition
is a low-to-high transition on SDA while SCL is high
(Figure 2). A START condition from the master signals
the beginning of a transmission to the MAX5811. The
master terminates transmission by issuing a not
acknowledge followed by a STOP condition (see
Acknowledge Bit). The STOP condition frees the bus. If
a repeated START condition (Sr) is generated instead of
a STOP condition, the bus remains active. When a
STOP condition or incorrect address is detected, the
MAX5811 internally disconnects SCL from the serial
interface until the next START condition, minimizing digi­tal noise and feedthrough.

Early STOP Conditions

The MAX5811 recognizes a STOP condition at any point
during transmission except if a STOP condition occurs in
the same high pulse as a START condition (Figure 3).
This condition is not a legal I2C format; at least one
clock pulse must separate any START and STOP condi­tions.

Repeated START Conditions

A REPEATED START (S

r

) condition may indicate a
change of data direction on the bus. Such a change
occurs when a command word is required to initiate a
read operation. Srmay also be used when the bus
master is writing to several I2C devices and does not
want to relinquish control of the bus. The MAX5811 ser­ial interface supports continuous write operations with
or without an Srcondition separating them. Continuous
read operations require Srconditions because of the
change in direction of data flow.

Acknowledge Bit (ACK)

The acknowledge bit (ACK) is the ninth bit attached to
any 8-bit data word. ACK is always generated by the
receiving device. The MAX5811 generates an ACK
when receiving an address or data by pulling SDA low
during the ninth clock period. When transmitting data,
the MAX5811 waits for the receiving device to generate
an ACK. Monitoring ACK allows for detection of unsuc­cessful data transfers. An unsuccessful data transfer
occurs if a receiving device is busy or if a system fault
has occurred. In the event of an unsuccessful data
transfer, the bus master should reattempt communica­tion at a later time.

Slave Address

A bus master initiates communication with a slave
device by issuing a START condition followed by the 7­bit slave address (Figure 4). When idle, the MAX5811
waits for a START condition followed by its slave
address. The serial interface compares each address

value bit by bit, allowing the interface to power down
immediately if an incorrect address is detected. The
LSB of the address word is the Read/Write (R/W) bit.
R/W indicates whether the master is writing to or read­ing from the MAX5811 (R/W = 0 selects the write condi­tion, R/W = 1 selects the read condition). After
receiving the proper address, the MAX5811 issues an
ACK by pulling SDA low for one clock cycle.

The MAX5811 has eight different factory/user-pro­grammed addresses (Table 2). Address bits A6
through A1 are preset, while A0 is controlled by ADD.
Connecting ADD to GND sets A0 = 0. Connecting ADD
to VDDsets A0 = 1. This feature allows up to eight
MAX5811s to share the same bus.

Write Data Format

In write mode (R/W = 0), data that follows the address
byte controls the MAX5811 (Figure 5). Bits C3–C0 con­figure the MAX5811 (Table 3). Bits D9–D0 are DAC
data. Bits S1 and S0 are sub-bits and are always zero.
Input and DAC registers update on the falling edge of
SCL during the acknowledge bit. Should the write cycle
be prematurely aborted, data is not updated and the

Figure 4. Slave Address Byte Definition

Table 2. MAX5811 I2C Slave Addresses

Figure 5. Command Byte Definition

PART V

MAX5811L GND 0010 000

MAX5811L V

MAX5811M GND 0010 010

MAX5811M V

MAX5811N GND 0110 100

MAX5811N V

MAX5811P GND 1010 100

MAX5811P V

S A6A5A4A3A2A1A0R/W

C3 C2 C1 C0 D9 D8 D7 D6

ADD

DD

DD

DD

DD

DEVICE ADDRESS

...A0)

(A

6

0010 001

0010 011

0110 101

1010 101

MAX5811

10-Bit Low Power 2-Wire Interface Serial,
Voltage-Output DAC

10 ______________________________________________________________________________________

write cycle must be repeated. Figure 6 shows two
example write data sequences.

Read Data Format

In read mode (R/W = 1), the MAX5811 writes the con­tents of the DAC register to the bus. The direction of

Table 3. Command Byte Definitions

Figure 6. Example Write Command Sequences

*When C3 = 0 and C2 = 1, data bits D9 and D8 write to the power-down registers (PD1 and PD0).
X = Don’t care.

C3 C2 C1 C0 D9/PD1* D8/PD0* D7-D6

1100

1101

1110

1111 X X XX

10XX X X XX

0 1 X X 0 0 XX Power up the device.

01XX 0 1 XX

01XX 1 0 XX

01XX 1 1 XX

SERIAL DATA INPUT

DAC

DATA

DAC

DATA

DAC

DATA

DAC

DATA

DAC

DATA

DAC

DATA

DAC

DATA

DAC

DATA

DAC

DATA

Load DAC with new data from the following data byte and
update DAC output simultaneously as soon as data is
available from the serial bus. The DAC and input registers
are updated with the new data.

Load input register with data from the following data byte.
DAC output remains unchanged.

Load input register with data from the following data byte.
Update DAC output to the previously stored data.

Update DAC output from input register. The device
ignores any new data.

Read data request. Data bits are ignored. The contents of
the DAC register are available on the bus.

Power-down mode 0. Power down device with output
floating.

Power-down mode 1. Power down device with output
terminated with 1kΩ to GND.

Power-down mode 2. Power down device with output
terminated with 100kΩ to GND.

FUNCTION

MSB

S

A6 A5 A4 A3 A2 A1 A0 C3 C2 C1 C0 D9 D8 D7 D6

MSB

D5 D4 D3 D2 D1 D0 S1 S0 P

MSB

S

A6 A5 A4 A3 A2 A1 A0 C3 C2 X X PD1 PD0 X X PR/W ACK ACK

EXAMPLE WRITE TO POWER-DOWN REGISTER SEQUENCE

LSB MSB LSB

R/W ACK

LSB

ACK

EXAMPLE WRITE DATA SEQUENCE

LSB

MSB

LSB

ACK

MAX5811

10-Bit Low Power 2-Wire Interface Serial,

Voltage-Output DAC

______________________________________________________________________________________ 11

data flow reverses following the address acknowledge
by the MAX5811. The device transmits the first byte of
data, waits for the master to acknowledge, then trans­mits the second byte. Figure 7 shows an example read
data sequence.

I2C Compatibility

The MAX5811 is compatible with existing I2C systems.
SCL and SDA are high-impedance inputs; SDA has an
open drain that pulls the data line low during the ninth
clock pulse. The Typical Operating Circuit shows a typ­ical I2C application. The communication protocol sup­ports the standard I2C 8-bit communications. The
general call address is ignored. The MAX5811 address
is compatible with the 7-bit I2C addressing protocol
only. No 10-bit address formats are supported.

Digital Feedthrough Suppression

When the MAX5811 detects an address mismatch, the
serial interface disconnects the SCL signal from the
core circuitry. This minimizes digital feedthrough
caused by the SCL signal on a static output. The serial
interface reconnects the SCL signal once a valid
START condition is detected.

Applications Information

Powering the Device from an

External Reference

The MAX5811 uses the VDDas the DAC voltage refer­ence. Any power-supply noise is directly coupled to the
device output. The circuit in Figure 8 uses a precision
voltage reference to power the MAX5811, isolating the
device from any power-supply noise. Powering the
MAX5811 in such a manner greatly improves overall
performance, especially in noisy systems. The
MAX6030 (3V, 75ppm/°C) or the MAX6050 (5V,
75ppm/°C) precision voltage references are ideal
choices due to the low power requirements of the
MAX5811.

Digital Inputs and Interface Logic

The MAX5811 2-wire digital interface is I2C and SMBus
compatible. The two digital inputs (SCL and SDA) load
the digital input serially into the DAC. Schmitt-trigger
buffered inputs allow slow-transition interfaces such as

Figure 7. Read Word Data Sequence

Figure 8. Powering the MAX5811 from an External Reference

MSB LSB MSB LSB

SA6

Sr A6

MSB LSB

D5 D4 D3 D2 D1 D0 X X

IN

A4 A3 A2 A1 A0 C3 C2

A5

A4 A3 A2 A1 A0

A5

OUT

MAX6030/

MAX6050

GND

R/W

ACK

= 0

DATA BYTES GENERATED BY MASTER DEVICE

LSBMSB

R/W

ACK

= 1

DATA BYTES GENERATED BY MAX5811

ACK P

V

DD

MAX5811

OUT

GND

XX XXX

X

MSB LSB

XX

PD0 D9 D8 D7 D6

PD1

ACK GENERATED BY

MASTER DEVICE

ACK

ACK

MAX5811

optocouplers to interface directly to the device. The
digital inputs are compatible with CMOS logic levels.

Power-Supply Bypassing and

Ground Management

Careful PC board layout is important for optimal system
performance. Keep analog and digital signals separate
to reduce noise injection and digital feedthrough. Use a
ground plane to ensure that the ground return from
GND to the power-supply ground is short and low
impedance. Bypass VDDwith a 0.1µF capacitor to
ground as close to the device as possible.

Chip Information

TRANSISTOR COUNT: 7172

PROCESS: BiCMOS

10-Bit Low Power 2-Wire Interface Serial,
Voltage-Output DAC

12 ______________________________________________________________________________________

Functional Diagram

Selector Guide

V

DD

INPUT

REGISTER

MUX AND DAC

REGISTER

SERIAL

INTERFACE

SDA ADD SCL GND

10-BIT

DAC

RESISTOR

NETWORK

POWER-DOWN

CIRCUITRY

MAX5811LEUT 0010 00X

MAX5811MEUT 0010 01X

MAX5811NEUT 0110 10X

MAX5811PEUT 1010 10X

MAX5811

PART ADDRESS

OUT

MAX5811

10-Bit Low Power 2-Wire Interface Serial,

Voltage-Output DAC

Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.

Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 13

© 2002 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.

Package Information