Rainbow Electronics MAX555 User Manual
General Description
The MAX555 is an advanced, monolithic, 12-bit digitalto-analog converter (DAC) with complementary 50Ω
outputs. Fabricated using an oxide-isolated bipolar
process, the MAX555 is designed for signal-reconstruction applications at an output update rate of 300Msps.
It incorporates an analog multiplying function with
10MHz useable input bandwidth. The voltage-output
DAC uses precision laser trimming to achieve 12-bit
accuracy with ±1/2LSB integral and differential linearity
(±0.012% FS). Absolute gain error is a low 1% of full
scale. Full-scale transitions occur in less than 0.5ns.
Internal registers and a unique decoder reduce glitching and allow the MAX555 to achieve precise RF performance with over 73dBc of spurious-free dynamic range
at 50Msps with f
OUT
= 3.1MHz, or 62dBc at 300Msps
with f
OUT
= 18.6MHz.
The MAX555 operates from a single -5.2V supply and
dissipates 980mW (nominal). It comes in a 64-pin TQFP
package with exposed paddle for enhanced thermal
dissipation.
________________________Applications
Direct Digital Synthesis
Arbitrary Waveform Generation
HDTV/High-Resolution Graphics
Instrumentation
Communications Local Oscillators
Automated Tester Applications
____________________________Features
♦ 12-Bit Resolution
♦ ±1/2LSB Integral and Differential Nonlinearity
♦ Capable of 300Msps (min) Update Rate
♦ Complementary 50Ω Outputs
♦ Multiplying Reference Input
♦ Low Glitch Energy (5.6pVs)
♦ Single -5.2V Power Supply
♦ On-Chip Data Registers
♦ ECL-Compatible Inputs with Differential Clock
Ordering Information
MAX555
300Msps, 12-Bit DAC with
Complementary Voltage Outputs
________________________________________________________________ Maxim Integrated Products 1
-20mA
LGND
VOUT
VOUT
CLKCLK
ROFFSET
REF
50Ω
800Ω
800Ω
50Ω
AV
EE
BYPASS
DECODED
BIT
LINES
12-BIT
ECL
LINES
LEVEL-SENSITIVE TRANSPARENT LATCH
MAX555
___________________________________________________Simplified Block Diagram
19-0297; Rev 3; 6/02
PART
MAX555CCB 0°C to +70°C
TEMP RANGE PIN-PACKAGE
64 TQFP-EP*
Pin Configuration appears at end of data sheet.
EVALUATION KIT MANUAL
AVAILABLE
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
*EP = Exposed pad.
MAX555
300Msps, 12-Bit DAC with
Complementary Voltage Outputs
2 _______________________________________________________________________________________
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS
(AVEE= DVEE= -5.2V, V
REF
= 1.000V, T
MIN
to T
MAX
= 0°C to +70°C, unless otherwise noted.) (Note 2.)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
Note 1: Typical thermal resistance, junction-to-case R
θJC
= 25°C/W. See Package Information.
Analog Supply Voltage (AV
EE
) .................................-7V to +0.3V
Digital Supply Voltage (DV
EE
) ..................................-7V to +0.3V
Digital Input Voltage (D0–D11) ...................................-5.5V to 0V
Reference Input Voltage (V
IN
) .................................0V to +1.25V
Reference Input Current....................................0mA to +1.56mA
Output Compliance Voltage (V
OC
)......................-1.25V to +1.0V
Output Common-Mode Voltage (V
CM
) ................-0.25V to +1.0V
Continuous Power Dissipation (T
A
= +70°C)
(without additional heatsink) ..............................................1.3W
Operating Temperature Range...............................0°C to +70°C
Junction Temperature Range (Note 1) .................0°C to +150°C
Storage Temperature Range .............................-65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
V
REF
= 1.000V, current out, into
virtual ground, end-point linearity
Major carry, TA= +25°C
10% to 90%, TA= +25°C
90% to 10%, TA= +25°C
V
REF
= 1.000V, voltage out, VOUT/VIN (Note 3)
±0.024% FS, 1LSB change
D0–D11 = logic 1, V
REF
= 1.000V,
measured at VOUT
±0.1% FS
CONDITIONS
ns
15
Settling Time
4
% FS
-0.05 ±0.01 0.05DLE2
Differential Linearity Error
-0.012 ±0.003 0.012DLE1
pVs5.6Glitch Energy
ps570t
RISE
Rise Time
ps410t
FALL
Fall Time
% FS-1.0 ±0.2 +1.0GEAbsolute Gain Error
Guaranteed12-Bit Monotonicity
µA40 100I
OS
Output Offset Current
UNITSMIN TYP MAXSYMBOLPARAMETER
VOUT
VOUT
V
REF
= 1.000V, current out, into
virtual ground, end-point linearity
VOUT
% FS
-0.05 ±0.01 0.05ILE2
Integral Linearity Error
VOUT
-0.012 ±0.006 0.012ILE1
D0–D11 = logic 0, V
REF
= 0V,
measured at VOUT
µA350I
LEAK
Output Leakage Current
f
OUT
= 5MHz, f
CLK
= 50MHz 72
f
OUT
= 20MHz, f
CLK
= 100MHz
f
OUT
= 10MHz, f
CLK
= 50MHz
63
68
f
OUT
= 30MHz, f
CLK
= 200MHz
f
OUT
= 30MHz, f
CLK
= 100MHz
57
58
f
OUT
= 40MHz, f
CLK
= 200MHz 54
dBc
f
OUT
= 40MHz, f
CLK
= 250MHz 53
f
OUT
= 40MHz, f
CLK
= 300MHz
f
OUT
= 50MHz, f
CLK
= 250MHz
54
51
f
OUT
= 50MHz, f
CLK
= 300MHz
SFDRSpurious-Free Dynamic Range
51
nV
√
Hz
Bits 0–11 high, TA= +25°C 10.6Output Noise
DC ACCURACY
TIME-DOMAIN PERFORMANCE (Note 4)
DYNAMIC PERFORMANCE (Notes 4, 5)
MAX555
300Msps, 12-Bit DAC with
Complementary Voltage Outputs
_______________________________________________________________________________________ 3
ELECTRICAL CHARACTERISTICS (continued)
(AVEE= DVEE= -5.2V, V
REF
= 1.000V, T
MIN
to T
MAX
= 0°C to +70°C, unless otherwise noted.) (Note 2.)
AVEE= DVEE= -5.2V
AVEE= DVEE= -5.2V
VIL= -1.95V
VOUT, VOUT
VOUT, VOUT
VIH= -0.75V
V
REF
= 1.000V, RL= 0Ω
TA= +25°C
TA= +25°C
Bypass = 1, transparent mode (Notes 4, 7)
Bypass = 1, transparent mode (Notes 4, 7)
-3dB
V
REF
= 1.000V
Bypass = 0, clocked mode (Notes 4, 7)
Bypass = 0, clocked mode (Notes 4, 7)
Bypass = 0, clocked mode (Notes 4, 7)
Bypass = 1, transparent mode (Notes 4, 7)
CONDITIONS
mA110 150 190DI
EE
Digital Power-Supply Current
mA30 46 60AI
EE
Analog Power-Supply Current
pF15C
OUT
Output Capacitance
Ω49.5 50.0 50.5R
OUT
Output Resistance
mA19.0 20.0 21.0I
OUT
Full-Scale Output Current
µV-250 0 +250V
OS
Input Offset Voltage
kV/V320AV
OL
Open-Loop Gain
MHz10BWMultiplying Input Bandwidth
Ω775 800 825R
IN
Amplifier Input Resistance
ps900t
DD
MSBs Decode Delay
µA12I
IL
Input Current, Logic Low
µA10 200I
IH
Input Current, Logic High
ns2.9t
PD1
MSBs Data-to-VOUT
Propagation Delay
ns2t
PD2
LSBs Data-to-VOUT
Propagation Delay
ns2.8t
PD3
Clock-to-VOUT
Propagation Delay
ns0.8t
HOLD
Data-to-Clock Hold Time
V-1.1 -0.75 0V
IH
Logic "1" Voltage
V-2.0 -1.95 -1.48V
IL
Logic "0" Voltage
ns1t
SU
Data-to-Clock Setup Time
UNITSMIN TYP MAXSYMBOLPARAMETER
W0.98 1.3P
DISS
Power Dissipation
°C/W25T
JA
Package Thermal Resistance,
Junction to Ambient
Note 2: All devices are 100% production tested at +25°C and are guaranteed by design for TA= T
MIN
to T
MAX
as specified.
Note 3: The gain-error method of calculation is shown below:
Definition:
[V
MEASURE(FS)
- V
IDEAL(FS)
] x 100
GE(%) = ––––––––––––––––––––––––––––––––––
V
IDEAL(FS)
where FS indicates full-scale measurements.
GE Method:
GE(%) = [(4096 / 4095) V
MEASURE
- 16(V
REF
/ RIN) (R
OUT
)] x 100
–––––––––––––––––––––––––––––––––––––––––––––——
16(V
REF
/ RIN) (R
OUT
)
= [(4096 / 4095) V
MEASURE
- 1] x 100
––––––––––––––––––––––––––––––––
1
where: V
REF
= 1.000V, RIN= 800Ω, R
OUT
= 50Ω, V
MEASURE
= VOUT (FS).
Note 4: Dynamic and timing specifications are obtained from device characterization and simulation testing and are not production tested.
Note 5: Spurious-free dynamic range is measured from the fundamental frequency to any harmonic or nonharmonic spurs within the
bandwidth f
CLK
/2, unless otherwise specified.
Note 6: Guaranteed by design.
Note 7: Timing definitions are detailed in Figure 2.
Minimum data rate = DC (Note 6) MHz300f
D
Data Update Rate
DIGITAL INPUTS
CONTROL AMPLIFIER
OUTPUT PERFORMANCE
POWER SUPPLIES
DIGITAL TIMING
MAX555
300Msps, 12-Bit DAC with
Complementary Voltage Outputs
4 _______________________________________________________________________________________
__________________________________________Typical Operating Characteristics
(AVEE= DVEE= -5.2V, V
REF
= 0.75V, TA = +25°C, unless otherwise noted.)
62
66
64
70
68
72
74
084121620
SPURIOUS-FREE DYNAMIC RANGE
vs. f
OUT
(f
CLK
= 50MHz)
MAX555-01
f
OUT
(MHz)
SFDR (dBc)
60
64
62
68
66
72
70
74
08124 16202428
SPURIOUS-FREE DYNAMIC RANGE
vs. f
OUT
(f
CLK
= 100MHz)
MAX555-02
f
OUT
(MHz)
SFDR (dBc)
50
54
62
58
66
70
0126 18243036
SPURIOUS-FREE DYNAMIC RANGE
vs. f
OUT
(f
CLK
= 150MHz)
MAX555-03
f
OUT
(MHz)
SFDR (dBc)
74
SPURIOUS-FREE DYNAMIC RANGE
vs. f
CLK
(f
OUT
~ 1/16 f
CLK
)
58
70
MAX555-07
CLOCK FREQUENCY (MHz)
SFDR (dB)
35030025020015010050
66
62
60
72
68
64
-48
0.5 0.6 0.7 0.8 0.9 1.0
3RD HARMONIC DISTORTION
vs. V
REF
VOLTAGE (f
OUT
~ 1/5 f
CLK
)
-52
MAX555-08
V
REF
(V)
3RD HARMONIC (dBc)
-56
-50
-54
-58
-60
-62
-64
-66
-68
-70
-72
f
CLK
= 100MHz
f
CLK
= 200MHz
f
CLK
= 300MHz
-48
0.5 0.6 0.7 0.8 0.9 1.0
2ND HARMONIC DISTORTION
vs. V
REF
VOLTAGE (f
OUT
~ 1/5 f
CLK
)
-52
MAX555-09
V
REF
(V)
3RD HARMONIC (dBc)
-56
-50
-54
-58
-60
-62
-64
-66
-68
-70
-72
f
CLK
= 100MHz
f
CLK
= 200MHz
f
CLK
= 300MHz
52
56
64
60
68
72
0126 18243036
SPURIOUS-FREE DYNAMIC RANGE
vs. f
OUT
(f
CLK
= 200MHz)
MAX555-04
f
OUT
(MHz)
SFDR (dBc)
52
56
64
60
68
72
0147 21283542
SPURIOUS-FREE DYNAMIC RANGE
vs. f
OUT
(f
CLK
= 250MHz)
MAX555-05
f
OUT
(MHz)
SFDR (dBc)
50
54
62
58
66
70
02010 30 40 50 60
SPURIOUS-FREE DYNAMIC RANGE
vs. f
OUT
(f
CLK
= 300MHz)
MAX555-06
f
OUT
(MHz)
SFDR (dBc)
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