Rainbow Electronics MAX5444 User Manual

General Description
The MAX5441–MAX5444 are serial-input, voltage-out­put, 16-bit digital-to-analog converters (DACs) in tiny µMAX packages, 50% smaller than comparable DACs in 8-pin SOs. They operate from low +3V (MAX5443/ MAX5444) or +5V (MAX5441/MAX5442) single sup­plies. They provide 16-bit performance (±2LSB INL and ±1LSB DNL) over temperature without any adjustments. Unbuffered DAC outputs result in a low supply current of 120µA and a low offset error of 2LSB.
The DAC output ranges from 0 to V
REF
. For bipolar operation, matched scaling resistors are provided in the MAX5442/MAX5444 for use with an external preci­sion op amp (such as the MAX400), generating a ±V
REF
output swing.
A 16-bit serial word is used to load data into the DAC latch. The 25MHz, 3-wire serial interface is compatible with SPI™/QSPI™/MICROWIRE™, and can interface directly with optocouplers for applications requiring isola­tion. A power-on reset circuit clears the DAC output to code 0 (MAX5441/MAX5443) or code 32768 (MAX5442 /MAX5444) when power is initially applied.
A logic low on CLR asynchronously clears the DAC out­put to code 0 (MAX5441/MAX5443) or code 32768 (MAX5442/MAX5444) independent of the serial interface.
The MAX5441/MAX5443 are available in 8-pin µMAX packages. The MAX5442/MAX5444 are available in 10­pin µMAX packages.
Applications
High-Resolution Offset and Gain Adjustment
Industrial Process Control
Automated Test Equipment
Data-Acquisition Systems
Features
Ultra-Small 3mm x 5mm 8-Pin µMAX Package
Low 120µA Supply Current
Fast 1µs Settling Time
25MHz SPI/QSPI/MICROWIRE-Compatible Serial
Interface
V
REF
Range Extends to V
DD
+5V (MAX5441/MAX5442) or +3V
(MAX5443/MAX5444) Single-Supply Operation
Full 16-Bit Performance Without Adjustments
Unbuffered Voltage Output Directly Drives
60kLoads
Power-On Reset Circuit Clears DAC Output to
Code 0 (MAX5441/MAX5443) or Code 32768 (MAX5442/MAX5444)
Schmitt-Trigger Inputs for Direct Optocoupler
Interface
Asynchronous CLR
MAX5441–MAX5444
+3V/+5V, Serial-Input,
Voltage-Output, 16-Bit DACs
________________________________________________________________ Maxim Integrated Products 1
Pin Configurations
19-1846; Rev 1; 6/01
Ordering Information
SPI and QSPI are trademarks of Motorola, Inc. MICROWIRE is a trademark of National Semiconductor Corp.
Functional Diagrams appear at end of data sheet.
Ordering Information continued at end of data sheet.
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
REF
SCLK
DIN
CLR
1
CS
2
MAX5442
3
MAX5444
4
5
µMAX-10
GND
8
V
7
DD
OUT
6
5
CLR
REF
CS
SCLK
DIN
TOP VIEW
1
2
3
4
MAX5441 MAX5443
µMAX-8
10
9
8
7
6
GND
V
RFB
INV
OUT
DD
PART TEMP RANGE PIN-PACKAGE INL (LSB) SUPPLY (V)
MAX5441ACUA 0°C to +70°C 8 µMAX ±2 5
MAX5441AEUA -40°C to +85°C 8 µMAX ±25 MAX5441BCUA 0°C to +70°C 8 µMAX ±45 MAX5441BEUA -40°C to +85°C 8 µMAX ±4 5 MAX5442ACUB 0°C to +70°C 10 µMAX ±25 MAX5442AEUB -40°C to +85°C 10 µMAX ±2 5 MAX5442BCUB 0°C to +70°C 10 µMAX ±45 MAX5442BEUB -40°C to +85°C 10 µMAX ±4 5
MAX5441–MAX5444
+3V/+5V, Serial-Input, Voltage-Output, 16-Bit DACs
2 _______________________________________________________________________________________
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS
(VDD= +3V (MAX5443/MAX5444) or +5V (MAX5441/MAX5442), V
REF
= +2.5V, CL= 10pF, GND = 0, RL= , TA= T
MIN
to T
MAX
,
unless otherwise noted. Typical values are at T
A
= +25°C.)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
VDDto GND..............................................................-0.3V to +6V
CS, SCLK, DIN, CLR to GND ...................................-0.3V to +6V
REF to GND................................................-0.3V to (V
DD
+ 0.3V)
OUT, INV to GND .....................................................-0.3V to V
DD
RFB to INV ...................................................................-6V to +6V
RFB to GND.................................................................-6V to +6V
Maximum Current Into Any Pin ...........................................50mA
Continuous Power Dissipation (T
A
= +70°C)
8-Pin µMAX (derate 4.5mW/°C above +70°C)...............362mW
10-Pin µMAX (derate 5.6mW/°C above +70°C) ..............444mW
Operating Temperature Ranges
MAX544 _ _CU_ ...................................................0°C to +70°C
MAX544 _ _EU_.................................................-40°C to +85°C
Storage Temperature Range .............................-65°C to +150°C
Maximum Die Temperature..............................................+150°C
Lead Temperature (soldering, 10s) .................................+300°C
Bipolar mode
Unipolar mode
(Note 3)
(Note 2)
CONDITIONS
k
6
R
REF
Reference Input Resistance (Note 4)
10
V2.0 V
DD
V
REF
Reference Input Range
Power-Supply Rejection
ppm/°C±0.5BZS
TC
Bipolar Zero Tempco
LSB
±0.015
Bipolar Resistor Matching
1
R
OUT
DAC Output Resistance k6.2
Bits16NResolution
ppm/°C±0.1Gain-Error Tempco
LSBGain Error (Note 1)
ppm/°C±0.05ZS
TC
Zero-Code Tempco
Integral Nonlinearity
UNITSMIN TYP MAXSYMBOLPARAMETER
MAX544_A
LSB
Bipolar Zero Offset Error
(Note 5) 15 V/µsSRVoltage-Output Slew Rate
DYNAMIC PERFORMANCE—ANALOG SECTION
To ±1/2LSB of FS
1 µsOutput Settling Time
%
Guaranteed monotonic LSB±0.5 ±1DNLDifferential Nonlinearity
INL
RFB/R
INV
Ratio error
±20
LSB
±1+2.7V ≤ VDD≤ +3.3V (MAX5443/MAX5444)
PSR
+4.5V ≤ VDD≤ +5.5V (MAX5441/MAX5442) ±1
Major-carry transition 7 nV-sDAC Glitch Impulse
Code = 0000 hex; CS = V
DD
;
SCLK, DIN = 0 to VDDlevels
0.2 nV-sDigital Feedthrough
±0.5 ±2
±10
ZSE LSB±2Zero-Code Offset Error
±0.5 ±4MAX544_B
STATIC PERFORMANCE—ANALOG SECTION
REFERENCE INPUT
MAX5441–MAX5444
+3V/+5V, Serial-Input,
Voltage-Output, 16-Bit DACs
_______________________________________________________________________________________ 3
TIMING CHARACTERISTICS
(VDD= +2.7V to +3.3V (MA5443/MAX5444) , VDD= +4.5V to +5.5V (MAX5441/MAX5442), V
REF
= +2.5V, GND = 0, CMOS inputs,
T
A
= T
MIN
to T
MAX
, unless otherwise noted. Typical values are at TA= +25°C.) (Figure 1)
Note 1: Gain error tested at V
REF
= +2.0V, +2.5V, and +3.0V (MAX5443/MAX5444) or V
REF
= +2.0V, +2.5V, +3.0V, and +5.5V
(MAX5441/ MAX5442).
Note 2: R
OUT
tolerance is typically ±20%.
Note 3: Min/max range guaranteed by gain-error test. Operation outside min/max limits will result in degraded performance. Note 4: Reference input resistance is code-dependent, minimum at 8555hex in unipolar mode, 4555hex in bipolar mode. Note 5: Slew-rate value is measured from 10% to 90%. Note 6: Guaranteed by design. Not production tested. Note 7: Guaranteed by power-supply rejection test and Timing Characteristics.
All digital inputs at VDDor GND
All digital inputs at VDDor GND
MAX5443/MAX5444
Code = 0000 hex, V
REF
= 1V
P-P
at 100kHz
Code = 0000 hex
Code = FFFF hex
(Note 6)
CONDITIONS
mW
0.36
PDPower Dissipation
mA0.12 0.20I
DD
Positive Supply Current
V
2.7 3.6
V
DD
Positive Supply Range (Note 7)
V0.15V
H
Hysteresis Voltage
pF310C
IN
Input Capacitance
mV
P-P
1
µA±1I
IN
Input Current
V0.8V
IL
Input Low Voltage
V2.4V
IH
Input High Voltage
Reference Feedthrough
dB92SNRSignal-to-Noise Ratio
70
pF
170
C
INREF
Reference Input Capacitance
UNITSMIN TYP MAXSYMBOLPARAMETER
(Note 6)
CONDITIONS
µs20
VDDHigh to CS Low (power-up delay)
ns20t
CL
SCLK Pulse Width Low
ns20t
CH
MHz25f
CLK
SCLK Frequency
SCLK Pulse Width High
ns20t
CLW
CLR Pulse Width Low
ns0t
DH
DIN to SCLK High Hold
ns15t
DS
DIN to SCLK High Setup
ns15t
CSS0
CS Low to SCLK High Setup
ns15t
CSS1
CS High to SCLK High Setup
ns35t
CSH0
SCLK High to CS Low Hold
ns20t
CSH1
SCLK High to CS High Hold
UNITSMIN TYP MAXSYMBOLPARAMETER
Code = FFFF hex MHz1BWReference -3dB Bandwidth
MAX5441/MAX5442 4.5 5.5
0.60
DYNAMIC PERFORMANCE—REFERENCE SECTION
STATIC PERFORMANCE—DIGITAL INPUTS
POWER SUPPLY
MAX5441/MAX5442
MAX5443/MAX5444
ELECTRICAL CHARACTERISTICS (continued)
(VDD= +3V (MAX5443/MAX5444) or +5V (MAX5441/MAX5442), V
REF
= +2.5V, CL= 10pF, GND = 0, RL= , TA= T
MIN
to T
MAX
,
unless otherwise noted. Typical values are at T
A
= +25°C.)
MAX5441–MAX5444
+3V/+5V, Serial-Input, Voltage-Output, 16-Bit DACs
4 _______________________________________________________________________________________
__________________________________________Typical Operating Characteristics
(VDD= +3V (MAX5443/MAX5444) or +5V (MAX5441/MAX5442), V
REF
= +2.5V, GND = 0, RL= , TA= T
MIN
to T
MAX
, unless other-
wise noted. Typical values are at T
A
= +25°C.)
0
0.050
0.025
0.100
0.075
0.125
0.150
-40 10-15 35 60 85
SUPPLY CURRENT vs. TEMPERATURE
MAX5441/44 toc01
TEMPERATURE (°C)
SUUPLY CURRENT (mA)
VDD = +5V
VDD = +3V
0.05
0.09
0.08
0.06
0.10
0.11
0.12
0 2.01.50.5 1.0 2.5 3.0 3.5 4.0 4.5 5.0
SUPPLY CURRENT
vs. REFERENCE VOLTAGE
MAX5441/44 toc02
REFERENCE VOLTAGE (V)
SUPPLY CURRENT (mA)
0.07
VDD = +5V
0.05
0.07
0.06
0.09
0.08
0.11
0.10
0.12
0 1.0 1.50.5 2.0 2.5 3.0
SUPPLY CURRENT
vs. REFERENCE VOLTAGE
MAX5441/44 toc03
REFERENCE VOLTAGE (V)
SUPPLY CURRENT (mA)
VDD = +3V
-0.2
0
-0.1
0.2
0.1
0.3
0.4
-40 10-15 35 60 85
ZERO-CODE OFFSET ERROR
vs. TEMPERATURE
MAX5441/44 toc04
TEMPERATURE (°C)
OFFSET ERROR (LSB)
-0.4
0
-0.2
0.4
0.2
0.6
0.8
-40 10-15 35 60 85
INTEGRAL NONLINEARITY
vs. TEMPERATURE
MAX5441/44 toc05
TEMPERATURE (°C)
INL (LSB)
+INL
-INL
-0.4
-0.2
-0.3
0
-0.1
0.1
0.2
-40 10-15 35 60 85
DIFFERENTIAL NONLINEARITY
vs. TEMPERATURE
MAX5441/44 toc06
TEMPERATURE (°C)
DNL (LSB)
+DNL
-DNL
-0.30
-0.20
-0.25
-0.10
-0.15
-0.05
0
-40 10-15 35 60 85
GAIN ERROR
vs. TEMPERATURE
MAX5441/44 toc07
TEMPERATURE (°C)
GAIN ERROR (LSB)
0.25
0.20
0.15
0.10
0.05
-0.05
-0.10
-0.15
-0.20
-0.25 0015k5k 25k
35k
45k 55k 66k
INTEGRAL NONLINEARITY vs. CODE
MAX5441/44 toc08
CODE
INL (LSB)
0.125
0.100
0.075
0.050
0.025
-0.025
-0.050
-0.075
-0.100
-0.125 0015k5k 25k
35k
45k 55k 66k
DIFFERENTIAL NONLINEARITY
MAX5441/44 toc09
CODE
DNL (LSB)
MAX5441–MAX5444
+3V/+5V, Serial-Input,
Voltage-Output, 16-Bit DACs
_______________________________________________________________________________________ 5
Typical Operating Characteristics (continued)
(VDD= +3V (MAX5443/MAX5444) or +5V (MAX5441/MAX5442), V
REF
= +2.5V, GND = 0, RL= , TA= T
MIN
to T
MAX
, unless other-
wise noted. Typical values are at T
A
= +25°C.)
REFERENCE CURRENT
vs. DIGITAL INPUT CODE
140
120
100
80
60
40
REFERENCE CURRENT (µA)
20
0
0 20000 3000010000 40000 50000 60000 70000
CODE
MAJOR-CARRY GLITCH
CS
1V/div
(RISING)
FULL-SCALE STEP RESPONSE
(FALLING)
MAX5441/44 toc10
400ns/div
MAX5441/44 toc13
MAX5441/44 toc11
CS 2V/div
A
OUT
CL = 20pF
1V/div
MAJOR-CARRY GLITCH
(FALLING)
CS
1V/div
FULL-SCALE STEP RESPONSE
(RISING)
CL = 20pF
400ns/div
MAX5441/44 toc14
MAX5441/44 toc12
CS 2V/div
A
OUT
1V/div
A
OUT
20mV/div
DIGITAL FEEDTHROUGH
50ns/div
200ns/div
CL = 112pF
MAX5441/44 toc15
DIN 2V/div
A
OUT
10mV/div
A
20mV/div
CL = 20pF
INTEGRAL NONLINEARITY vs. REFERENCE VOLTAGE
0.70
0.65
0.60
0.55
INL (LSB)
0.50
0.45
0.40
2.0 3.0 3.52.5 4.0 4.5 5.0 REFERENCE VOLTAGE (V)
OUT
CL = 20pF
200ns/div
UNIPOLAR POWER-ON GLITCH
50ms/div
)
DD
MAX5441/44 toc17
MAX5441/44 toc16
2V/div
V
10mV/div
V
(REF = V
DD
OUT
MAX5441–MAX5444
+3V/+5V, Serial-Input, Voltage-Output, 16-Bit DACs
6 _______________________________________________________________________________________
Pin Description
Figure 1. Timing Diagram
PIN MAX5441 MAX5443
MAX5442 MAX5444
NAME FUNCTION
1 1 REF Voltage Reference Input 22CS Chip-Select Input
3 3 SCLK Serial Clock Input. Duty cycle must be between 40% and 60%.
4 4 DIN Serial Data Input
55CLR
Clear Input. Logic low asynchronously clears the DAC to code 0 (MAX5441/MAX5443) or code 32768 (MAX5442/MAX5444).
6 6 OUT DAC Output Voltage
7 INV
Junction of Internal Scaling Resistors. Connect to external op amps inverting input in bipolar mode.
8 RFB Feedback Resistor. Connect to external op amps output in bipolar mode.
79VDDSupply Voltage. Use +3V for MAX5443/MAX5444 and +5V for MAX5441/MAX5442.
8 10 GND Ground
SCLK
DIN
t
CS
t
CSHO
t
CSSO
t
t
CH
t
DH
DS
D15 D14
t
CL
CSH1
t
CSS1
D0
t
LDACS
MAX5441–MAX5444
+3V/+5V, Serial-Input,
Voltage-Output, 16-Bit DACs
_______________________________________________________________________________________ 7
Detailed Description
The MAX5441–MAX5444 voltage-output, 16-bit digital­to-analog converters (DACs) offer full 16-bit perfor­mance with less than 2LSB integral linearity error and less than 1LSB differential linearity error, thus ensuring monotonic performance. Serial data transfer minimizes the number of package pins required.
The MAX5441–MAX5444 are composed of two matched DAC sections, with a 12-bit inverted R-2R DAC forming the 12 LSBs and the four MSBs derived from 15 identically matched resistors. This architecture allows the lowest glitch energy to be transferred to the DAC output on major-carry transitions. It also lowers the DAC output impedance by a factor of eight compared
Figure 2b. Typical Operating Circuit—Bipolar Output
Figure 2a. Typical Operating Circuit—Unipolar Output
+3V/+5V
0.1µF
V
MC68XXXX
(GND)
PCS0
MOSI
SCLK
IC1
CS
DIN
SCLK
CLR
DD
MAX6166
+3V/+5V
1µF
MAX6166
REF
MAX5441 MAX5442 MAX5443 MAX5444
+2.5V
1µF
0.1µF
GND
+2.5V
OUT
MAX495
EXTERNAL OP AMP
UNIPOLAR OUT
0.1µF
0.1µF
CS
DIN
SCLK
CLR
V
DD
MAX5442 MAX5444
GND
MC68XXXX
PCS0
MOSI
SCLK
IC1
(GND)
R
INV
RFB
R
FB
INV
OUT
+5V
MAX400
-5V
EXTERNAL OP AMP
BIPOLAR OUT
MAX5441–MAX5444
+3V/+5V, Serial-Input, Voltage-Output, 16-Bit DACs
8 _______________________________________________________________________________________
to a standard R-2R ladder, allowing unbuffered opera­tion in medium-load applications.
The MAX5442/MAX5444 provide matched bipolar offset resistors, which connect to an external op amp for bipo­lar output swings (Figure 2b).
Digital Interface
The MAX5441–MAX5444 digital interface is a standard 3-wire connection compatible with SPI/QSPI/ MICROWIRE interfaces. The chip-select input (CS) frames the serial data loading at the data-input pin (DIN). Immediately following CSs high-to-low transition, the data is shifted synchronously and latched into the input register on the rising edge of the serial clock input (SCLK). After 16 data bits have been loaded into the serial input register, it transfers its contents to the DAC latch on CSs low-to-high transition (Figure 3). Note that if CS is not kept low during the entire 16 SCLK cycles, data will be corrupted. In this case, reload the DAC latch with a new 16-bit word.
Clearing the DAC
A 20ns (min) logic-low pulse on CLR asynchronously clears the DAC buffer to code 0 in the MAX5441/ MAX5443 and to code 32768 in the MAX5442/ MAX5444.
External Reference
The MAX5441–MAX5444 operate with external voltage references from 2V to VDD. The reference voltage determines the DACs full-scale output voltage.
Power-On Reset
The power-on reset circuit sets the output of the MAX5441/MAX5443 to code 0 and the output of the
MAX5442/MAX5444 to code 32768 when VDDis first applied. This ensures that unwanted DAC output volt­ages will not occur immediately following a system power-up, such as after a loss of power.
Applications Information
Reference and Ground Inputs
The MAX5441–MAX5444 operate with external voltage references from 2V to VDD, and maintain 16-bit perfor­mance if certain guidelines are followed when selecting and applying the reference. Ideally, the references temperature coefficient should be less than
0.1ppm/°C to maintain 16-bit accuracy to within 1LSB over the -40°C to +85°C extended temperature range. Since this converter is designed as an inverted R-2R volt­age-mode DAC, the input resistance seen by the voltage reference is code-dependent. In unipolar mode, the worst-case input-resistance variation is from 11.5kΩ (at code 8555hex) to 200k(at code 0000hex). The maxi­mum change in load current for a 2.5V reference is 2.5V /
11.5k = 217µA; therefore, the required load regulation is 7ppm/mA for a maximum error of 0.1LSB. This implies a reference output impedance of less than 18m. In addition, the impedance of the signal path from the volt­age reference to the reference input must be kept low because it contributes directly to the load-regulation error.
The requirement for a low-impedance voltage reference is met with capacitor bypassing at the reference inputs and ground. A 0.1µF ceramic capacitor with short leads between REF and GND provides high-frequency bypassing. A surface-mount ceramic chip capacitor is preferred because it has the lowest inductance. An
Figure 3. MAX5441–MAX5444 3-Wire Interface Timing Diagram
CS
DAC
UPDATED
SCLK
SUB-BITS
DIN
D15 D8 D7 D6 D5 D4 D3 D2 D1 D0
D14 D13 D12 D11 D10 D9
MSB LSB
MAX5441–MAX5444
+3V/+5V, Serial-Input,
Voltage-Output, 16-Bit DACs
_______________________________________________________________________________________ 9
Unbuffered Operation
Unbuffered operation reduces power consumption as well as offset error contributed by the external output buffer. The R-2R DAC output is available directly at OUT, allowing 16-bit performance from +V
REF
to GND without degradation at zero-scale. The DACs output impedance is also low enough to drive medium loads (RL> 60k) without degradation of INL or DNL; only the gain error is increased by externally loading the DAC output.
External Output Buffer Amplifier
The requirements on the external output buffer amplifier change whether the DAC is used in the unipolar or bipo­lar mode of operation. In unipolar mode, the output amplifier is used in a voltage-follower connection. In bipolar mode (MAX5442/MAX5444 only), the amplifier operates with the internal scaling resistors (Figure 2b). In each mode, the DACs output resistance is constant and is independent of input code; however, the output ampli­fiers input impedance should still be as high as possible to minimize gain errors. The DACs output capacitance is also independent of input code, thus simplifying stability requirements on the external amplifier.
In bipolar mode, a precision amplifier operating with dual power supplies (such as the MAX400) provides the ±V
REF
output range. In single-supply applications, precision amplifiers with input common-mode ranges including GND are available; however, their output swings do not normally include the negative rail (GND) without significant degradation of performance. A sin­gle-supply op amp, such as the MAX495, is suitable if the application does not use codes near zero.
Since the LSBs for a 16-bit DAC are extremely small (38.15µV for V
REF
= 2.5V), pay close attention to the external amplifiers input specification. The input offset voltage can degrade the zero-scale error and might require an output offset trim to maintain full accuracy if the offset voltage is greater than 1/2LSB. Similarly, the input bias current multiplied by the DAC output resis­tance (typically 6.25k) contributes to the zero-scale error. Temperature effects also must be taken into con­sideration. Over the -40°C to +85°C extended tempera­ture range, the offset voltage temperature coefficient (referenced to +25°C) must be less than 0.24µV/°C to
add less than 1/2LSB of zero-scale error. The external amplifiers input resistance forms a resistive divider with the DAC output resistance, which results in a gain error. To contribute less than 1/2LSB of gain error, the input resistance typically must be greater than:
The settling time is affected by the buffer input capaci­tance, the DACs output capacitance, and PC board capacitance. The typical DAC output voltage settling time is 1µs for a full-scale step. Settling time can be sig­nificantly less for smaller step changes. Assuming a single time-constant exponential settling response, a full-scale step takes 12 time constants to settle to within 1/2LSB of the final output voltage. The time constant is equal to the DAC output resistance multiplied by the total output capacitance. The DAC output capacitance is typically 10pF. Any additional output capacitance will increase the settling time.
The external buffer amplifiers gain-bandwidth product is important because it increases the settling time by adding another time constant to the output response. The effective time constant of two cascaded systems, each with a single time-constant response, is approxi­mately the root square sum of the two time constants. The DAC outputs time constant is 1µs / 12 = 83ns, ignoring the effect of additional capacitance. If the time constant of an external amplifier with 1MHz bandwidth is 1 / 2π (1MHz) = 159ns, then the effective time con­stant of the combined system is:
This suggests that the settling time to within 1/2LSB of the final output voltage, including the external buffer amplifier, will be approximately 12 ✕180ns = 2.15µs.
Digital Inputs and Interface Logic
The digital interface for the 16-bit DAC is based on a 3-wire standard that is compatible with SPI, QSPI, and MICROWIRE interfaces. The three digital inputs (CS, DIN, and SCLK) load the digital input data serially into the DAC.
A 20ns (min) logic-low pulse on CLR clears the data in the DAC buffer.
All of the digital inputs include Schmitt-trigger buffers to accept slow-transition interfaces. This means that opto­couplers can interface directly to the MAX5441– MAX5444 without additional external logic. The digital inputs are compatible with TTL/CMOS-logic levels.
83ns 159ns 180ns
22
()
+
()
 
 
=
6.25k MΩΩ ×=2 819
17
MAX5441–MAX5444
+3V/+5V, Serial-Input, Voltage-Output, 16-Bit DACs
10 ______________________________________________________________________________________
Unipolar Configuration
Figure 2a shows the MAX5441–MAX5444 configured for unipolar operation with an external op amp. The op amp is set for unity gain, and Table 1 lists the codes for this circuit. The bipolar MAX5442/MAX5444 can also be used in unipolar configuration by connecting RFB and INV to REF. This allows the DAC to power-up to mid­scale.
Bipolar Configuration
Figure 2b shows the MAX5442/MAX5444 configured for bipolar operation with an external op amp. The op amp is set for unity gain with an offset of -1/2V
REF
. Table 2
lists the offset binary codes for this circuit.
Power-Supply Bypassing and
Ground Management
Bypass VDDwith a 0.1µF ceramic capacitor connected between V
DD
and GND. Mount the capacitor with short
leads close to the device (less than 0.25 inches).
Table 1. Unipolar Code Table
Table 2. Bipolar Code Table
00000 0000 0000 0000
V
REF
(1 / 65,536)
0000 0000 0000 0001
V
REF
(32,768 / 65,536) =
1/
2
V
REF
1000 0000 0000 0000
V
REF
(65,535 / 65,536)
1111 1111 1111 1111
ANALOG OUTPUT, V
OUT
MSB LSB
DAC LATCH CONTENTS
-V
REF
(32,768 / 32,768) = -V
REF
0000 0000 0000 0000
-V
REF
(1 / 32,768)
0111 1111 1111 1111
01000 0000 0000 0000
+V
REF
(1 / 32,768)
1000 0000 0000 0001
+V
REF
(32,767 / 32,768)
1111 1111 1111 1111
ANALOG OUTPUT, V
OUT
MSB LSB
DAC LATCH CONTENTS
MAX5441–MAX5444
+3V/+5V, Serial-Input,
Voltage-Output, 16-Bit DACs
______________________________________________________________________________________ 11
_____________________Chip Information
TRANSISTOR COUNT: 2800
PROCESS: BiCMOS
Functional Diagrams
Ordering Information (continued)
REF
SCLK
DIN
CLR
V
DD
REF
DIN
MAX5442 MAX5444
CS
CONTROL
LOGIC
MAX5441 MAX5443
16-BIT DAC
CS
CONTROL
LOGIC
16-BIT DATA LATCH
SERIAL INPUT REGISTER
GND
PART TEMP RANGE PIN-PACKAGE INL (LSB) SUPPLY (V)
OUT
SCLK
CLR
V
DD
16-BIT DAC
16-BIT DATA LATCH
SERIAL INPUT REGISTER
GND
RFB INV
OUT
MAX5443ACUA 0°C to +70°C 8 µMAX ±23 MAX5443AEUA -40°C to +85°C 8 µMAX ±2 3 MAX5443BCUA 0°C to +70°C 8 µMAX ±43 MAX5443BEUA -40°C to +85°C 8 µMAX ±4 3 MAX5444ACUB 0°C to +70°C 10 µMAX ±23 MAX5444AEUB -40°C to +85°C 10 µMAX ±2 3 MAX5444BCUB 0°C to +70°C 10 µMAX ±43 MAX5444BEUB -40°C to +85°C 10 µMAX ±4 3
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
12 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
© 2001 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.
MAX5441–MAX5444
+3V/+5V, Serial-Input, Voltage-Output, 16-Bit DACs
________________________________________________________Package Information
8LUMAXD.EPS
10LUMAX.EPS
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