Rainbow Electronics MAX5362 User Manual

Page 1

General Description

The MAX5360/MAX5361/MAX5362 are low-cost, 6-bit digital-to-analog converters (DACs) in miniature 5-pin SOT23 packages with a simple 2-wire serial interface that allows communication with multiple devices. The MAX5360 has an internal +2V reference and operates from a +2.7V to +3.6V supply. The MAX5361 has an internal +4V reference and operates from a +4.5V to +5.5V supply. The MAX5362 operates over the full +2.7V to +5.5V supply range and has an internal reference equal to 0.9 ✕ VDD.

The fast-mode I2C™-compatible serial interface allows communication at data rates up to 400kbps, minimizing board space and reducing interconnect complexity in many applications. Each device is available with one of four factory-preset addresses (see Selector Guide).

The MAX5360/MAX5361/MAX5362 also include an output buffer, a low-power shutdown mode, and a poweron reset that ensures the DAC outputs are at zero when power is initially applied. In shutdown mode, the supply current is reduced to less than 1µA and the output is pulled down with a 10kΩ resistor to GND.

The MAX5360/MAX5361/MAX5362 are available in miniature 5-pin SOT23 packages.

Applications

Automatic Tuning (VCO)

Power Amplifier Bias Control

Programmable Threshold Levels

Automatic Gain Control

Automatic Offset Adjustment

Features

♦ 6-Bit Accuracy in a Tiny 5-Pin SOT23 Package

♦ Wide +2.7V to +5.5V Supply Range (MAX5362)

♦ 1µA Shutdown Mode

♦ Buffered Output Drives Resistive Loads

♦ Low Glitch Power-On-Reset to Zero DAC Output

♦ Fast I

C-Compatible Serial Interface

♦ ≤-5% Full-Scale Error (MAX5362)

♦ ≤1LSB (max) INL/DNL

♦ Low 230µA max Supply Current

MAX5360/MAX5361/MAX5362

Low-Cost, Low-Power 6-Bit DACs with

2-Wire Serial Interface in SOT23 Package

________________________________________________________________ Maxim Integrated Products 1

Typical Operating Circuit

19-1785; Rev 1; 3/01

PART

MAX5360_EUK-T* MAX5361_EUK-T* MAX5362_EUK-T*

-40°C to +85°C

TEMP. RANGE PIN-PACKAGE

5 SOT23-5 5 SOT23-5 5 SOT23-5

*See Selector Guide for address options.

Pin Configuration

Ordering Information

I2C is a trademark of Philips Corp.

PART

MAX5360LEUK

MAX5360MEUK MAX5360NEUK 0x64

0x62

0x60

ADDRESS REFERENCE

+2.0V +2.0V +2.0V ADNE

ADMY

ADMM

TOP

MARK

MAX5360PEUK 0x66 +2.0V ADMO MAX5361LEUK

0x60 +4.0V ADMU MAX5361MEUK 0x62 +4.0V ADNA MAX5361NEUK 0x64 +4.0V ADNG MAX5361PEUK 0x66 +4.0V ADMQ

MAX5362MEUK 0x62

0.9

ADNC

MAX5362NEUK 0x64

0.9

ADNI

MAX5362PEUK 0x66

0.9

ADMS

MAX5362LEUK

0x60

0.9

ADMW

Selector Guide

For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.

+2.7V TO +5.5V

µC

PX.0/SDA

PX.1/SCL

GND

SDA

SCL

MAX5362

GND

OUT

TOP VIEW

15SCLOUT

MAX5360

GND

MAX5361 MAX5362

SDAV

SOT23-5

Page 2

MAX5360/MAX5361/MAX5362

Low-Cost, Low-Power 6-Bit DACs with 2-Wire Serial Interface in SOT23 Package

2 _______________________________________________________________________________________

ABSOLUTE MAXIMUM RATINGS

ELECTRICAL CHARACTERISTICS

(VDD= 2.7V to 3.6V (MAX5360); VDD= 4.5V to 5.5V (MAX5361); VDD= 2.7V to 5.5V (MAX5362); RL=10kΩ, CL= 50pF, TA= T

MIN

MAX

, unless otherwise noted. Typical values are TA= +25°C.)

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

VDDto GND..............................................................-0.3V to +6V

OUT to GND ...............................................-0.3V to (V

+ 0.3V)

SCL, SDA to GND.....................................................-0.3V to +6V

Maximum Current into Any Pin............................................50mA

Continuous Power Dissipation (T

= +70°C)

5-Pin SOT23 (derate 7.1mW/°C above +70°C)...........571mW

Operating Temperature Range

MAX536__EUK-T ............................................-40°C to +85°C

Storage Temperature Range .............................-65°C to +150°C

Maximum Junction Temperature .....................................+150°C

Code = 0, all digital inputs from 0 to V

To 1/2LSB, 50kΩ and 50pF load (Note 6)

Positive and negative

(Note 1)

OUT

= 0 to VDD, power-down mode

Code = 0, 0 to -100µA

MAX5360

Code = 63, MAX5360/MAX5361 (Note 4)

Code = 63

Guaranteed monotonic (Note 2)

MAX5362 (Notes 2, 3)

Code = 63

CONDITIONS

nVs

Digital Feedthrough

µs20Output Settling Time

V/µs0.4Voltage Output Slew Rate

kΩ10Output Resistance

LSB

0.5

Output Load Regulation

1.8 2 2.2

ppm/°C

±10

Full-Scale Error Temperature Coefficient

LSB±1INLIntegral Linearity Error

Bits6Resolution

±40

dB60Full-Scale Error Supply Rejection

% of Ideal

Full-Scale Error

LSB±1DNLDifferential Linearity Error

mV±1 ±2V

Offset Error

dB60Offset Error Supply Rejection

UNITSMIN TYP MAXSYMBOLPARAMETER

From software shutdown

Code 31 to 32

µs50Wake-Up Time

nVs

Digital-Analog Glitch Impulse

(Note 2) ppm/°C

Offset Error Temperature Coefficient

MAX5360/MAX5361

MAX5362

MAX5360/MAX5361

MAX5362

MAX5360/MAX5361

MAX5362

Code = 63, 0 to 100µA 0.5

MAX5361 3.6 4 4.4

MAX5362

0.85

0.9

0.95

DD VDD

REFInternal Reference (Note 5)

STATIC ACCURACY

DAC OUTPUT

DYNAMIC PERFORMANCE

Page 3

MAX5360/MAX5361/MAX5362

Low-Cost, Low-Power 6-Bit DACs with

2-Wire Serial Interface in SOT23 Package

_______________________________________________________________________________________ 3

ELECTRICAL CHARACTERISTICS (continued)

(VDD= 2.7V to 3.6V (MAX5360); VDD= 4.5V to 5.5V (MAX5361); VDD= 2.7V to 5.5V (MAX5362); RL=10kΩ, CL= 50pF, TA= T

MIN

MAX

, unless otherwise noted. Typical values are TA= +25°C.)

MAX5361

MAX5360

VIHmin to VILmax, bus capacitance 10pF to 400pF

SINK

= 6mA

(Note 7)

SINK

= 3mA

MAX5362

No load, all digital inputs at 0 or VDD, code = 63

Shutdown mode

CONDITIONS

250

Output Fall Time

0 0.6

Output Low Voltage

0 0.4

ns050t

Pulse Width of Spike Suppressed

µA±10I

Input Leakage Current

4.5 5.5

2.7 3.6

pF10C

Input Capacitance

0.05✕ V

hys

Input Hysteresis

0.7✕ V

Input High Voltage

0.3✕ V

Input Low Voltage

2.7 5.5

Supply Voltage

150 230

µA

Supply Current

UNITSMIN TYP MAXSYMBOLPARAMETER

SINK

= 3mA

SINK

= 6mA 250

POWER REQUIREMENTS

DIGITAL INPUTS (SCL, SDA)

DIGITAL OUTPUT (SDA) (open drain)

CONDITIONS

µs0.6t

HIGH

High Period of the SCL Clock

µs1.3t

LOW

Low Period of the SCL Clock

kHz

0400

SCL

SCL Clock Frequency

µs0.6t

HD, STA

Hold Time (Repeated) START Condition

µs1.3t

BUF

Bus-Free Time Between a STOP and a START Condition

UNITSMIN TYP MAXSYMBOLPARAMETER

TIMING CHARACTERISTICS

(VDD= 2.7V to 3.6V (MAX5360); VDD= 4.5V to 5.5V (MAX5361); VDD= 2.7V to 5.5V (MAX5362); RL=10kΩ, CL= 50pF, TA= T

MAX

MIN

, Figure 3, unless otherwise noted. Typical values are TA= +25°C.)

Page 4

MAX5360/MAX5361/MAX5362

Low-Cost, Low-Power 6-Bit DACs with 2-Wire Serial Interface in SOT23 Package

4 _______________________________________________________________________________________

TIMING CHARACTERISTICS (continued)

(VDD= 2.7V to 3.6V (MAX5360); VDD= 4.5V to 5.5V (MAX5361); VDD= 2.7V to 5.5V (MAX5362); RL=10kΩ, CL= 50pF, TA= T

MAX

MIN

, Figure 3, unless otherwise noted. Typical values are TA= +25°C.)

Data Hold Time t

HD, DAT

0 0.9 µs

Data Setup Time t

SU, DAT

100 ns

Rise Time of Both SDA and SCL Signals

300 ns

Fall Time of Both SDA and SCL Signals

CONDITIONS

300 ns

Setup Time for STOP Condition t

SU, STO

0.6 µs

Capacitive Load for Each Bus Line

400 pF

µs0.6t

SU, STA

Setup Time for a Repeated START Condition

UNITSMIN TYP MAXSYMBOLPARAMETER

Note 1: Guaranteed from code 1 to code 63. Note 2: The offset value extrapolated from the range over which the INL is guaranteed. Note 3: MAX5362, tested at V

= 5V ±10%.

Note 4: MAX5360, tested at V

= 3V ±10%; MAX5361, tested at VDD= 5V ±10%.

Note 5: Actual output voltage at full scale is 63/64

REF

Note 6: Output settling time is measured by taking the code from code 1 to code 63, and from code 63 to code 1. Note 7: Guaranteed by design.

-0.045

-0.020

-0.030

-0.025

-0.035

-0.040

-0.015

-0.010

-0.005

0.005

0.010

0.015

0.020

0.025

0.030

0 255075

INTEGRAL NONLINEARITY vs. CODE

MAX5360/1/2-01

CODE

INL (LSB)

-0.025

-0.050

2.5 4.03.0 3.5 4.5 5.0 5.5

INTEGRAL NONLINEARITY

vs. SUPPLY VOLTAGE

MAX5360/1/2-02

SUPPLY VOLTAGE (V)

INL (LSB)

-0.025

-0.050

-40 20-20 0 40 60 80 100

INTEGRAL NONLINEARITY

vs. TEMPERATURE

MAX5360/1/2-03

TEMPERATURE (°C)

INL (LSB)

Typical Operating Characteristics

(VDD= 3V (MAX5360), VDD= 5V (MAX5361/MAX5362), TA= +25°C, unless otherwise noted.)

Page 5

MAX5360/MAX5361/MAX5362

Low-Cost, Low-Power 6-Bit DACs with

2-Wire Serial Interface in SOT23 Package

_______________________________________________________________________________________ 5

)

Typical Operating Characteristics (continued)

(VDD= 3V (MAX5360), VDD= 5V (MAX5361/MAX5362), TA= +25°C, unless otherwise noted.)

0.75

0.25

-0.25

-0.50

0.50

-0.75

2.5 4.03.0 3.5 4.5 5.0 5.5

FULL-SCALE ERROR vs. TEMPERATURE

MAX5360/1/2-10

SUPPLY VOLTAGE (V)

FULL-SCALE ERROR (LSB)

1.2

0.4

-0.4

-0.8

0.8

-1.2

FULL-SCALE ERROR (%)

MAX5361

MAX5360

MAX5362

NO LOAD

0.75

0.25

-0.25

-0.50

0.50

-0.75

1.2

0.4

-0.4

-0.8

0.8

-1.2

-40 20-20 0 40 60 80 100

FULL-SCALE ERROR vs. TEMPERATURE

MAX5360/1/2-11

TEMPERATURE (°C)

FULL-SCALE ERROR (LSB)

FULL-SCALE ERROR (%)

MAX5362

MAX5360 MAX5361

200

140

120

100

160

180

2.5 4.03.0 3.5 4.5 5.0 5.5

SUPPLY CURRENT vs. SUPPLY VOLTAGE

MAX5360/1/2-12

SUPPLY VOLTAGE (V)

SUPPLY CURRENT (µA)

MAX5360

MAX5361

MAX5362

DIFFERENTIAL NONLINEARITY vs. CODE

0.010

-0.005

0.005

-0.005

DNL (LSB)

-0.010

-0.015

-0.020 0 255075

CODE

MAX5360/1/2-04

DNL (LSB)

-0.010

-0.015

-0.020

-0.025

TOTAL UNADJUSTED ERROR vs. CODE

0.15

0.10

0.05

-0.05

TUE (LSB)

-0.10

MAX5360/1/2-07

(mV)

-0.25

DIFFERENTIAL NONLINEARITY

vs. SUPPLY VOLTAGE

MAX5360/1/2-05

2.5 4.03.0 3.5 4.5 5.0 5.5 SUPPLY VOLTAGE (V)

OFFSET ERROR vs. SUPPLY VOLTAGE

MAX5360/1/2-08

DIFFERENTIAL NONLINEARITY

vs. TEMPERATURE

-0.005

-0.010

DNL (LSB)

-0.015

-0.020

-0.025

-40 20-20 0 40 60 80 100 TEMPERATURE (°C

OFFSET ERROR vs. TEMPERATURE

-0.25

MAX5360/1/2-06

MAX5360/1/2-09

-0.15

-0.20 0 255075

-0.50

2.5 4.03.0 3.5 4.5 5.0 5.5

CODE

SUPPLY VOLTAGE (V)

-0.50

-40 20-20 0 40 60 80 100 TEMPERATURE (°C)

Page 6

MAX5360/MAX5361/MAX5362

Low-Cost, Low-Power 6-Bit DACs with 2-Wire Serial Interface in SOT23 Package

6 _______________________________________________________________________________________

Typical Operating Characteristics (continued)

(VDD= 3V (MAX5360), VDD= 5V (MAX5361/MAX5362), TA= +25°C, unless otherwise noted.)

SHUTDOWN SUPPLY CURRENT

SUPPLY CURRENT vs. TEMPERATURE

160

155

150

145

140

SUPPLY CURRENT (µA)

135

MAX5361

MAX5362

MAX5360

MAX5360/1/2-13

SUPPLY CURRENT (µA)

160

155

150

145

140

135

SUPPLY CURRENT vs. CODE

MAX5361

= 5V

MAX5360

= 5V

MAX5362

= 5V

MAX5360

= 3V

MAX5360/1/2-14

1.0

0.6

0.4

SUPPLY CURRENT (µA)

0.2

vs. SUPPLY VOLTAGE

MAX5360/1/2-15

130

-40 20-20 0 40 60 80 100 TEMPERATURE (°C)

130

024816 3240485664

CODE

SHUTDOWN SUPPLY CURRENT

vs. TEMPERATURE

MAX5360/1/2-16

4.5

4.0

3.5

3.0

FULL SCALE (V)

2.5

OUT

2.0

1.5

1.0

0.8

0.6

0.4

SUPPLY CURRENT (µA)

0.2

-40 20-20 0 40 60 80 100

VDD = 5V

VDD = 3V

TEMPERATURE (°C)

OUTPUT LOAD REGULATION

021436589710

LOAD CURRENT (mA)

A: MAX5361/MAX5362, V B: MAX5360, FULL-SCALE, V C: MAX5360, FULL-SCALE, V D: ZERO CODE, V E: ZERO CODE, V

= 4.5V, FULL-SCALE OR SOURCING

= 2.7V SINKING, VDD = 5V SOURCING

= 2.7V, SOURCING

= 2.7V, SINKING

= 5.5V SINKING

MAX5360/1/2-17

0.2

0.1

2.5 4.03.0 3.5 4.5 5.0 5.5 SUPPLY VOLTAGE (V)

OUTPUT VOLTAGE ON POWER-UP

OUT

50mV/div

2V/div

ZERO CODE (V)

OUT

4µs/div

MAX5360/1/2-18

Page 7

MAX5360/MAX5361/MAX5362

Low-Cost, Low-Power 6-Bit DACs with

2-Wire Serial Interface in SOT23 Package

_______________________________________________________________________________________ 7

Pin Description

NAME FUNCTION

1 OUT DAC Voltage Output

2 GND Ground

3 V

Power-Supply Input

4 SDA Serial Data Input

5 SCL Serial Clock Input

10µs/div

MAX5360

OUTPUT VOLTAGE

EXITING SHUTDOWN

MAX5360/1/2-19

OUT

500mV/div

SDA

3V/div

1µs/div

MAX5360

OUTPUT VOLTAGE

ENTERING SHUTDOWN

MAX5360/1/2-20

OUT

500mV/div

SDA

3V/div

1µs/div

MAX5360

OUTPUT SETTLING FROM

1/4 FS TO 3/4 FS

MAX5360/1/2-21

OUT

0.5V/div

SDA

3V/div

1µs/div

MAX5360

OUTPUT SETTLING FROM

3/4 FS TO 1/4 FS

MAX5360/1/2-22

OUT

0.5V/div

SDA

3V/div

2µs/div

MAX5360

OUTPUT SETTLING

1/4LSB STEP-UP

MAX5360/1/2-23

OUT

20mV/div

AC-COUPLED

SDA

3V/div

0 x 7F TO 0 x 80 01111111 TO 10000000

MAX5360

OUTPUT SETTLING

1/4LSB STEP-DOWN

MAX5360/1/2-24

OUT

20mV/div

AC-COUPLED

SDA

3V/div

2µs/div

0 x 80 TO 0 x 7F 10000000 TO 01111111

Typical Operating Characteristics (continued)

(VDD= 3V (MAX5360), VDD= 5V (MAX5361/MAX5362), TA= +25°C, unless otherwise noted.)

Page 8

MAX5360/MAX5361/MAX5362

Low-Cost, Low-Power 6-Bit DACs with 2-Wire Serial Interface in SOT23 Package

8 _______________________________________________________________________________________

Detailed Description

The MAX5360/MAX5361/MAX5362 voltage-output, 6-bit DACs offer full 6-bit performance with less than 1LSB integral nonlinearity (INL) error and less than 1LSB differential nonlinearity (DNL) error ensuring monotonic performance. The devices use a simple two-wire, fastmode I2C-compatible serial interface that operates up to 400kHz. The MAX5360/MAX5361/MAX5362 include an internal reference, an output buffer, and low-current shutdown mode, making them ideal for low-power, highly integrated applications. Figure 1 shows the devices’ functional diagram.

Analog Section

The MAX5360/MAX5361/MAX5362 employ a currentsteering DAC topology as shown in Figure 2. At the core of the DAC is a reference voltage-to-current converter (V/I) that generates a reference current. This current is mirrored to 255 equally weighted current sources. DAC switches control the outputs of these current mirrors, so only the desired fraction of the total current-mirror currents is steered to the DAC output. The

current is then converted to a voltage across a resistor, and this voltage is buffered by the output buffer amplifier.

Output Voltage

Table 1 shows the relationship between the DAC code and the analog output voltage. The 6-bit DAC code is binary unipolar with 1LSB = (V

REF

/ 64). The MAX5360/ MAX5361 have a full-scale output voltage of (+2V 1LSB) and (+4V - 1LSB), respectively, set by the internal references. The MAX5362 has a full-scale output voltage of (0.9✕ VDD- 1LSB). Each device accepts 8-bit DAC codes, but the accuracy is guaranteed only for 6 bits.

Output Buffer

The DAC voltage output is an internally buffered unitygain follower that typically slews at ±0.4V/µs. The output can swing from 0 to full scale. With a 1/4 FS to 3/4 FS output transition, the amplifier outputs typically settle to 1/2LSB in less than 5µs when loaded with 10kΩ in parallel with 50pF. The buffer amplifiers are stable with any combination of resistive loads >10kΩ and capacitive loads <50pF.

Figure 2. Current-Steering Topology

Figure 1. Functional Diagram

Table 1. Unipolar Code Current

000001 (00)

0.9 ✕ V

/ 64

62mV31mV

000000 (00) 000

100000 (00)

0.9 ✕ V

/ 2

2V1V

111111 (00)

0.9 ✕ V

(63/64)4V ✕ (63/64)2V ✕ (63/64)

MAX5362

MAX5361

MAX5360

DAC CODE

6 BITS + 2 SUBBITS

OUTPUT VOLTAGE

REF

SDA

SCL

REF

CONTROL

LOGIC

CURRENT-

STEERING

DAC

255

DATA LATCH

6 + 2

SERIAL INPUT

MAX5360 MAX5361 MAX5362

GND

OUT

SW1 SW2 SW255

10k

OUT

Page 9

MAX5360/MAX5361/MAX5362

Low-Cost, Low-Power 6-Bit DACs with

2-Wire Serial Interface in SOT23 Package

_______________________________________________________________________________________ 9

Power-On Reset

The MAX5360/MAX5361/MAX5362 have a power-on reset circuit to set the DAC’s output to 0 when V

is first applied or when VDDdips below 1.7V. This ensures that unwanted DAC output voltages will not occur immediately following a system startup, such as after a loss of power. The output glitch on startup is typically <50mV.

Shutdown Mode

The MAX5360/MAX5361/MAX5362 include a softwarecontrolled shutdown mode that reduces the supply current to <1µA. All internal circuitry is disabled and an internal 10kΩ resistor is placed from OUT to GND to ensure 0V at OUT while in shutdown. The device enters shutdown in less than 5µs and exits shutdown in less than 50µs.

Digital Section

Serial interface

The MAX5360/MAX5361/MAX5362 use a simple twowire serial interface requiring only two I/O lines (twowire bus) of a standard microprocessor (µP) port. Figure 3 shows the timing diagram for signals on the 2wire bus.

The two bus lines (SDA and SCL) must be high when the bus is not in use. The MAX5360/MAX5361/ MAX5362 are receive-only devices (slaves) and must be controlled by a bus master device. Figure 4 shows a typical application where multiple devices can be connected to the bus provided they have different address settings. External pullup resistors are not necessary on these lines (when driven by push-pull drivers), though the MAX5360/MAX5361/MAX5362 can be used in applications where pullup resistors are required (such as in I

C systems) to maintain compatibility with existing circuitry. The serial interface operates at SCL rates up to 400kHz. The SDA state is allowed to change only while SCL is low, with the exception of START and STOP conditions as shown in Figure 5. Each transmission consists of a START condition sent by the bus master device, followed by the MAX5360/MAX5361/ MAX5362’s preset slave address, a power-mode bit,

Figure 3. Two-Wire Serial Interface Timing Diagram

Figure 4. Typical Application Circuit

SDA

tSU,

DAT

LOW

SCL

tHD,

STA

HIGH

µC

SDA SCL

RS*

SCL

MAX5360M

2V REFERENCE

SDA

OUT

tHD,

DAT

OFFSET ADJUSTMENT

tSU,

STA

tHD,

STA

tSU,

STO

BUF

START CONDITIONSTOP CONDITIONREPEATED START CONDITIONSTART CONDITION

* IS OPTIONAL.

SCL

MAX5361N

4V REFERENCE

SDA

SCL

MAX5362P

SDA

REFERENCE

OUT

THRESHOLD ADJUSTMENT

GAIN ADJUSTMENT

Page 10

MAX5360/MAX5361/MAX5362

the DAC data (6 bits + 2 subbits), and finally, a STOP condition (Figure 6). The bus is then free for another transmission.

SDA’s state is sampled, and therefore must remain stable while SCL is high. Data is transmitted in 8-bit bytes. Nine clock cycles are required to transfer each byte to the MAX5360/MAX5361/MAX5362. Release SDA during the 9th clock cycle as the selected device acknowledges the receipt of the byte, by pulling SDA low during this time. A series resistor on the SDA line may be needed if the master’s output is forced high while the selected device acknowledges (Figure 4).

Slave Address

The MAX5360/MAX5361/MAX5362 are available with one of four preset slave addresses. Each address option is identified by the suffix L, M, N, or P added to the part number. The address is defined as the 7 most significant bits (MSBs) sent by the master after a START condition. The address options are 0x60, 0x62, 0x64, and 0x66 (left justified with LSB set to 0). The 8th bit, typically used to define a write or read protocol, sets the device’s power mode (SHDN); the device is powered down when SHDN is set to 1. During a device search routine, the MAX5360/MAX5361/MAX5362 acknowledge both options (SHDN = 0 or SHDN = 1) but does not change its power state if a stop condition (or restart) is issued immediately. The second byte (DAC data) must be sent/received for the device to update both power mode and DAC output.

DAC Data

The 6-bit DAC data is decoded as straight binary MSB first with 1LSB = (V

REF

/ 64) and converted into the corresponding analog voltage as shown in Table 1. Two subbits complete the data byte; these 2 bits should be set to zero since they are not tested to guaranteedmonotonic performance.

After receiving the data byte, the MAX5360/MAX5361/ MAX5362 acknowledge its receipt and expect a STOP condition, at which point the DAC output is updated. The devices update the output and the power mode only if the second byte is clocked in (SHDN = 0) or out (SHDN = 1) of the device. When SHDN = 1, the master will read all ones when clocking out a data byte. The MAX5360/MAX5361/MAX5362 do not drive SDA except for the acknowledge bit.

Low-Cost, Low-Power 6-Bit DACs with 2-Wire Serial Interface in SOT23 Package

10 ______________________________________________________________________________________

Figure 6. Complete Serial Transmission

Figure 5. Start and Stop Conditions

SDA

SCL

START CONDITION

STOP CONDITION

SLAVE ADDRESS BYTE DAC CODE

SDA

SCL

START

CONDITION

ACKSHDN

D3D4

1211

D0D1

1514

ACK

LSBMSBLSBMSB

1817

STOP

CONDITION

Page 11

I2C Compatibility

The MAX5360/MAX5361/MAX5362 are compatible with existing I2C systems. SCL and SDA are high-impedance inputs; SDA has an open drain that pulls the data line low during the 9th clock pulse. Figure 7 shows a

typical I

C application. The communication protocol supports the standard I2C 8-bit communications. The general call address is ignored, and CBUS formats are not supported. The MAX5360/MAX5361/MAX5362 address is compatible with the 7-bit I2C addressing protocol only. No 10-bit formats are supported. RESTART protocol is supported, but an immediate STOP condition is necessary to update the DAC.

Applications Information

Digital Inputs and Interface Logic

The serial 2-wire interface has logic levels defined as VOL= 0.3✕ VDDand VOH= 0.7✕ VDD. All of the inputs include Schmitt-trigger buffers to accept slow-transition interfaces. This means that optocouplers can interface directly to the MAX5360/MAX5361/MAX5362 without additional external logic. The digital inputs are compatible with CMOS logic levels and must not be driven with voltages higher than VDD.

Power-Supply Bypassing and Layout

Careful PC board layout is important for best system performance. To reduce crosstalk and noise injection, keep analog and digital signals separate. Ensure that the ground return from GND to the supply ground is short and low impedance; a ground plane is recommended. Bypass VDDwith a 0.1µF to ground as close as possible to the device. If the supply is excessively noisy, connect a 10Ω resistor in series with the supply and VDD, and add additional capacitance

MAX5360/MAX5361/MAX5362

Low-Cost, Low-Power 6-Bit DACs with

2-Wire Serial Interface in SOT23 Package

______________________________________________________________________________________ 11

Figure 7. I2C Typical Application

TRANSISTOR COUNT: 2910

PROCESS: BiCMOS

Chip Information

µC

SDA SCL

SCL

MAX5360L

2V REFERENCE

SDA

SCL

MAX5361M

4V REFERENCE

SDA

SCL

MAX5362P

REFERENCE

SDA

OUT

OFFSET ADJUSTMENT

THRESHOLD ADJUSTMENT

GAIN ADJUSTMENT

Page 12

MAX5360/MAX5361/MAX5362

Low-Cost, Low-Power 6-Bit DACs with 2-Wire Serial Interface in SOT23 Package

Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.

12 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600

Package Information

SOT5L.EPS