Rainbow Electronics MAX5155 User Manual

_______________General Description

The MAX5154/MAX5155 low-power, serial, voltage-out­put, dual 12-bit digital-to-analog converters (DACs)
consume only 500µA from a single +5V (MAX5154) or
+3V (MAX5155) supply. These devices feature Rail-to­Rail®output swing and are available in a space-saving
16-pin QSOP package. To maximize the dynamic
range, the DAC output amplifiers are configured with an
internal gain of +2V/V.

The 3-wire serial interface is SPI™/QSPI™ and
Microwire™ compatible. Each DAC has a double­buffered input organized as an input register followed
by a DAC register, which allows the input and DAC reg­isters to be updated independently or simultaneously
with a 16-bit serial word. Additional features include
programmable shutdown (2µA), hardware-shutdown
lockout (PDL), a separate reference voltage input for
each DAC that accepts AC and DC signals, and an
active-low clear input (CL) that resets all registers and
DACs to zero. These devices provide a programmable
logic pin for added functionality, and a serial-data out­put pin for daisy chaining.

________________________Applications

Industrial Process Control Remote Industrial Controls
Digital Offset and Gain Microprocessor-

Adjustment Controlled Systems
Motion Control Automatic Test

Equipment (ATE)

____________________________Features

♦ 12-Bit Dual DAC with Internal Gain of +2V/V
♦ Rail-to-Rail Output Swing
♦ 12µs Settling Time
♦ Single-Supply Operation: +5V (MAX5154)

+3V (MAX5155)

♦ Low Quiescent Current: 500µA (normal operation)

2µA (shutdown mode)

♦ SPI/QSPI and Microwire Compatible
♦ Available in Space-Saving 16-Pin QSOP Package
♦ Power-On Reset Clears Registers and DACs

to Zero

♦ Adjustable Output Offset

MAX5154/MAX5155

Low-Power, Dual, 12-Bit Voltage-Output DACs

with Serial Interface

________________________________________________________________

Maxim Integrated Products

1

19-1316; Rev 1; 12/97

______________Ordering Information

Rail-to-Rail is a registered trademark of Nippon Motorola Ltd.

SPI and QSPI are trademarks of Motorola, Inc.
Microwire is a trademark of National Semiconductor Corp.

For free samples & the latest literature: http://www.maxim-ic.com, or phone [phone]
For small orders, phone [phone] ext. 3468.

REFA

V

DD

AGND

DGNDPDLCL

DOUT

16-BIT

SHIFT

REGISTER

SR

CONTROL

INPUT
REG A

INPUT
REG B

SCLK

UPO REFB

DINCS

DAC B

DAC A

DAC

REG A

LOGIC

OUTPUT

DECODE

CONTROL

DAC

REG B

MAX5154
MAX5155

OUTB

R

R

R

R

OSB

OUTA

OSA

_________________________________________________________Functional Diagram

Ordering Information continued at end of data sheet.
Pin Configuration appears at end of data sheet.

INL

(LSB)

PIN-PACKAGETEMP. RANGEPART

±1/2

±1

±1/2

16 QSOP

16 Plastic DIP

16 Plastic DIP0°C to +70°C
0°C to +70°C
0°C to +70°CMAX5154ACEE

MAX5154BCPE

MAX5154ACPE

±116 QSOP0°C to +70°CMAX5154BCEE

MAX5154/MAX5155

Low-Power, Dual, 12-Bit Voltage-Output DACs
with Serial Interface

2 _______________________________________________________________________________________

ABSOLUTE MAXIMUM RATINGS

ELECTRICAL CHARACTERISTICS—MAX5154

(VDD= +5V ±10%, V

REFA

= V

REFB

= 2.048V, RL= 10kΩ, CL= 100pF, TA= T

MIN

to T

MAX

, unless otherwise noted. Typical values are

at T

A

= +25°C (OS_ tied to AGND for a gain of +2V/V).)

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.

VDDto AGND............................................................-0.3V to +6V

V

DD

to DGND ...........................................................-0.3V to +6V

AGND to DGND..................................................................±0.3V

OSA, OSB to AGND........................(AGND - 4V) to (V

DD

+ 0.3V)

REF_, OUT_ to AGND.................................-0.3V to (V

DD

+ 0.3V)

Digital Inputs (SCLK, DIN, CS, CL, PDL)

to DGND............................................................(-0.3V to +6V)

Digital Outputs (DOUT, UPO)

to DGND................................................-0.3V to (V

DD

+ 0.3V)

Maximum Current into Any Pin.........................................±20mA

Continuous Power Dissipation (T

A

= +70°C)

Plastic DIP (derate 10.5mW/°C above +70°C) ...........842mW

QSOP (derate 8.30mW/°C above +70°C)...................667mW

CERDIP (derate 10.00mW/°C above +70°C)..............800mW

Operating Temperature Ranges

MAX515_ _C_ E .................................................0°C to +70°C

MAX515_ _E_ E ..............................................-40C° to +85°C

MAX515_ _MJE.............................................-55°C to +125°C

Storage Temperature Range.............................-65°C to +150°C

Lead Temperature (soldering, 10sec).............................+300°C

(Note 1)

Input code = 0000 hex,
V

REF_

= (VDD- 1.4Vp-p) at 1kHz

Input code = 1FFE hex,
V

REF_

= 0.67Vp-p at 2.5V

DC

4.5V ≤ VDD≤ 5.5V

Minimum with code 1554 hex

Normalized to 2.048V

Guaranteed monotonic
Code = 6
Normalized to 2.048V

dB-82Reference Feedthrough

kHz300Reference 3dB Bandwidth

kΩ14 20R

REF

Reference Input Resistance

REFReference Input Range V0 VDD- 1.4

±1

LSB

±1/2

INL

Bits12Resolution

Integral Nonlinearity

PSRR

VDDPower-Supply
Rejection Ratio

µV/V20 260

ppm/°C4Gain-Error Tempco

LSB±1DNLDifferential Nonlinearity

mV±6V

os

Offset Error

ppm/°C4TCV

os

Offset Tempco

LSB-0.2 ±3Gain Error

MAX5154A
MAX5154B

CONDITIONS UNITSMIN TYP MAXSYMBOLPARAMETER

Input code = 1FFE hex,
V

REF_

= 1Vp-p at 1.25VDC, f = 25kHz

dB75SINAD

Signal-to-Noise plus
Distortion Ratio

CL, PDL, CS, DIN, SCLK

V0.8V

IL

Input Low Voltage

VIN= 0V to V

DD

µA0.001 ±1I

IN

Input Leakage Current

pF8C

IN

Input Capacitance

mV200V

HYS

Input Hysteresis

CL, PDL, CS, DIN, SCLK

V3V

IH

Input High Voltage

STATIC PERFORMANCE

REFERENCE INPUT

MULTIPLYING-MODE PERFORMANCE

DIGITAL INPUTS

MAX5154/MAX5155

Low-Power, Dual, 12-Bit Voltage-Output DACs

with Serial Interface

_______________________________________________________________________________________ 3

ELECTRICAL CHARACTERISTICS—MAX5154 (continued)

(VDD= +5V ±10%, V

REFA

= V

REFB

= 2.048V, RL= 10kΩ, CL= 100pF, TA= T

MIN

to T

MAX

, unless otherwise noted. Typical values are

at T

A

= +25°C (OS_ tied to AGND for a gain of +2V/V).)

Note 1: Accuracy is specified from code 6 to code 4095.
Note 2: Accuracy is better than 1LSB for V

OUT

_ greater than 6mV and less than VDD- 50mV. Guaranteed by PSRR test at the end

points.

Note 3: Digital inputs are set to either V

DD

or DGND, code = 0000 hex, RL= ∞.

Note 4: SCLK minimum clock period includes the rise and fall times.

CS = VDD, f

DIN

= 100kHz, V

SCLK

= 5Vp-p

I

SOURCE

= 2mA

(Note 4)

(Note 3)

(Note 3)

ns

Rail-to-rail (Note 2)

To 1/2LSB of full-scale, V

STEP

= 4V

40

I

SINK

= 2mA

t

CL

SCLK Pulse Width Low

CONDITIONS

ns40t

CH

SCLK Pulse Width High

nV-s5Digital Crosstalk

nV-s5Digital Feedthrough

µs25Time Required to Exit Shutdown

kΩ24 34R

OS_

OSA or OSB Input Resistance

ns100t

CP

SCLK Clock Period

µA0 ±1Reference Current in Shutdown

µA2 10I

DD(SHDN)

Power-Supply Current
in Shutdown

mA0.5 0.65I

DD

Power-Supply Current

V4.5 5.5V

DD

Positive Supply Voltage

ns40t

DS

SDI Setup Time

ns

VVDD- 0.5V

OH

Output High Voltage

0t

CSH

SCLK Rise to CS Rise
Hold Time

ns40t

CSS

CS Fall to SCLK Rise
Setup Time

C

LOAD

= 200pF

V0 to V

DD

Output Voltage Swing

µs15Output Settling Time

C

LOAD

= 200pF

ns80

V0.13 0.40V

OL

Output Low Voltage

V/µs0.75SRVoltage Output Slew Rate

UNITSMIN TYP MAXSYMBOLPARAMETER

t

DO2

SCLK Fall to DOUT
Valid Propagation Delay

ns80t

DO1

SCLK Rise to DOUT
Valid Propagation Delay

ns0t

DH

SDI Hold Time

ns100t

CSW

CS Pulse Width High

ns40t

CS1

CS Rise to SCLK Rise Hold

ns10t

CS0

SCLK Rise to CS Fall Delay

DIGITAL OUTPUTS (DOUT, UPO)

DYNAMIC PERFORMANCE

POWER SUPPLIES

TIMING CHARACTERISTICS

Resolution

MAX5154/MAX5155

Low-Power, Dual, 12-Bit Voltage-Output DACs
with Serial Interface

4 _______________________________________________________________________________________

ELECTRICAL CHARACTERISTICS—MAX5155

(VDD= +2.7V to +3.6V, V

REFA

= V

REFB

= 1.25V, RL= 10kΩ, CL= 100pF, TA= T

MIN

to T

MAX

, unless otherwise noted. Typical values

are at T

A

= +25°C (OS_ pins tied to AGND for a gain of +2V/V).)

nV-s5Digital Crosstalk

CS = VDD, f

DIN

= 100kHz, V

SCLK

= 3Vp-p

nV-s5Digital Feedthrough

µs25

Time Required for Valid
Operation after Shutdown

Input code = 1FFE hex,
V

REF_

= 1Vp-p at 1VDC, f = 15kHz

dB73SINAD

Signal-to-Noise plus
Distortion Ratio

(Note 5)

Input code = 0000 hex,
V

REF_

= (VDD- 1.4)Vp-p at 1kHz

Input code = 1FFE hex,
V

REF_

= 0.67Vp-p at 0.75V

DC

CL, PDL, CS, DIN, SCLK

2.7V ≤ VDD≤ 3.6V

Minimum with code 1554 hex

Normalized to 1.25V

Guaranteed monotonic
Code = 10
Normalized to 1.25V

V0.8V

IL

Input Low Voltage

VIN= 0V to V

DD

µA0 ±1I

IN

Input Leakage Current

pF8

C

IN

Input Capacitance

mV200V

HYS

Input Hysteresis

CL, PDL, CS, DIN, SCLK

V

dB-82Reference Feedthrough

kHz300Reference 3dB Bandwidth

2.2V

IH

Input High Voltage

kΩ14 20R

REF

Reference Input Resistance

±2

MAX5155A
MAX5155B

LSB

±1

INL

Bits12

Integral Nonlinearity

PSRR

VDDPower-Supply
Rejection Ratio

µV/V40 320

ppm/°C6.5Gain-Error Tempco

LSB±1DNLDifferential Nonlinearity

mV±6V

os

Offset Error

ppm/°C6.5TCV

os

Offset Tempco

LSB-0.2 ±4Gain Error

Rail-to-rail (Note 6)

I

SOURCE

= 2mA

kΩ24 34R

OS_

OSA or OSB Input Resistance

V0 to V

DD

Output Voltage Swing

VVDD- 0.5V

OH

Output High Voltage

CONDITIONS UNITSMIN TYP MAXSYMBOLPARAMETER

REFReference Input Range V0 VDD- 1.4

DIGITAL OUTPUTS (DOUT, UPO)

I

SINK

= 2mA V0.13 0.4V

OL

Output Low Voltage

To 1/2LSB of full-scale, V

STEP

= 2.5V µs15Output Settling Time

V/µs0.75SRVoltage Output Slew Rate

REFERENCE INPUT (VREF)

MULTIPLYING-MODE PERFORMANCE

DIGITAL INPUTS

STATIC PERFORMANCE

DYNAMIC PERFORMANCE

MAX5154/MAX5155

Low-Power, Dual, 12-Bit Voltage-Output DACs

with Serial Interface

_______________________________________________________________________________________ 5

Note 5: Accuracy is specified from code 10 to code 4095.
Note 6: Accuracy is better than 1LSB for V

OUT

greater than 6mV and less than VDD- 80mV. Guaranteed by PSRR test at the end

points.

Note 7: Digital inputs are set to either V

DD

or DGND, code = 0000 hex, RL= ∞.

ELECTRICAL CHARACTERISTICS—MAX5155 (continued)

(VDD= +2.7V to +3.6V, V

REFA

= V

REFB

= 1.25V, RL= 10kΩ, CL= 100pF, TA= T

MIN

to T

MAX

, unless otherwise noted. Typical values

are at T

A

= +25°C (OS_ pins tied to AGND for a gain of +2V/V).)

C

LOAD

= 200pF ns120t

DO2

SCLK Fall to DOUT Valid
Propagation Delay

ns100t

CSW

CS Pulse Width High

ns40t

CS1

CS Rise to SCLK Rise Hold

ns10t

CS0

SCLK Rise to CS Fall Delay

CONDITIONS UNITS

(Note 7) mA0.45 0.6I

DD

Power-Supply Current

(Note 7) µA1 8I

DD (SHDN)

Power-Supply Current
in Shutdown

µA

MIN TYP MAX

0 ±1Reference Current in Shutdown

(Note 4) ns100

SYMBOLPARAMETER

t

CP

SCLK Clock Period

ns40t

CH

SCLK Pulse Width High

ns40t

CL

SCLK Pulse Width Low

ns40t

CSS

CS Fall to SCLK Rise
Setup Time

ns0t

CSH

SCLK Rise to CS Rise Hold Time

ns50t

DS

SDI Setup Time

ns0t

DH

SDI Hold Time

C

LOAD

= 200pF ns120t

DO1

SCLK Rise to DOUT Valid
Propagation Delay

V2.7 3.6V

DD

Positive Supply Voltage

POWER SUPPLIES

TIMING CHARACTERISTICS

MAX5154/MAX5155

Low-Power, Dual, 12-Bit Voltage-Output DACs
with Serial Interface

6 _______________________________________________________________________________________

__________________________________________Typical Operating Characteristics

(VDD= +5V, RL= 10kΩ, CL= 100pF, OS_ pins tied to AGND, TA= +25°C, unless otherwise noted.)

-20

-16

-18

-12

-14

-8

-10

-6

-2

-4

0

1 370 740 1110 1480 1850

REFERENCE VOLTAGE INPUT

FREQUENCY RESPONSE

MAX5154/5155toc01

FREQUENCY (kHz)

RELATIVE OUTPUT (dB)

V

REF

= 0.67Vp-p @ 2.5V

DC

CODE = 1FFE (HEX)

400

450

550

500

650

600

700

-55 5-15-35 4525 65 10585 125

SUPPLY CURRENT vs. TEMPERATURE

MAX5154/5155 toc02

TEMPERATURE (°C)

SUPPLY CURRENT (µA)

V

REF

= 2.048V

R

L

= ∞

CODE = 1FFE (HEX)

CODE = 0000 (HEX)

-30

-80
1 10 100

TOTAL HARMONIC DISTORTION

PLUS NOISE vs. FREQUENCY

-70

MAX5154/5155 toc03

FREQUENCY (kHz)

THD + NOISE (dB)

-60

-50

-40

V

REF

= 1Vp-p @ 2.5V

DC

CODE = 1FFE (HEX)

0

0.1 1 10 100

FULL-SCALE ERROR vs. RESISTIVE LOAD

-1.25

-1.00

-1.50

-0.75

-0.50

-0.25

0.25

0.50

MAX5154/5155 toc04

RL (kΩ)

FULL-SCALE ERROR (LSB)

V

REF

= 2.048V

-100

-80

-90

-60

-70

-40

-50

0.5 1.6 2.7 3.8 4.9 6.0

-30

-10

-20

0

OUTPUT FFT PLOT

MAX5154/5155 toc07

V

REF

= 2.45Vp-p @ 1.225V

DC

f = 1kHz
CODE = 1FFE (HEX)

NOTE: RELATIVE TO FULL-SCALE

FREQUENCY (kHz)

RELATIVE OUTPUT (dB)

-150

-130

-140

-110

-120

-90

-100

-80

-60

-70

-50

0.5 1.5 2.0 2.51.0 3.0 3.5 4.0 5.04.5 5.5

REFERENCE FEEDTHROUGH AT 1kHz

MAX5154/5155 toc05

FREQUENCY (kHz)

RELATIVE OUTPUT (dB)

V

REF

= 3.6Vp-p @ 1.88V

DC

CODE = 0000 (HEX)

0

1

2

3

4

5

6

-55 5 25-15-35 45 65 85 105 125

SHUTDOWN CURRENT

vs. TEMPERATURE

MAX5154/5155 toc06

TEMPERATURE (°C)

SHUTDOWN CURRENT (µA)

V

REF

= 1V

DYNAMIC RESPONSE RISE TIME

MAX5154/5155 toc08

2µs/div

OUT_
1V/div

5V/div

CS

V

REF

= 2.048V

2µs/div

DYNAMIC RESPONSE FALL TIME

MAX5154/5155 toc09

OUT_
1V/div

5V/div

CS

V

REF

= 2.048V

MAX5154

MAX5154/MAX5155

Low-Power, Dual, 12-Bit Voltage-Output DACs

with Serial Interface

_______________________________________________________________________________________ 7

_____________________________Typical Operating Characteristics (continued)

(VDD= +3V, RL= 10kΩ, CL= 100pF, OS_pins tied to AGND, TA= +25°C, unless otherwise noted.)

-20

-16

-18

-12

-14

-8

-10

-6

-2

-4

0

1 320 640 960 1280 1600

REFERENCE VOLTAGE INPUT

FREQUENCY RESPONSE

MAX5154/5155 toc10

FREQUENCY (kHz)

RELATIVE OUTPUT (dB)

V

REF

= 0.67Vp-p @ 0.75V

DC

CODE = 1FFE

400

440
420

500
480
460

540
520

560

-55 5 25-35 -15 45 65 85 105 125

SUPPLY CURRENT vs. TEMPERATURE

MAX5154/5155 toc11

TEMPERATURE (°C)

SUPPLY CURRENT (µA)

V

REF

= 1V

R

L

= ∞

CODE = 1FFE (HEX)

CODE = 0000 (HEX)

-30

-80
1 10 100

TOTAL HARMONIC DISTORTION

PLUS NOISE vs. FREQUENCY

-70

MAX5154/5155 toc12

FREQUENCY (kHz)

THD + NOISE (dB)

-60

-50

-40

V

REF

= 1Vp-p @ 1V

DC

CODE = 1FFE (HEX)

0.25

-1.25

0.1 1 10 100

FULL-SCALE ERROR vs. RESISTIVE LOAD

-0.50

-0.75

-1.00

-0.25

0

MAX5154/5155 toc13

RL (kΩ)

FULL-SCALE ERROR (LSB)

V

REF

= 1.25V

-100

-80

-90

-60

-70

-40

-50

-30

-10

-20

0

0.5 2.7 3.8 4.91.6 6.0

OUTPUT FFT PLOT

MAX5154/5155toc16

FREQUENCY (kHz)

RELATIVE OUTPUT (dB)

V

REF

= 1.4Vp-p @ 0.75V

DC

f = 1kHz
CODE = 1FFE (HEX)

-150

-130

-140

-110

-120

-90

-100

-80

-60

-70

-50

0.5 1.5 2.0 2.51.0 3.0 3.5 4.0 5.04.5 5.5

REFERENCE FEEDTHROUGH AT 1kHz

MAX5154/5155 toc14

FREQUENCY (kHz)

RELATIVE OUTPUT (dB)

V

REF

= 1.6Vp-p @ 0.88V

DC

CODE = 0000 (HEX)

1.2

1.0

1.6

1.4

2.0

1.8

2.2

2.4

2.8

2.6

3.0

-55 -15 5 25-35 45 65 85 105 125

SHUTDOWN CURRENT

vs. TEMPERATURE

MAX5154/5155 toc15

TEMPERATURE (°C)

SHUTDOWN CURRENT (µA)

V

REF

= 1V

R

L

= ∞

DYNAMIC RESPONSE FALL TIME

MAX5154/5155 toc18

V

REF

= 1.25V

2µs/div

OUT_
500mV/div

CS
2V/div

MAX5155

DYNAMIC RESPONSE RISE TIME

MAX5154/5155 toc17

2µs/div

V

REF =

1.25V

OUT_
500mV/div

2V/div

CS

MAX5154/MAX5155

Low-Power, Dual, 12-Bit Voltage-Output DACs
with Serial Interface

8 _______________________________________________________________________________________

_____________________________Typical Operating Characteristics (continued)

(VDD= +5V (MAX5154), VDD= +3V (MAX5155), RL= 10kΩ, CL= 100pF, OS_ pins tied to AGND, unless otherwise noted.)

0.40

0.45

0.50

0.55

0.60

4.50 4.75 5.00 5.25 5.50

MAX5154

SUPPLY CURRENT vs. SUPPLY VOLTAGE

MAX5154/5155toc19

SUPPLY VOLTAGE (V)

SUPPLY CURRENT (mA)

CODE = 1FFE (HEX)

CODE = OOOO (HEX)

0.40

0.45

0.50

0.55

0.60

2.7 3.0 3.3 3.6

MAX5155

SUPPLY CURRENT vs. SUPPLY VOLTAGE

MAX5154/5155toc20

SUPPLY VOLTAGE (V)

SUPPLY CURRENT (mA)

CODE = 1FFE (HEX)

CODE = OOOO (HEX)

OUTB
200µV/div
AC COUPLED

OUTA
5V/div

MAX5154

ANALOG CROSSTALK

MAX5154/5155 toc22

V

REF

= 2.048V, GAIN = +2V/V, CODE = 1FFE HEX

250µs/div

MAX5154

DIGITAL FEEDTHROUGH

MAX5154/5155 toc23

OUTA
500µV/div
AC COUPLED

SCLK
5V/div

2.5µs/div

5µs/div

MAX5154

MAJOR-CARRY TRANSITION

MAX5154/5155 toc21

TRANSITION FROM 1000 (HEX) TO 0FFE (HEX)

OUT_
50mV/div
AC COUPLED

2V/div

CS

MAX5154/MAX5155

_______________Detailed Description

The MAX5154/MAX5155 dual, 12-bit, voltage-output
DACs are easily configured with a 3-wire serial inter­face. These devices include a 16-bit data-in/data-out
shift register, and each DAC has a double-buffered
input composed of an input register and a DAC register
(see

Functional Diagram

). In addition, trimmed internal
resistors produce an internal gain of +2V/V that maxi­mizes output voltage swing. The amplifier’s offset-adjust
pin allows for a DC shift in the DAC’s output.

Both DACs use an inverted R-2R ladder network that pro­duces a weighted voltage proportional to the input volt­age value. Each DAC has its own reference input to
facilitate independent full-scale values. Figure 1 depicts a
simplified circuit diagram of one of the two DACs.

Reference Inputs

The reference inputs accept both AC and DC values
with a voltage range extending from 0V to (VDD- 1.4V).
Determine the output voltage using the following equa­tion (OS_ = AGND):

V

OUT

= (V

REF

x NB / 4096) x 2

where NB is the numeric value of the DAC’s binary input
code (0 to 4095) and V

REF

is the reference voltage.

The reference input impedance ranges from 14kΩ (1554
hex) to several giga ohms (with an input code of 0000
hex). The reference input capacitance is code dependent
and typically ranges from 15pF with an input code of all
zeros to 50pF with a full-scale input code.

Output Amplifier

The output amplifiers on the MAX5154/MAX5155 have
internal resistors that provide for a gain of +2V/V when
OS_ is connected to AGND. These resistors are
trimmed to minimize gain error. The output amplifiers
have a typical slew rate of 0.75V/µs and settle to
1/2LSB within 15µs, with a load of 10kΩ in parallel with
100pF. Loads less than 2kΩ degrade performance.

The OS_ pin can be used to produce an adjustable off­set voltage at the output. For instance, to achieve a 1V
offset, apply -1V to the OS_ pin to produce an output
range from 1V to (1V + V

REF

x 2). Note that the DAC’s
output range is still limited by the maximum output volt­age specification.

Power-Down Mode

The MAX5154/MAX5155 feature a software-program­mable shutdown mode that reduces the typical supply
current to 2µA. The two DACs can be shutdown inde­pendently, or simultaneously using the appropriate pro­gramming command. Enter shutdown mode by writing
the appropriate input-control word (Table 1). In shut­down mode, the reference inputs and amplifier out-

puts become high impedance, and the serial
interface

remains active. Data in the input registers is

MAX5154/MAX5155

Low-Power, Dual, 12-Bit Voltage-Output DACs

with Serial Interface

_______________________________________________________________________________________ 9

Digital GroundDGND9
Serial-Data OutputDOUT10
User-Programmable OutputUPO11

Power-Down Lockout. The device can­not be powered down when PDL is low.

PDL

12

Reference for DAC BREFB13

Active-Low Clear Input. Resets all reg­isters to zero. DAC outputs go to 0V.

CL

5

Chip-Select Input

CS

6

Serial-Data Input DIN7
Serial Clock Input SCLK8

Reference for DAC A REFA4

DAC A Offset AdjustmentOSA3

PIN

DAC A Output Voltage OUTA2

Analog Ground AGND1

FUNCTIONNAME

14 OSB DAC B Offset Adjustment
15 OUTB DAC B Output Voltage
16 V

DD

Positive Power Supply

Figure 1. Simplified DAC Circuit Diagram

_____________________Pin Description

OS_

R

R

R R R

2R 2R 2R 2R

2R

D0 D9 D10

REF_

AGND

SHOWN FOR ALL 1s ON DAC

D11

OUT_

MAX5154/MAX5155

saved, allowing the MAX5154/MAX5155 to recall the
output state prior to entering shutdown when returning
to normal mode. Exit shutdown by recalling the previ­ous condition or by updating the DAC with new infor­mation. When returning to normal operation (exiting
shutdown), wait 20µs for output stabilization.

Serial Interface

The MAX5154/MAX5155 3-wire serial interface is com­patible with both Microwire (Figure 2) and SPI/QSPI
(Figure 3) serial-interface standards. The 16-bit serial
input word consists of an address bit, two control bits,
12 bits of data (MSB to LSB), and one sub bit as shown
in Figure 4. The address and control bits determine the
MAX5154/ MAX5155’s response, as outlined in Table 1.

Low-Power, Dual, 12-Bit Voltage-Output DACs
with Serial Interface

10 ______________________________________________________________________________________

FUNCTION

A0 C1 C0

D11.......................D0

(MSB) (LSB)

0 0 1 12-bit DAC data Load input register A; DAC registers are unchanged.

0 1 1 12-bit DAC data

Load all DAC registers from the shift register
(start up both DACs with new data.).

1 1 0 12-bit DAC data Load input register B; all DAC registers are updated.

0 1 0 12-bit DAC data Load input register A; all DAC registers are updated.

1 0 1 12-bit DAC data Load input register B; DAC registers are unchanged.

0 0 0 1 1 0 x xxxxxxxx

Shut down DAC A (provided PDL = 1).

0 0 0 1 0 1 x xxxxxxxx

Update DAC register B from input register B
(start up DAC B with data previously stored in input register B).

0 0 0 0 0 1 x xxxxxxxx

Update DAC register A from input register A
(start up DAC A with data previously stored in input register A).

1 1 1 xxxxxxxxxxxx

Shut down both DACs (provided PDL = 1).

1 0 0 xxxxxxxxxxxx

Update both DAC registers from their respective input registers
(start up both DACs with data previously stored in the input registers).

0 0 0 1 1 1 x xxxxxxxx

Shut down DAC B (provided PDL = 1).
0 0 0 0 1 0 x xxxxxxxx UPO goes low (default).
0 0 0 0 1 1 x xxxxxxxx UPO goes high.
0 0 0 1 0 0 1 xxxxxxxx Mode 1, DOUT clocked out on SCLK’s rising edge.
0 0 0 1 0 0 0 xxxxxxxx Mode 0, DOUT clocked out on SCLK’s falling edge (default).
0 0 0 0 0 0 x xxxxxxxx No operation (NOP).

Table 1. Serial-Interface Programming Commands

x = Don’t care
Note: D11, D10, D9, and D8 become control bits when A0, C1, and C0 = 0. S0 is a sub bit, always zero.

SCLK

DIN

CS

SK

SO

I/O

MICROWIRE

PORT

MAX5154
MAX5155

Figure 2. Connections for Microwire

16-BIT SERIAL WORD

S0

0

0

0

0

0

0

0

0

0

0

0
0
0
0
0
0

The MAX5154/MAX5155’s digital inputs are double
buffered, which allows any of the following: loading the
input register(s) without updating the DAC register(s),
updating the DAC register(s) from the input register(s),
or updating the input and DAC registers concurrently.
The address and control bits allow the DACs to act
independently.

Send the 16-bit data as one 16-bit word (QSPI) or two
8-bit packets (SPI, Microwire), with CS low during this
period. The address and control bits determine which
register will be updated, and the state of the registers
when exiting shutdown. The 3-bit address/control deter­mines the following:

• registers to be updated

• clock edge on which data is to be clocked out via
the serial-data output (DOUT)

• state of the user-programmable logic output

• configuration of the device after shutdown.

The general timing diagram of Figure 5 illustrates how
data is acquired. Driving CS low enables the device to
receive data. Otherwise, the interface control circuitry is
disabled. With CS low, data at DIN is clocked into the
register on the rising edge of SCLK. As CS goes high,
data is latched into the input and/or DAC registers
depending on the address and control bits. The maxi­mum clock frequency guaranteed for proper operation
is 10MHz. Figure 6 depicts a more detailed timing dia­gram of the serial interface.

MAX5154/MAX5155

Low-Power, Dual, 12-Bit Voltage-Output DACs

with Serial Interface

DIN

SCLK

CS

MOSI

SCK

I/O

SPI/QSPI

PORT

SS

+5V

CPOL = 0, CPHA = 0

MAX5154
MAX5155

Figure 3. Connections for SPI/QSPI

Figure 5. Serial-Interface Timing Diagram

CS

SCLK

DIN

COMMAND

EXECUTED

9

8

16

1

C1

A0 S0

C0

D11

D10

D9

D8 D5 D4 D3 D2 D1 D0D7 D6

______________________________________________________________________________________ 11

Figure 4. Serial-Data Format

1 Address/2 Control Bits

A0

Address Bits

C1, C0

Control Bits

12 Data Bits

D11.......................D0

MSB...DataBits...LSB

0

S0

SUB

BIT

16 Bits of Serial Data

MSB...................................................................................LSB

MAX5154/MAX5155

Low-Power, Dual, 12-Bit Voltage-Output DACs
with Serial Interface

12 ______________________________________________________________________________________

SCLK

DIN

t

CSO

t

CSS

t

CL

t

CH

t

CP

t

CSW

t

CS1

t

CSH

t

DS

t

DH

CS

Figure 6. Detailed Serial-Interface Timing Diagram

TO OTHER
SERIAL DEVICES

MAX5154
MAX5155

DIN

SCLK

CS

MAX5154
MAX5155

MAX5154
MAX5155

DINDOUT DOUT DOUT

SCLK

CS

DIN

SCLK

CS

Figure 7. Daisy Chaining MAX5154/MAX5155s

Figure 8. Multiple MAX5154/MAX5155s Sharing a Common DIN Line

DIN

SCLK

CS1
CS2

CS3

CS

MAX5154
MAX5155

SCLK

DIN

CS

SCLK

DIN

MAX5154
MAX5155

CS

SCLK

DIN

MAX5154
MAX5155

TO OTHER
SERIAL DEVICES

Serial-Data Output

The serial-data output, DOUT, is the internal shift regis­ter’s output. DOUT allows for daisy chaining of devices
and data readback. The MAX5154/MAX5155 can be
programmed to shift data out of DOUT on SCLK’s
falling edge (Mode 0) or on the rising edge (Mode 1).
Mode 0 provides a lag of 16 clock cycles, which main­tains compatibility with SPI/QSPI and Microwire inter­faces. In Mode 1, the output data lags 15.5 clock
cycles. On power-up, the device defaults to Mode 0.

User-Programmable Logic Output (UPO)

UPO allows an external device to be controlled through
the serial interface (Table 1), thereby reducing the
number of microcontroller I/O pins required. On power­up, UPO is low.

Power-Down Lockout Input (

PPDDLL

)

The power-down lockout pin (PDL) disables software
shutdown when low. When in shutdown, transitioning
PDL from high to low wakes up the part with the output
set to the state prior to shutdown. PDL can also be
used to asynchronously wake up the device.

Daisy Chaining Devices

Any number of MAX5154/MAX5155s can be daisy
chained by connecting the DOUT pin of one device to
the DIN pin of the following device in the chain (Figure 7).

Since the MAX5154/MAX5155’s DOUT pin has an inter­nal active pull-up, the DOUT sink/source capability
determines the time required to discharge/charge a
capacitive load. Refer to the digital output VOHand V

OL

specifications in the

Electrical Characteristics

.

Figure 8 shows an alternate method of connecting sev­eral MAX5154/MAX5155s. In this configuration, the
data bus is common to all devices; data is not shifted
through a daisy chain. More I/O lines are required in
this configuration because a dedicated chip-select
input (CS) is required for each IC.

__________Applications Information

Unipolar Output

Figure 9 shows the MAX5154/MAX5155 configured for
unipolar, rail-to-rail operation with a gain of +2V/V. The
MAX5154 can produce a 0V to 4.096V output with

2.048V reference (Figure 9), while the MAX5155 can
produce a range of 0V to 2.5V with a 1.25V reference.
Table 2 lists the unipolar output codes. An offset to the
output can be achieved by connecting a voltage to
OS_, as shown in Figure 10. By applying VOS_ = -1V,
the output values will range between 1V and (1V +
V

REF

x 2).

MAX5154/MAX5155

Low-Power, Dual, 12-Bit Voltage-Output DACs

with Serial Interface

Table 2. Unipolar Code Table (Gain = +2)

MAX5154
MAX5155

DAC_

GAIN = +2V/V

REF_

OUT_

OS_

DGNDAGND

+5V/+3V

V

DD

R

R

Figure 9. Unipolar Output Circuit (Rail-to-Rail)

MAX5154
MAX5155

DAC _

AGND DGND

REF_

OUT_

OS_

V

OS

+5V/+3V

V

DD

R

R

______________________________________________________________________________________ 13

ANALOG OUTPUT

1111 1111 1111 (0)

1000 0000 0001 (0)

DAC CONTENTS

MSB LSB

1000 0000 0000 (0)

0111 1111 1111 (0)

0000 0000 0000 (0) 0V

0000 0000 0001 (0)

Figure 10. Setting OS_ for Output Offset

Note: ( ) are for the sub bit.

+V

REF

+V

REF



2048

+V



REF REF

4096



+V

REF

+V

REF





















4095
4096

2049
4096






2047
4096

1

4096





















x

x 2

= x 2

x 2

x 2

2

V

MAX5154/MAX5155

Bipolar Output

The MAX5154/MAX5155 can be configured for a bipo­lar output, as shown in Figure 11. The output voltage is
given by the equation (OS_ = AGND):

V

OUT

= V

REF

[((2 x NB) / 4096) - 1]

where NB represents the numeric value of the DAC’s
binary input code. Table 3 shows digital codes and the
corresponding output voltage for Figure 11’s circuit.

Using an AC Reference

In applications where the reference has an AC signal
component, the MAX5154/MAX5155 have multiplying
capabilities within the reference input voltage range
specifications. Figure 12 shows a technique for apply-

ing a sinusoidal input to REF_, where the AC signal is
offset before being applied to the reference input.

Harmonic Distortion and Noise

The total harmonic distortion plus noise (THD+N) is typ­ically less than -78dB at full scale with a 1Vp-p input
swing at 5kHz. The typical -3dB frequency is 300kHz
for both devices, as shown in the

Typical Operating

Characteristics.

Digital Calibration and

Threshold Selection

Figure 13 shows the MAX5154/MAX5155 in a digital
calibration application. With a bright light value applied
to the photodiode (on), the DAC is digitally ramped until

Low-Power, Dual, 12-Bit Voltage-Output DACs
with Serial Interface

14 ______________________________________________________________________________________

Table 3. Bipolar Code Table

ANALOG OUTPUT

1111 1111 1 111 (0)

1000 0000 0 001 (0)

DAC CONTENTS

MSB LSB

1000 0000 0 000 (0) 0V

0111 1111 1 111 (0)

0000 0000 0 000 (0)

0000 0000 0 001 (0)

Figure 11. Bipolar Output Circuit

DAC_

OUT_

MAX5154
MAX5155

10k

26k

OS_

REF

R

R

V

DD

DGNDAGND

+5V/

+3V

AC

REFERENCE

INPUT

500mVp-p

MAX495

+5V/+3V

Figure 12. AC Reference Input Circuit

AGND

DIN

µP

DGND

MAX5154
MAX5155

DAC _

REF_

OS_

OUT_

R

R

V-

V+

PHOTODIODE

V+

VDD

V

OUT

R

PULLDOWN

+5V/+3V

Figure 13. Digital Calibration

Note: ( ) are for the sub bit.

+V

REF

+V

REF

-V

REF

-V

REF



2048

-V



REF REF

2048



REF_

MAX5154
MAX5155

DAC _

+5V/+3V

VDD

10k 10k

OS_

R

R

AGNDDGND

10k

OUT_

10k





















V+

V-

2047
2048

1

2048

1

2048
2047

2048



=

























- V

V

OUT

it trips the comparator. The microprocessor (µP) stores
this “high” calibration value. Repeat the process with a
dim light (off) to obtain the dark current calibration.
The µP then programs the DAC to set an output voltage
at the midpoint of the two calibrated values.
Applications include tachometers, motion sensing,
automatic readers, and liquid clarity analysis.

Digital Control of Gain and Offset

The two DACs can be used to control the offset and
gain for curve-fitting nonlinear functions, such as trans­ducer linearization or analog compression/expansion
applications. The input signal is used as the reference
for the gain-adjust DAC, whose output is summed with
the output from the offset-adjust DAC. The relative
weight of each DAC output is adjusted by R1, R2, R3,
and R4 (Figure 14).

Power-Supply Considerations

On power-up, the input and DAC registers clear (set to
zero code). For rated performance, V

REF_

should be at

least 1.4V below VDD. Bypass the power supply with a

4.7µF capacitor in parallel with a 0.1µF capacitor to

AGND. Minimize lead lengths to reduce lead inductance.

Grounding and Layout Considerations

Digital and AC transient signals on AGND can create
noise at the output. Connect AGND to the highest quality
ground available. Use proper grounding techniques,
such as a multilayer board with a low-inductance ground
plane. Carefully lay out the traces between channels to
reduce AC cross-coupling and crosstalk. Wire-wrapped
boards and sockets are not recommended. If noise
becomes an issue, shielding may be required.

MAX5154/MAX5155

Low-Power, Dual, 12-Bit Voltage-Output DACs

with Serial Interface

______________________________________________________________________________________ 15

AGND DGND

MAX5154
MAX5155

DACA

VDD

REFA

V

IN

V

REF

CS

SCLK

DIN

REFB

R1

R3

R

R

R

R

R4

R2

OUTB

OSB

OUTA

OSA

V

OUT

DACB

INPUT
REG A

INPUT
REG B

DAC

REG A

DAC

REG B

– OFFSET

[ ]

V

OUT

=

=

GAIN

[ ]

2NA

4096

NA IS THE NUMERIC VALUE OF THE INPUT CODE FOR DACA.
NB IS THE NUMERIC VALUE OF THE INPUT CODE FOR DACB.

R2

R1+R2R4R3

2NB

4096R4R3

(

V

IN

)(

)(

1+

)

(

V

REF

)(

)

[ ] [ ]

SHIFT

REGISTER

Figure 14. Digital Control of Gain and Offset

Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.

16

____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600

© 1997 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.

MAX5154/MAX5155

Low-Power, Dual, 12-Bit Voltage-Output DACs
with Serial Interface

___________________Chip Information

TRANSISTOR COUNT: 3053
SUBSTRATE CONNECTED TO AGND

INL

(LSB)

PIN-PACKAGETEMP. RANGEPART

±1

±1

±1/2

±1

±1/2

16 CERDIP*-55°C to +125°CMAX5154BMJE

16 QSOP-40°C to +85°CMAX5154BEEE

16 QSOP-40°C to +85°CMAX5154AEEE

16 Plastic DIP-40°C to +85°CMAX5154BEPE

16 Plastic DIP-40°C to +85°CMAX5154AEPE

_Ordering Information (continued)

*

Contact factory for availability.

16
15
14
13
12
11
10

9

1
2
3
4
5
6
7
8

AGND V

DD

OUTB
OSB
REFB
PDL
UPO
DOUT
DGND

TOP VIEW

MAX5154
MAX5155

DIP/QSOP

OUTA

OSA

CS

REFA

CL

DIN

SCLK

__________________Pin Configuration

QSOP.EPS

________________________________________________________Package Information

±2

±2

±1

±2

±1

±2

±1

16 QSOP0°C to +70°CMAX5155BCEE

±216 Plastic DIP0°C to +70°CMAX5155BCPE
±116 QSOP0°C to +70°CMAX5155ACEE

16 CERDIP*-55°C to +125°CMAX5155BMJE

16 QSOP-40°C to +85°CMAX5155BEEE

16 QSOP-40°C to +85°CMAX5155AEEE

16 Plastic DIP-40°C to +85°CMAX5155BEPE

16 Plastic DIP-40°C to +85°CMAX5155AEPE

16 Plastic DIP0°C to +70°C

MAX5155ACPE