Rainbow Electronics MAX5144 User Manual

Page 1
General Description
The MAX5141–MAX5144 are serial-input, voltage-output, 14-bit digital-to-analog converters (DACs) in tiny µMAX packages, 50% smaller than comparable DACs in an 8-pin SO. They operate from low +3V (MAX5143/ MAX5144) or +5V (MAX5141/MAX5142) single supplies. They provide 14-bit performance (±1LSB INL and DNL) over temperature without any adjustments. The DAC out­put is unbuffered, resulting in a low supply current of 120µA and a low offset error of 2LSBs.
The DAC output range is 0V to V
REF.
For bipolar opera­tion, matched scaling resistors are provided in the MAX5142/MAX5144 for use with an external precision op amp (such as the MAX400), generating a ±V
REF
output
swing. A 16-bit serial word is used to load data into the DAC
latch. The 25MHz, 3-wire serial interface is compatible with SPI™/QSPI™/MICROWIRE™, and can interface directly with optocouplers for applications requiring isola­tion. A power-on reset circuit clears the DAC output to code 0 (MAX5141/MAX5143) or code 8192 (MAX5142/ MAX5144) when power is initially applied.
A logic low on CLR asynchronously clears the DAC out­put to code 0 (MAX5141/MAX5143) or code 8192 (MAX5142/MAX5144), independent of the serial interface.
The MAX5141/MAX5143 are available in 8-pin µMAX packages and the MAX5142/MAX5144 are available in 10-pin µMAX packages.
Applications
High-Resolution and Gain Adjustment
Industrial Process Control
Automated Test Equipment
Data-Acquisition Systems
Features
Miniature (3mm x 5mm) 8-Pin µMAX Package
Low 120µA Supply Current
Fast 1µs Settling Time
25MHz SPI/QSPI/MICROWIRE-Compatible Serial
Interface
V
REF
Range Extends to V
DD
+5V (MAX5141/MAX5142) or +3V
(MAX5143/MAX5144) Single-Supply Operation
Full 14-Bit Performance Without AdjustmentsUnbuffered Voltage Output Directly Drives 60k
Loads
Power-On Reset Circuit Clears DAC Output to
Code 0 (MAX5141/MAX5143) or Code 8192 (MAX5142/MAX5144)
Schmitt-Trigger Inputs for Direct Optocoupler
Interface
Asynchronous CLR
MAX5141–MAX5144
+3V/+5V, Serial-Input,
Voltage-Output, 14-Bit DACs
________________________________________________________________ Maxim Integrated Products 1
19-1849; Rev 1; 5/01
Ordering Information
SPI and QSPI are trademarks of Motorola, Inc. MICROWIRE is a trademark of National Semiconductor Corp.
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
Pin Configurations
TOP VIEW
REF
CS
SCLK
DIN
REF
SCLK
DIN
CLR
1
CS
2
MAX5142
3
MAX5144
4
5
µMAX
1
2
MAX5141 MAX5143
3
4
µMAX
GND
8
V
7
DD
OUT
6
5
CLR
GND
10
9
V
RFB
8
7
INV
OUT
6
DD
PART T EM P. RA N G E PIN - PAC K A GE IN L ( L SB )
M A X5 1 4 1E U A
M A X5 1 4 2E U B
M A X5 1 4 3E U A
M A X5 1 4 4E U B
-40°C to +85°C 8 µMAX ± 15 U nip ol ar
-40°C to +85°C 10 µMAX ± 15 Bi pol ar
-40°C to +85°C 8 µMAX ± 13 U nip ol ar
-40°C to +85°C 10 µMAX ± 13 Bi pol ar
SU PPL Y
R A NG E ( V)
O U TPU T SWING
Page 2
MAX5141–MAX5144
+3V/+5V, Serial-Input, Voltage-Output, 14-Bit DACs
2 _______________________________________________________________________________________
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS
(VDD= +3V (MAX5143/MAX5144) or +5V (MAX5141/MAX5142), V
REF
= +2.5V, TA= T
MIN
to T
MAX
, CL= 10pF, GND = 0, RL= ∞,
unless otherwise noted. Typical values are at T
A
= +25°C.)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
VDDto GND..............................................................-0.3V to +6V
CS, SCLK, DIN, CLR to GND ...................................-0.3V to +6V
REF to GND................................................-0.3V to (V
DD
+ 0.3V)
OUT, INV to GND .....................................................-0.3V to V
DD
RFB to INV ...................................................................-6V to +6V
RFB to GND.................................................................-6V to +6V
Maximum Current into Any Pin............................................50mA
Continuous Power Dissipation (T
A
= +70°C)
8-Pin µMAX (derate 4.5mW/°C above +70°C)...............362mW
10-Pin µMAX (derate 5.6mW/°C above +70°C).............444mW
Operating Temperature Ranges
MAX514_ EUA ...................................................-40°C to +85°C
MAX514_ EUB ...................................................-40°C to +85°C
Storage Temperature Range .............................-65°C to +150°C
Maximum Die Temperature..............................................+150°C
Lead Temperature (soldering, 10s) .................................+300°C
REFERENCE INPUT
STATIC PERFORMANCE—ANALOG SECTION
Integral Nonlinearity INL LSB±0.5 ±1MAX514_
+4.5V ≤ VDD≤ +5.5V (MAX5141/MAX5142) ±1
Power-Supply Rejection
+2.7V ≤ VDD≤ +3.3V (MAX5143/MAX5144) ±1
LSB
Ratio error
%
LSB
RFB/R
INV
Digital Feedthrough nV-s0.2
Code = 0000 hex; CS = VDD; SCLK, DIN = 0V to V
DD
levels
DAC Glitch Impulse nV-s7Major-carry transition
Output Settling Time µs1
To ±1/2LSB of FS
DYNAMIC PERFORMANCE—ANALOG SECTION
Voltage-Output Slew Rate SR V/µs15(Note 5)
Bipolar Zero Offset Error
Guaranteed monotonic
LSBZSE
PARAMETER SYMBOL MIN TYP MAX UNITS
Zero-Code Offset Error ±2
Differential Nonlinearity DNL LSB
Zero-Code Tempco ZS
TC
±0.05 ppm/°C
±10Gain Error (Note 1) LSB
Gain-Error Tempco ±0.1 ppm/°C
Resolution N 14 Bits
±0.5 ±1
6.2 kDAC Output Resistance R
OUT
1
Bipolar Resistor Matching
±0.03
±20
Bipolar Zero Tempco BZS
TC
±0.5 ppm/°C
PSR
Reference Input Range V
REF
2.0 V
DD
V
10
Reference Input Resistance (Note 4)
R
REF
6
k
CONDITIONS
(Note 2)
(Note 3)
Unipolar mode
Bipolar mode
STATIC PERFORMANCE—ANALOG SECTION
Page 3
MAX5141–MAX5144
+3V/+5V, Serial-Input,
Voltage-Output, 14-Bit DACs
_______________________________________________________________________________________ 3
TIMING CHARACTERISTICS
(VDD= +2.7V to +3.3V (MAX5143/MAX5144), VDD= +4.5V to +5.5V (MAX5141/MAX5142), V
REF
= +2.5V, GND = 0, CMOS inputs,
T
A
= T
MIN
to T
MAX
, unless otherwise noted. Typical values are at TA= +25°C.) (Figure 1)
Note 1: Gain error tested at V
REF
= +2.0V, +2.5V, and +3.0V (MAX5143/MAX5144) or V
REF
= +2.0V, +2.5V, +3.0V, and +5.0V
(MAX5141/MAX5142).
Note 2: R
OUT
tolerance is typically ±20%.
Note 3: Min/max range guaranteed by gain-error test. Operation outside min/max limits will result in degraded performance. Note 4: Reference input resistance is code dependent, minimum at 2155 hex in unipolar mode, 1155 hex in bipolar mode. Note 5: Slew-rate value is measured from 10% to 90%. Note 6: Guaranteed by design. Not production tested. Note 7: Guaranteed by power-supply rejection test and Timing Characteristics.
Code = 3FFF hex
All digital inputs at VDDor GND
All digital inputs at VDDor GND
MAX5143/MAX5144
Code = 0000 hex, V
REF
= 1V
P-P
at 100kHz
Code = 0000 hex
Code = 3FFF hex
(Note 6)
CONDITIONS
mW
0.36
PDPower Dissipation
mA0.12 0.20I
DD
Positive Supply Current
V
2.7 3.6
V
DD
Positive Supply Range (Note 7)
V0.15V
H
Hysteresis Voltage
pF310C
IN
Input Capacitance
mV
P-P
1
MHz1BWReference -3dB Bandwidth
µA±1I
IN
Input Current
V0.8V
IL
Input Low Voltage
V2.4V
IH
Input High Voltage
Reference Feedthrough
dB92SNRSignal-to-Noise Ratio
70
pF
170
C
INREF
Reference Input Capacitance
UNITSMIN TYP MAXSYMBOLPARAMETER
(Note 6)
CONDITIONS
µs20
VDDHigh to CS Low (Power-Up Delay)
ns20t
CL
SCLK Pulse Width Low
ns20t
CH
MHz25f
CLK
SCLK Frequency
SCLK Pulse Width High
ns20t
CLW
CLR Pulse Width Low
ns0t
DH
DIN to SCLK High Hold
ns15t
DS
DIN to SCLK High Setup
ns15t
CSS0
CS Low to SCLK High Setup
ns15t
CSS1
CS High to SCLK High Setup
ns35t
CSH0
SCLK High to CS Low Hold
ns20t
CSH1
SCLK High to CS High Hold
UNITSMIN TYP MAXSYMBOLPARAMETER
ELECTRICAL CHARACTERISTICS (continued)
(VDD= +3V (MAX5143/MAX5144) or +5V (MAX5141/MAX5142), V
REF
= +2.5V, TA= T
MIN
to T
MAX
, CL= 10pF, GND = 0, RL = ∞,
unless otherwise noted. Typical values are at T
A
= +25°C.)
0.60MAX5141/MAX5142
MAX5143/MAX5144
MAX5141/MAX5142 4.5 5.5
DYNAMIC PERFORMANCE—REFERENCE SECTION
STATIC PERFORMANCE—DIGITAL INPUTS
POWER SUPPLY
Page 4
MAX5141–MAX5144
+3V/+5V, Serial-Input, Voltage-Output, 14-Bit DACs
4 _______________________________________________________________________________________
Typical Operating Characteristics
(VDD= +3V (MAX5143/MAX5144) or +5V (MAX5141/MAX5142), V
REF
= +2.5V, TA= T
MIN
to T
MAX
, GND = 0, RL= , unless otherwise
noted. Typical values are at T
A
= +25°C.)
0
0.050
0.025
0.100
0.075
0.125
0.150
-40 10-15 35 60 85
SUPPLY CURRENT vs. TEMPERATURE
MAX5141/44 toc01
TEMPERATURE (°C)
SUPPLY CURRENT (mA)
VDD = +5V
VDD = +3V
0.05
0.07
0.06
0.09
0.08
0.11
0.10
0.12
0 1.0 1.50.5 2.0 2.5 3.0 3.5 4.5 5.0
SUPPLY CURRENT
vs. REFERENCE VOLTAGE
MAX5141/44 toc02
REFERENCE VOLTAGE (V)
SUPPLY CURRENT (mA)
4.0
VDD = +5V
0 1.0 1.50.5 2.0 2.5 3.0
0.05
0.07
0.06
0.09
0.08
0.11
0.10
0.12
SUPPLY CURRENT
vs. REFERENCE VOLTAGE
MAX5141/44 toc03
REFERENCE VOLTAGE (V)
SUPPLY CURRENT (mA)
VDD = +3V
-0.2
0
-0.1
0.2
0.1
0.3
0.4
-40 10-15 35 60 85
ZERO-CODE OFFSET ERROR
vs. TEMPERATURE
MAX5141 toc04
TEMPERATURE (°C)
OFFSET ERROR (LSB)
-0.30
-0.20
-0.25
-0.10
-0.15
-0.05
0
-40 10-15 35 60 85
GAIN ERROR vs. TEMPERATURE
MAX5141 toc07
TEMPERATURE (°C)
GAIN ERROR (LSB)
0.5
0.4
0.3
0.2
0.1
0.0
-0.1
-0.2
-0.3
-0.4
-0.5 0 2.50k 5.00k 7.50k 10.00k 12.50k 15.00k
DIFFERENTIAL NONLINEARITY vs. CODE
MAX5141 toc08
DNL (LSB)
CODE
1.0
0.8
0.6
0.4
0.2
0.0
-0.2
-0.4
-0.6
-0.8
-1.0
CODE
0 2.50k 5.00k 7.50k 10.00k 12.50k 15.00k
INTEGRAL NONLINEARITY vs. CODE
MAX5141 toc09
INL (LSB)
-0.4
0
-0.2
0.4
0.2
0.6
0.8
-40 10-15 35 60 85
INTEGRAL NONLINEARITY
vs. TEMPERATURE
MAX5141 toc05
TEMPERATURE (°C)
INL (LSB)
+INL
-INL
-0.4
-0.2
-0.3
0
-0.1
0.1
0.2
-40 10-15 35 60 85
DIFFERENTIAL NONLINEARITY
vs. TEMPERATURE
MAX5141 toc06
TEMPERATURE (°C)
DNL (LSB)
+DNL
-DNL
Page 5
MAX5141–MAX5144
+3V/+5V, Serial-Input,
Voltage-Output, 14-Bit DACs
_______________________________________________________________________________________ 5
Typical Operating Characteristics (continued)
(VDD= +3V (MAX5143/MAX5144) or +5V (MAX5141/MAX5142), V
REF
= +2.5V, TA= T
MIN
to T
MAX
, GND = 0, RL= , unless otherwise
noted. Typical values are at T
A
= +25°C.)
UNIPOLAR POWER-ON GLITCH
(REF = V
DD
)
MAX5141/44 toc17
50ms/div
V
DD
2V/div
V
OUT
10mV/div
REFERENCE CURRENT
vs. DIGITAL INPUT CODE
140
FULL-SCALE STEP RESPONSE
(FALLING)
MAX5141/44 toc11
FULL-SCALE STEP RESPONSE
(RISING)
MAX5141/44 toc12
120
100
80
60
40
REFERENCE CURRENT (µA)
20
0
0 5k 10k 15k 20k
INPUT CODE
MAJOR-CARRY GLITCH
(RISING)
200ns/div
MAX5141/44 toc13
CL = 20pF
MAX5141 toc10
CS 1V/div
A
OUT
20mV/div
400ns/div
MAJOR-CARRY GLITCH
(FALLING)
200ns/div
CL = 20pF
MAX5141/44 toc14
CL = 20pF
CS 2V/div
A
OUT
2V/div
CS 1V/div
A
OUT
20mV/div
400ns/div
DIGITAL FEEDTHROUGH
50ns/div
CL = 20pF
MAX5141/44 toc15
CS 2V/div
A
OUT
2V/div
D
IN
2V/div
A
OUT
10mV/div
INTEGRAL NONLINEARITY vs.
0.70
0.65
0.60
0.55
INL (LSB)
0.50
0.45
0.40
2.0 3.0 3.52.5 4.0 4.5 5.0
REFERENCE VOLTAGE
REFERENCE VOLTAGE (V)
MAX5141 toc16
Page 6
MAX5141–MAX5144
+3V/+5V, Serial-Input, Voltage-Output, 14-Bit DACs
6 _______________________________________________________________________________________
Pin Descriptions
Figure 1. Timing Diagram
PIN
MAX5141 MAX5143
MAX5142 MAX5144
NAME FUNCTION
1 1 REF Voltage Reference Input 22CS Chip-Select Input
3 3 SCLK Serial Clock Input. Duty cycle must be between 40% and 60%.
4 4 DIN Serial Data Input
55CLR
Clear Input. Logic low asynchronously clears the DAC to code 0 (MAX5141/MAX5143) or code 8192 (MAX5142/MAX5144).
6 6 OUT DAC Output Voltage
7 INV
Junction of Internal Scaling Resistors. Connect to external op amps inverting input in bipolar mode.
8 RFB Feedback Resistor. Connect to external op amps output in bipolar mode.
79VDDSupply Voltage. Use +3V for MAX5143/MAX5144 and +5V for MAX5141/MAX5142.
8 10 GND Ground
CS
t
SCLK
DIN
CSHO
t
CSSO
t
t
CH
t
DH
DS
D13 D12
t
CL
t
CSH1
t
CSS1
S0
t
LDACS
Page 7
MAX5141–MAX5144
+3V/+5V, Serial-Input,
Voltage-Output, 14-Bit DACs
_______________________________________________________________________________________ 7
Detailed Description
The MAX5141–MAX5144 voltage-output, 14-bit digital­to-analog converters (DACs) offer full 14-bit perfor­mance with less than 1LSB integral linearity error and less than 1LSB differential linearity error, thus ensuring monotonic performance. Serial data transfer minimizes the number of package pins required.
The MAX5141–MAX5144 are composed of two matched DAC sections, with a 10-bit inverted R-2R DAC forming the ten LSBs and the four MSBs derived from 15 identically matched resistors. This architecture allows the lowest glitch energy to be transferred to the DAC output on major-carry transitions. It also lowers the DAC output impedance by a factor of eight compared
Figure 2b. Typical Operating Circuit—Bipolar Output
Figure 2a. Typical Operating Circuit—Unipolar Output
+2.5V
MAX6166
+3V/+5V
0.1µF
MC68XXXX
CS
DIN
SCLK
CLR
(GND)
PCS0
MOSI
SCLK
IC1
MAX6166
+3V/+5V
0.1µF
CS
DIN
SCLK
CLR
V
DD
MC68XXXX
PCS0
MOSI
SCLK
IC1
(GND)
V
REF
DD
1µF
0.1µF
REF
MAX5141 MAX5142 MAX5143 MAX5144
+2.5V
MAX5142 MAX5144
GND
1µF
0.1µF
GND
R
INV
MAX495
OUT
RFB
R
INV
FB
OUT
EXTERNAL OP AMP
+5V
MAX400
EXTERNAL OP AMP
-5V
UNIPOLAR OUT
BIPOLAR OUT
Page 8
MAX5141–MAX5144
+3V/+5V, Serial-Input, Voltage-Output, 14-Bit DACs
8 _______________________________________________________________________________________
to a standard R-2R ladder, allowing unbuffered opera­tion in medium-load applications.
The MAX5142/MAX5144 provide matched bipolar offset resistors, which connect to an external op amp for bipo­lar output swings (Figure 2b).
Digital Interface
The MAX5141–MAX5144 digital interface is a standard 3-wire connection compatible with SPI/QSPI/ MICROWIRE interfaces. The chip-select input (CS) frames the serial data loading at the data-input pin (DIN). Immediately following CSs high-to-low transition, the data is shifted synchronously and latched into the input register on the rising edge of the serial clock input (SCLK). After 16 bits (14 data bits, plus two subbits set to zero) have been loaded into the serial input register, it transfers its contents to the DAC latch on CSs low-to­high transition (Figure 3). Note that if CS is not kept low during the entire 16 SCLK cycles, data will be corrupt­ed. In this case, reload the DAC latch with a new 16-bit word.
Clearing the DAC
A 20ns (min) logic low pulse on CLR asynchronously clears the DAC buffer to code 0 in the MAX5141/ MAX5143 and to code 8192 in the MAX5142/MAX5144.
External Reference
The MAX5141–MAX5144 operate with external voltage references from +2V to VDD. The reference voltage determines the DACs full-scale output voltage.
Power-On Reset
The power-on reset circuit sets the output of the MAX5141/MAX5143 to code 0 and the output of the MAX5142/MAX5144 to code 8192 when VDDis first
applied. This ensures that unwanted DAC output volt­ages will not occur immediately following a system power-up, such as after a loss of power.
Applications Information
Reference and Ground Inputs
The MAX5141–MAX5144 operate with external voltage references from +2V to VDD, and maintain 14-bit perfor­mance if certain guidelines are followed when selecting and applying the reference. Ideally, the reference’s temperature coefficient should be less than 0.5ppm/°C to maintain 14-bit accuracy to within 1LSB over the -40°C to +85°C extended temperature range. Since this converter is designed as an inverted R-2R voltage-mode DAC, the input resistance seen by the voltage reference is code dependent. In unipolar mode, the worst-case input-resis­tance variation is from 11.5k(at code 2155 hex) to 200k(at code 0000 hex). The maximum change in load current for a +2.5V reference is +2.5V / 11.5k= 217µA; therefore, the required load regulation is 28ppm/mA for a maximum error of 0.1LSB. This implies a reference out­put impedance of less than 72m. In addition, the sig­nal-path impedance from the voltage reference to the reference input must be kept low because it contributes directly to the load-regulation error.
The requirement for a low-impedance voltage reference is met with capacitor bypassing at the reference inputs and ground. A 0.1µF ceramic capacitor with short leads between REF and GND provides high-frequency bypassing. A surface-mount ceramic chip capacitor is preferred because it has the lowest inductance. An additional 1µF between REF and GND provides low-fre­quency bypassing. A low-ESR tantalum, film, or organic semiconductor capacitor works well. Leaded capaci­tors are acceptable because impedance is not as criti-
Figure 3. MAX5141–MAX5144 3-Wire Interface Timing Diagram
CS
DAC
UPDATED
SCLK
SUB-BITS
DIN
D13 D6 D5 D4 D3 D2 D1 D0 S1 S0
D12 D11 D10 D9 D8 D7
MSB LSB
Page 9
MAX5141–MAX5144
+3V/+5V, Serial-Input,
Voltage-Output, 14-Bit DACs
_______________________________________________________________________________________ 9
cal at lower frequencies. The circuit can benefit from even larger bypassing capacitors, depending on the stability of the external reference with capacitive load­ing.
Unbuffered Operation
Unbuffered operation reduces power consumption as well as offset error contributed by the external output buffer. The R-2R DAC output is available directly at OUT, allowing 14-bit performance from +V
REF
to GND without degradation at zero scale. The DACs output impedance is also low enough to drive medium loads (RL> 60k) without degradation of INL or DNL; only the gain error is increased by externally loading the DAC output.
External Output Buffer Amplifier
The requirements on the external output buffer amplifier change whether the DAC is used in unipolar or bipolar operational mode. In unipolar mode, the output amplifi­er is used in a voltage-follower connection. In bipolar mode (MAX5142/MAX5144 only), the amplifier operates with the internal scaling resistors (Figure 2b). In each mode, the DACs output resistance is constant and is independent of input code; however, the output amplifi­ers input impedance should still be as high as possible to minimize gain errors. The DACs output capacitance is also independent of input code, thus simplifying sta­bility requirements on the external amplifier.
In bipolar mode, a precision amplifier operating with dual power supplies (such as the MAX400) provides the ±V
REF
output range. In single-supply applications, precision amplifiers with input common-mode ranges including GND are available; however, their output swings do not normally include the negative rail (GND) without significant degradation of performance. A sin­gle-supply op amp, such as the MAX495, is suitable if the application does not use codes near zero.
Since the LSBs for a 14-bit DAC are extremely small (152.6µV for V
REF
= +2.5V), pay close attention to the external amplifiers input specification. The input offset voltage can degrade the zero-scale error and might require an output offset trim to maintain full accuracy if the offset voltage is greater than 1/2LSB. Similarly, the input bias current multiplied by the DAC output resis­tance (typically 6.25k) contributes to zero-scale error. Temperature effects also must be taken into considera­tion. Over the -40°C to +85°C extended temperature range, the offset voltage temperature coefficient (refer­enced to +25°C) must be less than 0.95µV/°C to add less than 1/2LSB of zero-scale error. The external amplifiers input resistance forms a resistive divider with
the DAC output resistance, which results in a gain error. To contribute less than 1/2LSB of gain error, the input resistance typically must be greater than:
The settling time is affected by the buffer input capaci­tance, the DACs output capacitance, and PC board capacitance. The typical DAC output voltage settling time is 1µs for a full-scale step. Settling time can be sig­nificantly less for smaller step changes. Assuming a single time-constant exponential settling response, a full-scale step takes 10.4 time constants to settle to within 1/2LSB of the final output voltage. The time con­stant is equal to the DAC output resistance multiplied by the total output capacitance. The DAC output capacitance is typically 10pF. Any additional output capacitance increases the settling time.
The external buffer amplifiers gain-bandwidth product is important because it increases the settling time by adding another time constant to the output response. The effective time constant of two cascaded systems, each with a single time-constant response, is approxi­mately the root square sum of the two time constants. The DAC outputs time constant is 1µs / 10.4 = 96ns, ignoring the effect of additional capacitance. If the time constant of an external amplifier with 1MHz bandwidth is 1 / 2π (1MHz) = 159ns, then the effective time con­stant of the combined system is:
This suggests that the settling time to within 1/2LSB of the final output voltage, including the external buffer amplifier, will be approximately 10.4
186ns = 1.93µs.
Digital Inputs and Interface Logic
The digital interface for the 14-bit DAC is based on a 3-wire standard that is compatible with SPI, QSPI, and MICROWIRE interfaces. The three digital inputs (CS, DIN, and SCLK) load the digital input data serially into the DAC.
A 20ns (min) logic low pulse to CLR clears the data in the DAC buffer.
All of the digital inputs include Schmitt-trigger buffers to accept slow-transition interfaces. This means that opto­couplers can interface directly to the MAX5141– MAX5144 without additional external logic. The digital inputs are compatible with TTL/CMOS-logic levels.
96ns 159ns 186ns
22
()
+
()
 
 
=
6.25k MΩΩ ×=2 205
15
Page 10
MAX5141–MAX5144
+3V/+5V, Serial-Input, Voltage-Output, 14-Bit DACs
10 ______________________________________________________________________________________
Unipolar Configuration
Figure 2a shows the MAX5141–MAX5144 configured for unipolar operation with an external op amp. The op amp is set for unity gain, and Table 1 lists the codes for this circuit. Bipolar MAX5142/MAX5144 can also be used in unipolar configuration by connecting RFB and INV to REF. This allows the DAC to power up to midscale.
Bipolar Configuration
Figure 2b shows the MAX5141–MAX5144 configured for bipolar operation with an external op amp. The op amp is set for unity gain with an offset of -1/2V
REF
. Table 2 shows the offset binary codes for this circuit (less than 0.25 inches).
Power-Supply Bypassing and
Ground Management
Bypass VDDwith a 0.1µF ceramic capacitor connected between V
DD
and GND. Mount the capacitor with short
leads close to the device (less than 0.25 inches).
Table 1. Unipolar Code Table
Table 2. Bipolar Code Table
V
REF
(1 / 16,384)
0000 0000 0000 01
V
REF
(8192 / 16,384) =
1/
2
V
REF
1000 0000 0000 00
V
REF
(16,383 / 16,384)
1111 1111 1111 11
ANALOG OUTPUT, V
OUT
MSB LSB
DAC LATCH CONTENTS
-V
REF
(8192 / 8192) = -V
REF
0000 0000 0000 00
-V
REF
(1 / 8192)
0111 1111 1111 11
0V1000 0000 0000 00
+V
REF
(1 / 8192)
1000 0000 0000 01
+V
REF
(8191 / 8192)
1111 1111 1111 11
ANALOG OUTPUT, V
OUT
MSB LSB
DAC LATCH CONTENTS
Chip Information
TRANSISTOR COUNT: 2800
PROCESS: BiCMOS
Functional Diagrams
V
DD
V
DD
REF
SCLK
DIN
CLR
MAX5141 MAX5143
14-BIT DAC
CS
CONTROL
LOGIC
14-BIT DATA LATCH
SERIAL INPUT REGISTER
GND
OUT
SCLK
REF
DIN
CLR
MAX5142 MAX5144
14-BIT DAC
CS
CONTROL
LOGIC
14-BIT DATA LATCH
SERIAL INPUT REGISTER
GND
RFB INV
OUT
Page 11
MAX5141-MAX5144
+3V/+5V, Serial-Input,
Voltage-Output, 14-Bit DACs
______________________________________________________________________________________ 11
________________________________________________________Package Information
8LUMAXD.EPS
Page 12
MAX5141–MAX5144
+3V/+5V, Serial-Input, Voltage-Output, 14-Bit DACs
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 _____________________12
© 2001 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.
Package Information (continued)
MAX5141–MAX5144
10LUMAX.EPS
Loading...