MAX5070/MAX5071
To calculate the capacitance required, use the following
formula:
where:
IG= QGf
SW
ICCis the MAX5070/MAX5071s’ maximum internal supply current after startup (see the Typical Operating
Characteristics to find the IINat a given f
OSC
). QG is the
total gate charge for the MOSFET, fSWis the converter
switching frequency, V
HYST
is the bootstrap UVLO hysteresis (6V), and tSSis the soft-start time, which is set
by external circuitry.
Size the resistor R
ST
according to the desired startup
time period, t
ST
, for the calculated CST. Use the following equations to calculate the average charging current
(I
CST
) and the startup resistor (RST).
Where V
INMIN
is the minimum input supply voltage for
the application (36V for telecom), V
SUVR
is the boot-
strap UVLO wake-up level (16V), and I
START
is the V
IN
supply current at startup (65µA, max). Choose a higher
value for RSTthan the one calculated above if longer
startup times can be tolerated in order to minimize
power loss in RST.
The above startup method is applicable to circuits where
the tertiary winding has the same phase as the output
windings. Thus, the voltage on the tertiary winding at any
given time is proportional to the output voltage and goes
through the same soft-start period as the output voltage.
The minimum discharge time of CSTfrom 16V to 10V
must be greater than the soft-start time (tSS).
Undervoltage Lockout (UVLO)
The minimum turn-on supply voltage for the
MAX5070/MAX5071 is 16V. Once VCCreaches 16V, the
reference powers up. There is 6V of hysteresis from the
minimum turn-on voltage to the UVLO threshold. Once
VCCreaches 16V, the MAX5070/MAX5071 will operate
with V
CC
down to 10V. Once VCCgoes below 10V the
device is in UVLO. When in UVLO, the quiescent supply current into VCCfalls back to 37µA (typ), and OUT
and VREF are pulled low.
MOSFET Driver
OUT drives an external n-channel MOSFET and swings
from GND to VCC. Ensure that VCCremains below the
absolute maximum VGSrating of the external MOSFET.
OUT is a push-pull output with the on-resistance of the
PMOS typically 3.5Ω and the on-resistance of the NMOS
typically 4.5Ω. The driver can source 2A typically and
sink 1A typically. This allows for the MAX5070/MAX5071
to quickly turn on and off high gate-charge MOSFETs.
Bypass VCCwith one or more 0.1µF ceramic capacitors
to GND, placed close to the MAX5070/MAX5071. The
average current sourced to drive the external MOSFET
depends on the total gate charge (QG) and operating
frequency of the converter. The power dissipation in the
MAX5070/MAX5071 is a function of the average output
drive current (I
DRIVE
). Use the following equation to cal-
culate the power dissipation in the device due to I
DRIVE
:
I
DRIVE
= QGx f
SW
PD = (I
DRIVE
+ ICC) x V
CC
where ICCis the operating supply current. See the
Typical Operating Characteristics for the operating
supply current at a given frequency.
Error Amplifier (MAX5070A/MAX5070B)
The MAX5070 includes an internal error amplifier. The
inverting input is at FB and the noninverting input is internally connected to a 2.5V reference. The internal error
amplifier is useful for nonisolated converter design (see
Figure 6) and isolated design with primary-side regulation
through a bias winding (see Figure 5). In the case of a
nonisolated power supply, the output voltage will be:
where R1 and R2 are from Figure 6.