Rainbow Electronics MAX4889C User Manual

General Description

The MAX4889B/MAX4889C high-speed passive switch­es route PCI Express

®

(PCIe) data between two possi­ble destinations in desktop or notebook PCs. The
MAX4889B/MAX4889C are quad double-pole/double­throw (4 x DPDT) switches ideal for switching four half
lanes of PCIe data between two destinations. The
MAX4889B/MAX4889C feature a single digital control
input (SEL) to switch signal paths.

The MAX4889C is intended for use in systems (e.g.,
SAS) where both the input and output are capacitively
coupled, and provides a 10µA (typ) source current and
a 60kΩ (typ) internal biasing resistor to GND at the
_OUT_ terminals.

The MAX4889B/MAX4889C are fully specified to oper­ate from a single +3.3V (typ) power supply. Both
devices are available in an industry-standard 3.5mm x

9.0mm, 42-pin TQFN package. These devices operate
over the -40°C to +85°C extended temperature range.

Applications

Desktop PCs

Notebook PCs

Servers

Video Graphics Cards—SLI™
(Scaled Link Interface) and CrossFire™

Features

o Single +3.3V Power-Supply Voltage

o Support PCIe Gen I, Gen II Data Rates

o Supports SAS I, SAS II, and SAS 6.0Gbps

(MAX4889C)

o Superior Return Loss

Better than -14dB at 2.8GHz

o Small 3.5mm x 9.0mm, 42-Pin TQFN Package

o Industry-Standard Pinouts

MAX4889B/MAX4889C

2.5/5.0Gbps PCIe Passive Switches

________________________________________________________________

Maxim Integrated Products

1

Ordering Information

19-4148; Rev 1; 8/08

For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.

Note: All devices are specified over the -40°C to +85°C temperature

range.

+

Denotes a lead-free package.

*

EP = Exposed pad.

Pin Configuration

TOP VIEW

MAX4889B/

MAX4889C

TQFN

18

19

20

21

GND

V

CC

GND

V

CC

42

+

41

40

39

GND

V

CC

GND

V

CC

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17

38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22

COUTB+

COUTB-

DIN+

DIN-

DOUTB+

DOUTB-

CIN-

CIN+

V

CC

BOUTB-

BOUTB+

BIN-

BIN+

AOUTB-

AOUTB+

AIN-

AIN+

COUTA-

VCCGND

DOUTA+

DOUTA-

GND

COUTA+

GND

SEL

VCCBOUTA-

BOUTA+

VCCGND

AOUTA-

AOUTA+

GND

*CONNECT EXPOSED PAD TO GROUND.

*EP

PCI Express is a registered trademark of PCI-SIG Corp.

SLI is a trademark of NVIDIA Corp.

CrossFire is a trademark of ATI Technologies, Inc.

Typical Operating Circuit appears at end of data sheet.

PART PIN-PACKAGE PKG CODE

MAX4889BETO+ 42 TQFN-EP* T423590M-1

MAX4889CETO+ 42 TQFN-EP* T423590M-1

MAX4889B/MAX4889C

2.5/5.0Gbps PCIe Passive Switches

2 _______________________________________________________________________________________

ABSOLUTE MAXIMUM RATINGS

ELECTRICAL CHARACTERISTICS

(VCC= +3.3V ±10%, TA=T

MIN

to T

MAX,

unless otherwise noted. Typical values are at VCC= +3.3V, TA= +25°C, unless otherwise

noted.) (Note 3)

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.

(All voltages referenced to GND, unless otherwise noted.)
V

CC

...........................................................................-0.3V to +4V

SEL, _IN_, _OUTA_, _OUTB_ (Note 1) .......-0.3V to (V

CC

+ 0.3V)

Continuous Current (AIN_ to AOUTA_/AOUTB_, BIN_ to

BOUTA_/BOUTB_, CIN_ to COUTA_/COUTB_, DIN_ to

DOUTA_/DOUTB_)........................................................±70mA

Peak Current (AIN_ to AOUTA_/AOUTB_, BIN_ to

BOUTA_/BOUTB_, CIN_ to COUTA_/COUTB_, DIN_ to

DOUTA_/DOUTB_)

(pulsed at 1ms, 10% duty cycle)..............................±70mA

Continuous Current (SEL).................................................±10mA

Peak Current (SEL)

(pulsed at 1ms, 10% duty cycle)..................................±10mA

Continuous Power Dissipation (T

A

= +70°C) for multilayer board:

42-Pin TQFN (derate 35.7mW/°C above +70°C) .......2857mW

Operating Temperature Range ...........................-40°C to +85°C

Junction Temperature......................................................+150°C

Storage Temperature Range .............................-65°C to +150°C

Package Junction-to-Ambient Thermal Resistance

(θ

JA

) (Note 2) ............................................................28.0°C/W

Package Junction-to-Case Thermal Resistance

(θ

JC

) (Note 2) ..............................................................2.0°C/W

Lead Temperature (soldering, 10s) .................................+300°C

)

)

Note 1: Signals on SEL, _IN_, _OUTA_, _OUTB_ exceeding VCCor GND are clamped by internal diodes. Limit forward-diode current

to maximum current rating.

Note 2: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a 4-layer

board. For detailed information on package thermal considerations, refer to www.maxim-ic.com/thermal-tutorial

.

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

DC PERFORMANCE

Analog Signal Range

On-Resistance R

On-Resistance Match Between
Pairs of Same Channel

On-Resistance Match Between
Channels

On-Resistance Flatness R

_OUTA_ or _OUTB_ Off-Leakage
Current

_IN_ On-Leakage Current I

Output Short-Circuit Current

Output Open-Circuit Voltage

_IN_,

_OUTA_,

_OUTB_

ON

ΔR

ON

ΔR

ON

FLAT (ON

I

_ OU TA _ ( OF F)

I

_ OU TB _ ( OF F)

_IN_ (ON

VCC = +3.0V, I

_OUTB_

= 0V, 1.2V

V

VCC = +3.0V, I
V

= 0V (Notes 4, 5)

_OUTB_

VCC = +3.0V, I
V

= 0V (Notes 4, 5)

_OUTB_

VCC = +3.0V, I
V

,

VCC = +3.6V , V
or V

= 0V, 1.2V (Notes 5, 6)

_OUTB_

_OUTB_

VCC = +3.6V , V
or V

_OUTB_

= 15mA, V

_IN_

= 15mA, V

_IN_

= 15mA, V

_IN_

= 15mA, V

_IN_

= 0V, 1.2V, V

_IN_

= 1.2V, 0V (MAX4889B)

= 0V, 1.2V, V

_IN_

= V

or unconnected

_IN_

(MAX4889B)

All other ports are unconnected
(MAX4889C)

All other ports are unconnected
(MAX4889C)

_OUTA_

_OUTA_

_OUTA_

_OUTA_

_OUTA_

_OUTA_

V

-

-0.3

,

,

,

,

6.4 8.4 Ω

0.1 0.5 Ω

0.2 Ω

0.3 Ω

CC

1.8

V

-1 +1 µA

-1 +1 µA

515µA

0.2 0.6 0.9 V

FREQUENCY RANGE

(GHz)

MAXIMUM INSERTION

LOSS (dB)

0–2.5

2.5–5

5 or greater

MAX4889B/MAX4889C

2.5/5.0Gbps PCIe Passive Switches

_______________________________________________________________________________________ 3

Note 3: All units are 100% production tested at TA= +85°C. Limits over the operating temperature range are guaranteed by design

and characterization and are not production tested.

Note 4: ΔR

ON

= R

ON (MAX)

- R

ON (MIN)

.

Note 5: Guaranteed by design, not production tested.
Note 6: Flatness is defined as the difference between the maximum and minimum value of on-resistance as measured over the specified

analog signal range.

ELECTRICAL CHARACTERISTICS (continued)

(VCC= +3.3V ±10%, TA=T

MIN

to T

MAX,

unless otherwise noted. Typical values are at VCC= +3.3V, TA= +25°C, unless otherwise

noted.) (Note 3)

Table 1. Insertion Loss Mask

1

5

f + 0.6

GHz

4

2

×

5

f - 1.0

GHz

6

×

5

f - 3.0

GHz

8

×

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

AC PERFORMANCE

SEL-to-Switch Turn-On Time t

SEL-to-Switch Turn-Off Time t

Propagation Delay t

Output Skew Between Pairs t

Output Skew Between Same Pair t

Differential Return Loss (Note 5) S

Differential Insertion Loss (Note 5) S

Differential Crosstalk (Note 5) S

Differential Off-Isolation (Note 5) S

CONTROL INPUT (SEL)

Input Logic High V

Input Logic Low V

Input Logic Hysteresis V

POWER SUPPLY

Power-Supply Range V

VCC Supply Current I

ON_SEL

OFF_SEL

PD

SKEW1

SKEW2

ZS = ZL = 50Ω 80 ns

ZS = ZL = 50Ω, Figure 1 15 ns

ZS = ZL = 50Ω, Figure 2 50 ps

ZS = ZL = 50Ω, Figure2 50 ps

ZS = ZL = 50Ω, Figure 2 10 ps

0Hz < f ≤ 2.8GHz -14

DD11

2.8GHz < f ≤ 5.0GHz -8

f > 5.0GHz -3

DD21

See Table 1 dB

0Hz < f ≤ 2.5GHz -40

DDCTK

2.5GHz < f ≤ 5.0GHz -30

f > 5.0GHz -25

0Hz < f ≤ 2.5GHz -15

DD21_OFF

2.5GHz < f ≤ 5.0GHz -12

f > 5.0GHz -12

IH

IL

HYST

CC

V

CC

SEL

= 0 or V

CC

dB

dB

dB

1.4 V

0.6 V

130 mV

3.0 3.6 V

1mA

MAX4889B/MAX4889C

2.5/5.0Gbps PCIe Passive Switches

4 _______________________________________________________________________________________

Test Circuits/Timing Diagrams

LOAD

SOURCE

V

OUT

Z

L

MAX4889B/

MAX4889C

SEL

Z

S

Σ

10%

90%

50%

50%

t

ON_SEL

t

OFF_SEL

V

OUT

SEL

THE FREQUENCY OF THE SIGNAL SHOULD BE ABOVE THE HIGHPASS FILTER CORNER OF THE COUPLING CAPACITORS.

Figure 1. Switching Time