Rainbow Electronics MAX3942 User Manual

General Description

The MAX3942 is designed to drive high-speed optical modulators at data rates up to 10.7Gbps. It functions as a modulation circuit, with an integrated control op amp externally programmed by a DC voltage.

A high-bandwidth, fully differential signal path is internally implemented to minimize jitter accumulation. When a clock signal is available, the integrated data-retiming function can be selected to reject input-signal jitter.

The MAX3942 receives differential CML signals (groundreferenced) with on-chip line terminations of 50Ω. Each of the differential outputs has an on-chip 50Ω resistor for back termination. The driver is able to deliver a modulation current of 40mA

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to 120mA

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, with an edge speed of 23ps (typical 20% to 80%). This modulation current reflects a modulation voltage of 1.0V

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to 3.0V

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single ended or 2.0V

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to 6.0V

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differential.

The MAX3942 also includes an adjustable pulse-width control circuit to precompensate for asymmetrical modulator characteristics. It is available in a compact 4mm

✕ 4mm, 24-pin thin QFN package and operates over

the -40°C to +85°C temperature range.

Features

♦ 23ps Edge Speed

♦ Single-Ended Modulation Voltage Up to 3V

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♦ Differential Modulation Voltage Up to 6V

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♦ Selectable Data-Retiming Latch

♦ Up to 10.7Gbps Operation

♦ 50Ω On-Chip Input and Output Terminations

♦ Pulse-Width Adjustment

♦ Enable and Polarity Controls

♦ ESD Protection

Applications

Mach Zehnder Modulators

Packaged Direct-Modulated Lasers

SONET OC-192 and SDH STM-64 Transmission Systems

DWDM Systems

Long/Short-Reach Optical Transmitters

10Gbps Ethernet

MAX3942

10Gbps Modulator Driver

________________________________________________________________ Maxim Integrated Products 1

Typical Application Circuit

19-2934; Rev 0; 7/03

For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.

Ordering Information

Pin Configuration appears at end of data sheet.

PART TEMP RANGE PIN-PACKAGE

MAX3942ETG -40°C to +85°C 24 Thin QFN (4mm

✕ 4mm)

1000pF

50Ω

0.01µF

0.1µF

50Ω

MACH ZEHNDER

MODULATOR

50Ω

-5.2V

MODEN

MAX3942

MODSET

RTEN

MODSET

OUT-

OUT+

-5.2V

0.01µF

DATA+ DATA+

MAX3952

10Gbps

SERIALIZER

0.01µF

DATA- DATA-

0.01µF

CLK+ CLK+

0.01µF

CLK- CLK-

PLRT GND

50Ω

PWC+ PWC- V

2kΩ

-5.2V

L1 AND L2 ARE HIGH-FREQUENCY FERRITE BEADS

REPRESENTS A CONTROLLED-IMPEDANCE TRANSMISSION LINE.

MAX3942

10Gbps Modulator Driver

2 _______________________________________________________________________________________

ABSOLUTE MAXIMUM RATINGS

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

Supply Voltage V

..............................................-6.0V to +0.5V

Voltage at MODEN,

RTEN, PLRT, MODSET............................(V

- 0.5V) to +0.5V Voltage at DATA+, DATA-, CLK+, and CLK-……-1.65V to +0.5V

Voltage at OUT+, OUT- ................................……….-4V to +0.5V

Voltage at PWC+, PWC- ...................(V

- 0.5V) to (VEE+ 1.7V)

Continuous Power Dissipation (T

= +85°C)

24-Pin Thin QFN (derate 20.8mW/° above +85°C) ....1354mW

Current into or out of OUT+, OUT-.................……………...80mA

Storage Temperature Range .....................……-55°C to +150°C

Operating Temperature Range ....................……-40°C to +85°C

Lead Temperature (soldering, 10s)............………………+300°C

ELECTRICAL CHARACTERISTICS

(VEE= -5.5V to -4.9V, TA= -40°C to +85°C. Typical values are at VEE= -5.2V, I

MOD

= 100mA, and TA= +25°C, unless otherwise noted.)

Power-Supply Voltage V

Supply Current I

Power-Supply Noise Rejection PSNR f ≤ 2MHz (Note 2); see Figure 3 15 dB

SIGNAL INPUT (Note 3)

Input Data Rates NRZ 10.7 Gbps

Single-Ended Input Resistance R

Single-Ended Input Voltage V

Differential Input Voltage V

Differential Input Return Loss RL

MODULATION (Note 5)

Maximum Modulation Current 112 120 mA

Minimum Modulation Current V

MODSET Voltage Range V

E q ui val ent M od ul ati on Resi stance R

Modulation Set Bandwidth Modulation depth 10%, 50Ω driver load 5 MHz

MODSET Input Resistance 20 kΩ

Modulation-Current Temperature Stability

Modulation-Current-Setting Error 50Ω driver load, TA = +25°C -10 +10 %

Output Resistance R

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

MODSET

MODEQV

OUT

Excluding I (Note 1)

Input to GND 42.5 50 58.5 Ω

DC-coupled, Figure 1a -1 0

AC-coupled, Figure 1b -0.4 +0.4

DC-coupled (Note 4) 0.2 2.0

AC-coupled (Note 4) 0.2 1.6

≤ 15GHz 15 dB

MODSET

(Note 7) 11.1 Ω

(Note 6) -980 0 ppm/°C

OUT+ and OUT- to GND 42.5 50 58.5 Ω

MOD

= V

-5.5 -4.9 V

Retime disabled 125 175

Retime enabled 140 200

37 40 mA

VEE + 1 V

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MAX3942

10Gbps Modulator Driver

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ELECTRICAL CHARACTERISTICS (continued)

(VEE= -5.5V to -4.9V, TA= -40°C to +85°C. Typical values are at VEE= -5.2V, I

MOD

= 100mA, and TA= +25°C, unless otherwise noted.)

Note 1: Supply current remains elevated once the retiming function has been enabled. Power must be cycled to reduce supply

current after the retiming function has been disabled.

Note 2: Power-supply noise rejection is specified as PSNR = 20Log(V

noise (on Vcc)

/ ∆V

OUT

). V

OUT

is the voltage across a 50Ω load.

noise (on Vcc)

= 100mV

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Note 3: For DATA+, DATA-, CLK+, and CLK-. Note 4: CLK input characterized at 10.7Gbps. Note 5: Minimum voltage on OUT+ and OUT- is V

+ 1.9V.

Note 6: Guaranteed by design and characterization using the circuit shown in Figure 3. Note 7: R

MODEQV

= (V

MODSET

- VEE) / (I

MOD

- 37mA).

Note 8: 50Ω load, characterized at 10.7Gbps with a 1111 1111 0000 0000 pattern. Note 9: Deterministic jitter is defined as the arithmetic sum of PWD (pulse-width distortion) and PDJ (pattern-dependent jitter).

Measured with a 10.7Gbps 2

- 1 PRBS pattern with 80 zeros and 80 ones inserted in the data pattern.

Note 10: For MODEN and PLRT.

Off Current

Differential Output Return Loss RL

Output Edge Speed 20% to 80% (Notes 6, 8) 23 32 ps

Setup/Hold Time tSU, t

Pulse-Width Adjustment Range (Notes 6, 8) ±30 ±50 ps

Pulse-Width Control Input Range (Single Ended)

Pulse-Width Control Input Range (Differential)

Output Overshoot δ (Notes 6, 8) 5 %

Driver Random Jitter RJ

Driver Deterministic Jitter DJ

CONTROL INPUTS

Input High Voltage V

Input Low Voltage V

Input Current (Note 10) -80 +200 µA

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

MODEN = V high, DATA- = low

OUTIMOD

= 50mA ≤ 10GHz 10 dB

Figure 2 (Note 6) 25 ps

For PWC+ and PWC-

(PWC+) - (PWC-) -0.5 +0.5 V

(Note 6) 0.3 0.8 ps

PWC- = GND (Notes 6, 9) 8 13 ps

(Note 10)

, MODSET = VEE, DATA+ =

1.6 mA

VEE +

0.5

2.0

VEE +

1.5

0.8

RMS

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