The MAX2051 high-linearity, up/downconversion mixer
provides +35dBm input IP3, 7.8dB noise figure (NF), and
7.4dB conversion loss for 850MHz to 1550MHz wireless
infrastructure and multicarrier cable head-end downstream video, video-on-demand (VOD), and cable
modem termination systems (CMTS) applications. The
MAX2051 also provides excellent suppression of spurious intermodulation products (> 77dBc at an RF level of
-14dBm), making it an ideal downconverter for DOCSIS
®
3.0 and Euro DOCSIS cable head-end systems. With an
LO circuit tuned to support frequencies ranging from
1200MHz to 2250MHz, the MAX2051 is ideal for highside LO injection applications over an IF frequency
range of 50MHz to 1000MHz.
In addition to offering excellent linearity and noise performance, the MAX2051 also yields a high level of component integration. The device integrates baluns in the
RF and LO ports, which allow for a single-ended RF
input and a single-ended LO input. The MAX2051
requires a typical LO drive of 0dBm and a supply current guaranteed to below 130mA.
The MAX2051 is available in a compact 5mm x 5mm,
20-pin thin QFN package with an exposed pad.
Electrical performance is guaranteed over the extended
temperature range, from TC= -40°C to +85°C.
Applications
Video-on-Demand and DOCSIS-Compatible
Edge QAM Modulation
Cable Modem Termination Systems
Microwave and Fixed Broadband Wireless
Access
Microwave Links
Military Systems
Predistortion Receivers
Private Mobile Radios
Integrated Digital Enhanced Network (iDEN)
Base Stations
WiMAX™ Base Stations and Customer Premise
Equipment
, VCC= +4.75V to +5.25V, no input AC signals. TC= -40°C to +85°C, unless otherwise noted. Typical val-
ues are at V
CC
= +5.0V, TC= +25°C, unless otherwise noted.)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
Note 1: Based on junction temperature TJ= TC+ (θJCx VCCx ICC). This formula can be used when the temperature of the exposed
pad is known while the device is soldered down to a PCB. See the
Applications Information
section for details. The junction
temperature must not exceed +150°C.
Note 2: Junction temperature T
J
= TA+ (θJAx VCCx ICC). This formula can be used when the ambient temperature of the PCB is
known. The junction temperature must not exceed +150°C.
Note 3: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-
layer board. For detailed information on package thermal considerations, refer to www.maxim-ic.com/thermal-tutorial
.
Note 4: T
C
is the temperature on the exposed pad of the package. TAis the ambient temperature of the device and PCB.
V
CC
to GND...........................................................-0.3V to +5.5V
RF, LO to GND.........................................................-0.3V to 0.3V
IF+, IF-, LOBIAS to GND ............................-0.3V to (V
CC
+ 0.3V)
RF, LO Input Power ........................................................+20dBm
RF, LO Current (RF and LO is DC shorted to GND
through balun).................................................................50mA
Continuous Power Dissipation (Note 1) ........................2100mW
Note 5:Operation outside this range is possible, but with degraded performance of some parameters. See the
Typical Operating
Characteristics
section.
Note 6:Not production tested.
Note 7:All values reflect losses of external components, including a 0.6dB loss at f
IF
= 350MHz and a 0.8dB loss at
f
IF
= 1000MHz due to the 1:1 transformer. Output measurements were taken at IF outputs of the
Typical Application Circuit
.
Note 8:Guaranteed by design and characterization.
Note 9:100% production tested for functionality.
Note 10: Additional improvements (of up to 4dB to 6dB) in spurious responses can be made by increasing the LO drive to +6dBm.
Note 11: The LO return loss can be improved by tuning C9 to offset any parasitics within the specific application circuit. Typical
range of C9 is 10pF to 50pF.
Conversion Power LossL
Third-Order Input Intercept
Point
LO-2IF Spurious Rejection61dBc
LO+2IF Spurious Rejection63.3dBc
LO-3IF Spurious Rejection78dBc
LO+3IF Spurious Rejection79dBc
LO Leakage at RF PortPLO = +3dBm-35.7dBm
IF Leakage at RF Port-52dBm
RF Return Loss12.3dB
IF Input Return LossfLO = 1200MHz18dB
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
7.5dB
C
IIP3f
= 350M H z, f
IF1
= 351M H z, P IF = 0d Bm /tone33.4dBm
IF2
MAX2051
SiGe, High-Linearity, 850MHz to 1550MHz
Up/Downconversion Mixer with LO Buffer
, Upconversion mode, VCC= +5.0V, PLO= 0dBm, PIF= 0dBm, fIF= 350MHz, LO is high-side injected,
T
C
=+25°C, unless otherwise noted.)
PINNAMEFUNCTION
1RF
2–5, 9, 10, 11,
13, 14
6, 8, 15V
7LOBIAS
12LO
16, 17IF+, IF-Differential IF Output
18, 19, 20GNDGround. Not internally connected. Ground these pins or leave unconnected.
—EP
IF PORT RETURN LOSS vs. IF FREQUENCY
0
10
20
30
IF PORT RETURN LOSS (dB)
40
50
(UPCONVERSION MODE)
fLO = 1500MHz
IF FREQUENCY (MHz)
fLO = 1200MHz
fLO = 1900MHz
32023014050410500
MAX2051 toc62
LO RETURN LOSS vs. LO FREQUENCY
0
5
10
LO RETURN LOSS (dB)
15
20
(UPCONVERSION MODE)
PLO = -3dBm
1100 12502000
LO FREQUENCY (MHz)
PLO = 0dBm
PLO = +3dBm
1850170015501400
Single-Ended 50Ω RF Input. Internally matched and DC shorted to GND through a balun. Requires
an input DC-blocking capacitor.
GND
CC
Ground. Internally connected to the exposed pad. Connect all ground pins and the exposed pad
(EP) together.
Power Supply. Bypass to GND with capacitors as close as possible to the pin (see the TypicalApplication Circuit).
LO Amplifier Bias Control. Output bias resistor for the LO buffer. Connect a 61.9Ω ±1% resistor
from LOBIAS to V
to set the bias current for the main LO amplifier.
CC
Local Oscillator Input. This input is internally matched to 50Ω. Requires an input DC-blocking
capacitor.
Exposed Pad. Internally connected to GND. Solder this exposed pad to a PCB pad that uses
multiple ground vias to provide heat transfer out of the device into the PCB ground planes. These
multiple ground vias are also required to achieve the noted RF performance.
MAX2051 toc63
MAX2051
SiGe, High-Linearity, 850MHz to 1550MHz
Up/Downconversion Mixer with LO Buffer
The MAX2051 high-linearity up/downconversion mixer
provides +35dBm of IIP3, with a typical 7.8dB noise figure (NF) and 7.4dB conversion loss. The integrated
baluns and matching circuitry allow for 50Ω singleended interfaces to the RF and the LO ports. The integrated LO buffer provides a high drive level to the mixer
core, reducing the LO drive required at the MAX2051’s
input to a -3dBm to +3dBm range. The IF port incorporates a differential output, which is ideal for providing
enhanced 2RF-LO and 2LO-2RF performance. 2RF-LO
rejection is typically 88dB and 2LO-2RF rejection is typically 79dB at an RF drive level of -14dBm.
Specifications are guaranteed over broad frequency
ranges to allow for use in VOD, DOCSIS-compatible
Edge QAM modulation, and CMTS. The MAX2051 is
specified to operate over an RF input range of 850MHz
to 1550MHz, an LO range of 1200MHz to 2250MHz,
and an IF range of 50MHz to 1000MHz.
RF Port and Balun
The MAX2051 RF input provides a 50Ω match when combined with a series 47pF DC-blocking capacitor. This DCblocking capacitor is required because the input is
internally DC shorted to ground through the on-chip
balun. The RF port input return loss is typically 12dB over
the RF frequency range of 1000MHz to 1250MHz.
LO Inputs, Buffer, and Balun
The MAX2051 is optimized for high-side LO injection
applications with a 1200MHz to 2550MHz LO frequency
range. The LO input is internally matched to 50Ω,
requiring only a 47pF DC-blocking capacitor. A twostage internal LO buffer allows for a -3dBm to +3dBm
LO input power range. The on-chip low-loss balun,
along with an LO buffer, drives the double-balanced
mixer. All interfacing and matching components from
the LO inputs to the IF outputs are integrated on-chip.
High-Linearity Mixer
The core of the MAX2051 is a double-balanced, highperformance passive mixer. Exceptional linearity is provided by the large LO swing from the on-chip LO
buffer. IIP3, 2RF-LO rejection, and noise figure performance are typically +35dBm, 88dBc, and 7.8dB,
respectively.
Differential IF Output
The MAX2051 has an IF frequency range of 50MHz to
1000MHz. The device’s differential ports are ideal for
providing enhanced 2RF-LO performance. Singleended IF applications require a 1:1 (impedance ratio)
balun to transform the 50Ω differential IF impedance to
a 50Ω single-ended system.
Applications Information
Input and Output Matching
The RF and LO ports are designed to operate in a 50Ω
system. Use DC blocks at RF and LO inputs to isolate
the ports from external DC while providing some reactive tuning. The IF output impedance is 50Ω (differen-
tial). For evaluation, an external low-loss 1:1 balun
transforms this impedance to a 50Ω single-ended output (see the
Typical Application Circuit
).
Externally Adjustable Bias
Bias currents for the LO buffer is optimized by fine-tuning resistor R1. The value for R1, as listed in Table 1,
represents the nominal value, which yields the optimal
linearity/performance trade off. Use larger value resistors (up to 125Ω) to reduce power dissipation at the
expense of some performance loss. Use smaller value
resistors (down to 0Ω) to increase the linearity of the
device at the expense of more power. Contact the factory for details concerning recommended power reduction vs. performance trade-offs. If ±1% resistors are not
readily available, ±5% resistors can be substituted.
Table 1. Component Values
DESIGNATIONQTYDESCRIPTIONSUPPLIER
C1, C9247pF microwave capacitors (0402)Murata Electronics North America, Inc.
C211.3pF microwave capacitor (0402)Murata Electronics North America, Inc.
C3, C42150pF microwave capacitors (0402)Murata Electronics North America, Inc.
C5, C7, C103100pF microwave capacitors (0402)Murata Electronics North America, Inc.
C6, C8, C1130.01µF microwave capacitors (0402)Murata Electronics North America, Inc.
R1161.9Ω ±1% resistor (0402)Digi-Key Corp.
T111:1 transformer (50:50) MABACT0060M/A-Com, Inc.
U11MAX2051 IC (20 TQFN-EP)Maxim Integrated Products, Inc.
MAX2051
IIP3 and Spurious Optimization by
External IF Tuning
IIP3 linearity and spurious performance can be further
optimized by modifying the capacitive loading on the IF
ports. The default component value of 1.3pF for C2 (listed in Table 1) was chosen to provide the best overall
IIP3 linearity response over the entire 50MHz to
1000MHz band. Alternative capacitor values can be
chosen to improve the device’s 2RF-LO, 2LO-2RF, and
3LO-3RF spurious responses at the expense of overall
IIP3 performance. See the relevant curves in the
Typical Operating Characteristics
section to evaluate
the IIP3 vs. spurious performance trade-offs.
Spurious Optimization by
Increased LO Drive Levels
The MAX2051’s 2RF-LO, 2LO-2RF, and 3LO-3RF spurious performance can also be improved by increasing
the LO drive level to the device. The
Typical Application
Circuit
calls for a nominal LO drive level of 0dBm.
However, enhancements in the device’s spurious performance are possible with increased drive levels
extending up to +9dBm. See the relevant curves in the
Typical Operating Characteristics
section to evaluate
the spurious performance vs. LO drive level trade-offs.
Layout Considerations
A properly designed PCB is an essential part of any
RF/microwave circuit. Keep RF signal lines as short as
possible to reduce losses, radiation, and inductance.
The load impedance presented to the mixer must be
such that any capacitance from both IF- and IF+ to
ground is minimized. For the best performance, route
the ground pin traces directly to the exposed pad
under the package. The PCB exposed pad MUST be
connected to the ground plane of the PCB. It is suggested that multiple vias be used to connect this pad to
the lower level ground planes. This method provides a
good RF/thermal-conduction path for the device. Solder
the exposed pad on the bottom of the device package
to the PCB. The MAX2051 evaluation kit can be used as
a reference for board layout. Gerber files are available
upon request at www.maxim-ic.com.
Power-Supply Bypassing
Proper voltage supply bypassing is essential for highfrequency circuit stability. Bypass each VCCpin with
the capacitors shown in the
Typical Application Circuit
and see Table 1 for descriptions.
Exposed Pad RF/Thermal Considerations
The exposed pad (EP) of the MAX2051’s 20-pin thin
QFN package provides a low thermal-resistance path
to the die. It is important that the PCB on which the
MAX2051 is mounted be designed to conduct heat
from the EP. In addition, provide the EP with a lowinductance path to electrical ground. The EP MUST be
soldered to a ground plane on the PCB, either directly
or through an array of plated via holes.
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
16
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