Rainbow Electronics MAX1844 User Manual

General Description

The MAX1844 pulse-width modulation (PWM) controller
provides high efficiency, excellent transient response,
and high DC output accuracy needed for stepping
down high-voltage batteries to generate low-voltage
CPU core or chipset/RAM supplies in notebook com­puters.

Maxim’s proprietary Quick-PWM™ quick-response,
constant-on-time PWM control scheme handles wide
input/output voltage ratios with ease and provides
100ns “instant-on” response to load transients while
maintaining a relatively constant switching frequency.
Efficiency is enhanced by an ability to drive very large
synchronous-rectifier MOSFETs. Accurate current sens­ing to ensure reliable overload protection is available
using an external current-sense resistor in series with
the synchronous rectifier. Alternatively, the synchronous
rectifier itself can be used for less accurate current
sensing at the lowest possible power dissipation.

Single-stage buck conversion allows the MAX1844 to
directly step down high-voltage batteries for the highest
possible efficiency. Alternatively, two-stage conversion
(stepping down the 5V system supply instead of the
battery) at a higher switching frequency allows the mini­mum possible physical size.

The MAX1844 is intended for CPU core, chipset,
DRAM, or other low-voltage supplies as low as 1V. It is
available in 20-pin QSOP, and QFN packages and
includes both adjustable overvoltage and undervoltage
protection.

For a dual step-down PWM controller with accurate cur­rent limit, refer to the MAX1845. The MAX1714/ MAX1715
single/dual PWM controllers are similar to the MAX1844/
MAX1845 but do not use current-sense resistors.

Applications

Notebook Computers
CPU Core Supplies
Chipset/RAM Supplies as Low as 1V

1.8V and 2.5V Supplies

Features

♦ Ultra-High Efficiency
♦ Accurate Current-Limit Option
♦ Quick-PWM with 100ns Load-Step Response
♦ 1% V

OUT

Accuracy Over Line and Load

♦ 1.8V/2.5V Fixed or 1V to 5.5V Adjustable Output

Range

♦ 2V to 28V Battery Input Range
♦ 200/300/450/600kHz Switching Frequency
♦ Adjustable Overvoltage Protection
♦ Adjustable Undervoltage Protection
♦ 1.7ms Digital Soft-Start
♦ Drives Large Synchronous-Rectifier FETs
♦ 2V ±1% Reference Output
♦ Power-Good Window Comparator

MAX1844

High-Speed Step-Down Controller with

Accurate Current Limit for Notebook Computers

________________________________________________________________ Maxim Integrated Products 1

19-1993; Rev 1; 3/02

EVALUATION KIT

AVAILABLE

Pin Configuration appears at end of data sheet.

Quick-PWM is a trademark of Maxim Integrated Products.

V

CC

5V INPUT

BATTERY

4.5V TO 28V

OUTPUT

2.5V

SHDN

ILIM

DL

LX

V+

BST

DH

CS

OUT

SKIP

V

DD

MAX1844

UVP

REF

PGOOD
LATCH

OVP
FB

GND

Minimal Operating Circuit

For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.

Ordering Information

PART TEMP RANGE PIN-PACKAGE

MAX1844EEP -40°C to +85°C 20 QSOP

MAX1844EGP -40°C to +85°C 20 QFN

MAX1844

High-Speed Step-Down Controller with
Accurate Current Limit for Notebook Computers

2 _______________________________________________________________________________________

ABSOLUTE MAXIMUM RATINGS

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.

V+ to GND..............................................................-0.3V to +28V

V

CC

, VDDto GND.....................................................-0.3V to +6V

OUT, PGOOD,

SHDN to GND..................................-0.3V to +6V

FB, ILIM, LATCH, OVP, REF, SKIP,

TON, UVP to GND..................................-0.3V to (V

CC

+ 0.3V)

BST to GND............................................................-0.3V to +34V

CS to GND.................................................................-6V to +30V

DL to GND..................................................-0.3V to (V

DD

+ 0.3V)

DH to LX.....................................................-0.3V to (BST + 0.3V)

LX to BST..................................................................-6V to +0.3V

REF Short Circuit to GND...........................................Continuous

Continuous Power Dissipation (T

A

= +70°C)

20-Pin QSOP (derate 9.1mW/°C above +70°C)...........727mW

20-Pin 5mm

✕

5mm QFN (derate 20.0mW/°C

above +70°C).................................................................1.60W

Operating Temperature Range ...........................-40°C to +85°C

Junction Temperature......................................................+150°C

Storage Temperature Range.............................-65°C to +150°C

Lead Temperature (soldering, 10s).................................+300°C

ELECTRICAL CHARACTERISTICS

(Circuit of Figure 1, V+ = 15V, VCC= VDD= 5V, SKIP = GND, TA= 0°C to +85°C, unless otherwise noted. Typical values are at
T

A

= +25°C.)

PARAMETER

CONDITIONS

MIN

TYP MAX

UNITS

Battery voltage, V+

2

28

Input Voltage Range

VCC , V

DD

4.5

5.5

V

0.99

1.01

2.5

Error Comparator Threshold
(DC Output Voltage Accuracy)
(Note 1)

V+ = 4.5V to 28V,
SKIP = V

CC

FB = V

CC

1.8

V

Load Regulation Error

I

LOAD

= 0 to 3A, SKIP = V

CC

9

mV

Line Regulation Error

VCC = 4.5V to 5.5V, V+ = 4.5V to 28V

5

mV

FB Input Bias Current

-0.1

+0.1

µA

Output Adjustment Range

1

5.5

V

FB = GND

90

190

350

OUT Input Resistance

FB = VCC or adjustable feedback mode

70

145

270

kΩ

Soft-Start Ramp Time

Rising edge of SHDN to full current limit

1.7

ms

TON = GND (600kHz)

140

160

180

TON = REF (450kHz)

175

200

225

TON = unconnected (300kHz)

260

290

320

On-Time

V+ = 24V,
V

OUT

= 2V

(Note 2)

TON = VCC (200kHz)

380

425

470

ns

Minimum Off-Time

(Note 2)

400

500

ns

Quiescent Supply Current (VCC) FB forced above the regulation point

550

800

µA

Quiescent Supply Current (VDD) FB forced above the regulation point

<1

5

µA

Quiescent Supply Current (V+)

25

40

µA

Shutdown Supply Current (VCC) SHDN = GND

<1

5

µA

Shutdown Supply Current (VDD) SHDN = GND

<1

5

µA

Shutdown Supply Current (V+)

SHDN = GND, V+ = 28V, VCC = VDD = 0 or 5V

<1

5

µA

Reference Voltage

VCC = 4.5V to 5.5V, no external REF load

1.98

2.02

V

Reference Load Regulation

I

REF

= 0 to 50µA

0.01

V

FB = OUT
FB = GND 2.475

1.782

2.525

1.818

2.00

MAX1844

High-Speed Step-Down Controller with

Accurate Current Limit for Notebook Computers

_______________________________________________________________________________________ 3

ELECTRICAL CHARACTERISTICS (continued)

(Circuit of Figure 1, V+ = 15V, VCC= VDD= 5V, SKIP = GND, TA= 0°C to +85°C, unless otherwise noted. Typical values are at
T

A

= +25°C.)

PARAMETER

CONDITIONS

MIN

UNITS

REF Sink Current

REF in regulation

10

µA

REF Fault Lockout Voltage

Falling edge, hysteresis = 40mV

1.6

V

Overvoltage Trip Threshold
(Fixed-Threshold Mode)

With respect to error comparator threshold, no load
OVP = GND, rising edge, hysteresis = 1%

12

17

%

External feedback, measured at FB with respect to
V

OVP

, 1V < V

OVP

< 1.8V, rising edge, hysteresis =1%

-30

+30

mV

Overvoltage Comparator Offset
(Adjustable-Threshold Mode)

Internal feedback, measured at OUT with respect to the
nominal OUT regulation voltage, 1V < V

OVP

< 1.8V,

rising edge, hysteresis = 1%

-3.5

+3.5

%

OVP Input Leakage Current

1V < V

OVP

< 1.8V

-100

0

nA

Overvoltage Fault
Propagation Delay

FB forced 2% above trip threshold

1.5

µs

Output Undervoltage Protection
Trip Threshold (Fixed-Threshold
Mode)

65

70

75

%

External feedback, measured at FB with respect to
V

UVP

, 0.4V < V

UVP

< 1V

-40

+40

mV

Output Undervoltage Protection
Trip Threshold (Adjustable­Threshold Mode)

Internal feedback, measured at OUT with respect to the
nominal OUT regulation voltage, 0.4V < V

UVP

< 1V

-5

+5

%

UVP Input Leakage Current

0.4V < V

UVP

< 1V

-100

<1

nA

Output Undervoltage Protection
Blanking Time

From rising edge of SHDN

10

30

ms

PGOOD Trip Threshold (Lower)

With respect to error comparator threshold, no load

-12.5

-10

-8

%

PGOOD Trip Threshold (Upper)

With respect to error comparator threshold, no load

8

10

12.5

%

PGOOD Propagation Delay

FB forced 2% beyond PGOOD trip threshold, falling

10

µs

PGOOD Output Low Voltage

I

SINK

= 1mA

0.4

V

PGOOD Leakage Current

High state, forced to 5.5V

1

µA

ILIM Adjustment Range

0.25

3

V

Current-Limit Threshold (Fixed) GND - VCS, ILIM = V

CC

90

100

110

mV

V

ILIM

= 0.5V

40

50

60

Current-Limit Threshold
(Adjustable)

GND - V

CS

V

ILIM

= 2V

170

200

230

mV

Current-Limit Threshold
(Negative Direction)

GND - VCS, SKIP = VCC, ILIM = VCC ,TA = +25°C

-140

-95

mV

Current-Limit Threshold
(Zero Crossing)

GND - V

CS,

SKIP = GND

3

mV

Thermal Shutdown Threshold

Hysteresis = 10°C

150

°C

VCC Undervoltage
Lockout Threshold

Rising edge, hysteresis = 20mV,
PWM disabled below this level

4.1

4.4

V

With respect to error comparator threshold, UVP = V

CC

TYP

14.5

MAX

+100

+100

-117

MAX1844

High-Speed Step-Down Controller with
Accurate Current Limit for Notebook Computers

4 _______________________________________________________________________________________

ELECTRICAL CHARACTERISTICS (continued)

(Circuit of Figure 1, V+ = 15V, VCC= VDD= 5V, SKIP = GND, TA= 0°C to +85°C, unless otherwise noted. Typical values are at
T

A

= +25°C.)

PARAMETER

CONDITIONS

MIN

TYP MAX

UNITS

MAX1844EEP

1.5

5

DH Gate-Driver On-Resistance
(Note 4)

BST - LX forced to 5V

MAX1844EGP

1.5

6

Ω

DL, high state

1.5

5

DL Gate-Driver On-Resistance
(Note 4)

DL, low state

0.5

1.7

Ω

DH Gate-Driver
Source/Sink Current

DH forced to 2.5V, BST-LX forced to 5V

1

A

DL Gate-Driver Source Current DL forced to 2.5V

1

A

DL Gate-Driver Sink Current

DL forced to 5V

3

A

DL rising

35

Dead Time

DH rising

26

ns

Logic Input High Voltage

LATCH, SHDN, SKIP

2.4

V

Logic Input Low Voltage

LATCH, SHDN, SKIP

0.8

V

Logic Input Current

LATCH, SHDN, SKIP

-1

+1

µA

Dual Mode Threshold, Low

OVP, UVP, FB

0.15

0.25

V

OVP, UVP

Dual Mode Threshold, High

FB

1.9

2.0

2.1

V

TON VCC Level

V

TON Float Voltage

3.15

3.85

V

TON Reference Level

1.65

2.35

V

TON GND Level

0.5

V

TON Input Current

Forced to GND or V

CC

-3

+3

µA

ILIM Input Leakage Current

-100

0

nA

ELECTRICAL CHARACTERISTICS

(Circuit of Figure 1, V+ = 15V, VCC= VDD= 5V, SKIP = GND, TA= -40°C to +85°C, unless otherwise noted.) (Note 3)

0.20

VCC - 1.5

VCC - 0.4

PARAMETER CONDITIONS MIN TYP MAX UNITS

Input Voltage Range

Error Comparator Threshold
(DC Output Voltage Accuracy)
(Note 1)

On-Time

Battery voltage, V+ 2 28
V

V+ = 4.5V to 28V,
SKIP = V

V+ = 24V,
V
(Note 2)

, V

CC

DD

= 2V

OUT

CC

VCC - 0.4

+100

FB = OUT 0.985 1.015
FB = GND 2.462 2.538

FB = V

CC

TON = GND (600kHz) 140 180
TON = REF(450kHz) 175 225
TON = Unconnected (300kHz) 260 320
TON = V

(200kHz) 380 470

CC

4.5 5.5

1.773 1.827

V

V

ns

MAX1844

High-Speed Step-Down Controller with

Accurate Current Limit for Notebook Computers

_______________________________________________________________________________________ 5

PARAMETER CONDITIONS

UNITS

Minimum Off-Time (Note 2) 500 ns

Quiescent Supply Current (V

CC

)

FB forced above the regulation point 800 µA

Quiescent Supply Current (V

DD

)

FB forced above the regulation point 5 µA
Quiescent Supply Current (V+) Measured at V+ 40 µA
Shutdown Supply Current (V

CC

) SHDN = GND 5 µA

Shutdown Supply Current (V

DD

) SHDN = GND 5 µA

Shutdown Supply Current (V+) SHDN = GND, V+ = 28V, V

CC

= VDD = 0 or 5V 5 µA

Reference Voltage V

CC

= 4.5V to 5.5V, no external REF load

V

Overvoltage Trip Threshold
(Fixed-Threshold Mode)

With respect to error comparator threshold, no load

OVP = GND, rising edge, hysteresis = 1%

12 17 %

External feedback, measured at FB with respect to

V

OVP

, 1V < V

OVP

1.8V, rising edge, hysteresis = 1%

-30

mV

Overvoltage Comparator Offset
(Adjustable-Threshold Mode)

Internal feedback, measured at OUT with respect to the

nominal OUT regulation voltage, 1V < V

OVP

< 1.8V

%

PGOOD Trip Threshold (Lower)

With respect to error comparator threshold, no load

OUT falling edge, hysteresis = 1%

%

PGOOD Trip Threshold (Upper)

With respect to error comparator threshold, no load

OUT rising edge, hysteresis = 1%

7.5

%

PGOOD Output Low Voltage I

SINK

= 1mA 0.4 V

PGOOD Leakage Current High state, forced to 5.5V 1 µA
Current-Limit Threshold (Fixed) GND - V

CS

, ILIM = V

CC

85 115 mV

GND - V

CS

, V

ILIM

= 0.5V 35 65

Current-Limit Threshold

(Adjustable)

GND - V

CS

, V

ILIM

= 2V 160 240

mV

V

CC

Undervoltage

Lockout Threshold

Rising edge, hysteresis = 20mV,

PWM disabled below this level

4.1 4.4 V

Logic Input High Voltage LATCH, SHDN, SKIP 2.4 V
Logic Input Low Voltage LATCH, SHDN, SKIP 0.8 V
Logic Input Current LATCH, SHDN, SKIP -1 1 µA

ELECTRICAL CHARACTERISTICS (continued)

(Circuit of Figure 1, V+ = 15V, VCC= VDD= 5V, SKIP = GND, TA= -40°C to +85°C, unless otherwise noted.) (Note 3)

Note 1: When the inductor is in continuous conduction, the output voltage will have a DC regulation level higher than the error com-

parator threshold by 50% of the ripple. In discontinuous conduction (SKIP = GND, light load), the output voltage will have a
DC regulation level higher than the trip level by approximately 1.5% due to slope compensation.

Note 2: On-time and off-time specifications are measured from 50% point to 50% point at the DH pin with LX = GND, V

BST

= 5V,

and a 250pF capacitor connected from DH to LX. Actual in-circuit times may differ due to MOSFET switching speeds.

Note 3: Specifications to -40°C are guaranteed by design, not production tested.
Note 4: Production testing limitations due to package handling require relaxed maximum on-resistance specifications for the QFN

package. The MAX1844EEP and MAX1844EGP contain the same die and the QFN package imposes no additional resis­tance in-circuit.

MIN TYP MAX

1.98

-3.5

-12.5

2.02

+30

+3.5

-7.5

12.5

MAX1844

High-Speed Step-Down Controller with
Accurate Current Limit for Notebook Computers

6 _______________________________________________________________________________________

100

60

0.01 1 10

EFFICIENCY vs. LOAD CURRENT

70
65

75

80

85

90

95

MAX1844 toc01

LOAD CURRENT (A)

EFFICIENCY (%)

0.1

VIN = 7V

VIN = 12V

VIN = 20V

350

0

0.01 1 10

FREQUENCY vs. LOAD CURRENT

100

50

150

200

250

300

MAX1844 toc02

LOAD CURRENT (A)

FREQUENCY (kHz)

0.1

VIN = 15V, SKIP = V

CC

VIN = 15V, SKIP = GND

VIN = 7V, SKIP = GND

VIN = 7V, SKIP = V

CC

320

310

300

290

280

0155 10 202530

FREQUENCY vs. INPUT VOLTAGE

MAX1844 toc03

INPUT VOLTAGE (V)

FREQUENCY (kHz)

I

LOAD

= 1A

290

300

310

320

330

-40 -10 20 50-25 5 35 65 80

FREQUENCY vs. TEMPERATURE

MAX1844 toc04

TEMPERATURE (°C)

FREQUENCY (kHz)

I

LOAD

= 1A

I

LOAD

= 4A

-40 5 20-25 -10 35 50 65 80

CURRENT LIMIT vs. TEMPERATURE

MAX1844 toc07

TEMPERATURE (°C)

CURRENT LIMIT (A)

3

4

5

6

0

100

200

300

400

500

600

700

800

0105 15202530

CONTINUOUS-TO-DISCONTINUOUS INDUCTOR

CURRENT vs. INPUT VOLTAGE

MAX1844 toc05

INPUT VOLTAGE (V)

LOAD CURRENT (mA)

CONTINUOUS INDUCTOR CURRENT

DISCONTINUOUS INDUCTOR CURRENT

0

1

2

3

4

5

6

7

8

0105 15202530

CURRENT LIMIT vs. INPUT VOLTAGE

MAX1844 toc06

INPUT VOLTAGE (V)

CURRENT LIMIT (A)

1.8

1.6

1.4

1.2

1.0

1.0 1.41.2 1.6 1.8

NORMALIZED OVERVOLTAGE

TRIP THRESHOLD vs. V

OVP

MAX1844 toc08

V

OVP

(V)

NORMALIZED THRESHOLD (V/V)

OVERVOLTAGE TRIP THRESHOLD

OUTPUT VOLTAGE SET POINT

110

112

116

114

118

120

-40 10-15 35 60 85

OVERVOLTAGE TRIP THRESHOLD

vs. TEMPERATURE

MAX1844 toc09

TEMPERATURE (°C)

OVERVOLTAGE TRIP THRESHOLD (%)

__________________________________________Typical Operating Characteristics

(Circuit of Figure 1, VIN= 15V, SKIP = GND, TON = unconnected, TA= +25°C, unless otherwise noted.)

MAX1844

High-Speed Step-Down Controller with

Accurate Current Limit for Notebook Computers

_______________________________________________________________________________________ 7

0

2

6

4

8

10

0105 15202530

NO-LOAD SUPPLY CURRENT

vs. INPUT VOLTAGE (PWM MODE)

MAX1844 toc10

INPUT VOLTAGE (V)

SUPPLY CURRENT (mA)

I

IN

I

DD

I

CC

0.8

0.6

0.4

0.2

0

015510 202530

NO-LOAD SUPPLY CURRENT

vs. INPUT VOLTAGE (SKIP MODE)

MAX1844 toc11

INPUT VOLTAGE (V)

SUPPLY CURRENT (mA)

I

CC

I

IN

I

DD

20µs/div

LOAD-TRANSIENT RESPONSE

(PWM MODE)

INDUCTOR
CURRENT
2A/div

V

OUT

AC COUPLED
100mV/div

DL
5V/div

MAX1844 toc12A

20µs/div

LOAD-TRANSIENT RESPONSE

(SKIP MODE)

INDUCTOR
CURRENT
2A/div

V

OUT

AC COUPLED
100mV/div

DL
5V/div

MAX1844 toc12B

500µs/div

STARTUP WAVEFORM

INDUCTOR
CURRENT
5A/div

V

OUT

1V/div

MAX1844 toc14

SHDN
5V/div

DL
5V/div

40µs/div

OUTPUT OVERLOAD WAVEFORM

(UVP = GND)

V

OUT

1V/div

DL
5V/div

INDUCTOR
CURRENT
5A/div

MAX1844 toc13A

R

LOAD

= 112m

Ω

40µs/div

OUTPUT OVERLOAD WAVEFORM

(UVP = V

CC

, OVP = GND)

V

OUT

1V/div

DL
5V/div

INDUCTOR
CURRENT
5A/div

MAX1844 toc13B

R

LOAD

= 112m

Ω

100µs/div

SHUTDOWN WAVEFORM

(OVP = GND)

V

OUT

1V/div

DL
5V/div

INDUCTOR
CURRENT
5A/div

MAX1844 toc15A

R

LOAD

= 1Ω

100µs/div

SHUTDOWN WAVEFORM

(OVP = V

CC

)

V

OUT

1V/div

DL
5V/div

INDUCTOR
CURRENT
5A/div

MAX1844 toc15B

R

LOAD

= 1Ω

Typical Operating Characteristics (continued)

(Circuit of Figure 1, VIN= 15V, SKIP = GND, TON = unconnected, TA= +25°C, unless otherwise noted.)

MAX1844

High-Speed Step-Down Controller with
Accurate Current Limit for Notebook Computers

8 _______________________________________________________________________________________

PIN

FUNCTION

1 18 CS

Current-Sense Input. Connect a low-value current-sense resistor between CS and GND for accurate

current sensing. For lower power dissipation (less accurate) current sensing, connect CS to LX to
use the synchronous rectifier as the sense resistor. The PWM controller will not begin a cycle unless
the current sensed at CS is less than the current-limit threshold programmed at ILIM.

2 19

Overvoltage Protection Latch Control Input. The synchronous rectifier MOSFET is always forced to

the on state when an overvoltage fault is detected. If LATCH is low, the synchronous rectifier remains
on until either OVP is brought high, SHDN is toggled, or V

CC

is cycled below 1V. If LATCH is high,

normal operation resumes when the overvoltage condition ends.

3 20

Shutdown Control Input. Drive SHDN to GND to force the MAX1844 into shutdown. Drive or connect

to

V

CC

for normal operation. A rising edge on SHDN clears the overvoltage and undervoltage

protection fault latches.

4 1 OVP

Overvoltage Protection Control Input. An overvoltage fault occurs if the internal or external feedback

voltage exceeds the voltage at OVP. Apply a voltage between 1V and 1.8V to set the overvoltage
limit between 100% and 180% of nominal output voltage. Connect to GND to assert the default
overvoltage limit at 114% of the nominal output voltage. Connect to V

CC

to disable overvoltage fault

detection and clear the overvoltage protection fault latch.

5 2 FB

Feedback Input. Connect to V

CC

for a 1.8V fixed output or to GND for a 2.5V fixed output. For an
adjustable output (1V to 5.5V), connect FB to a resistive-divider from the output voltage. The FB
regulation level is 1V.

6 3 OUT

Output Voltage Sense Connection. Connect directly to the junction of the external output filter

capacitors. OUT senses the output voltage to determine the on-time for the high-side switching
MOSFET. OUT also serves as the feedback input in fixed-output modes.

7 4 ILIM

Current-Limit Threshold Adjustment. The current-limit threshold at CS is 0.1 times the voltage at ILIM.

Connect ILIM to a resistive-divider (typically from REF) to set the current-limit threshold between
25mV and 300mV (with 0.25V to 3V at ILIM). Connect to V

CC

to assert the 100mV default current-limit

threshold.

8 5 REF

2V Reference Voltage Output. Bypass to GND with a 0.22µF (min) bypass capacitor. Can supply

50µA for external loads. Reference turns off in shutdown.

9 6 UVP

Undervoltage Protection Control Input. An undervoltage fault occurs if the internal or external

feedback voltage is less than the voltage at UVP. Apply a voltage between 0.4V and 1V to set the
undervoltage limit between 40% and 100% of the nominal output voltage. Connect to V

CC

to assert

the default undervoltage limit of 70% of the nominal output voltage. Connect to GND to disable
undervoltage fault detection and clear the undervoltage protection latch.

10 7

Power-Good Open-Drain Output. PGOOD is low when the output voltage is more than 10% above or

below the normal regulation point or during soft-start. PGOOD is high impedance when the output is
in regulation and the soft-start circuit has terminated. PGOOD is low in shutdown.

11 8

Analog and Power Ground

12 9 DL

Synchronous Rectifier Gate-Driver Output. Swings from GND to V

DD

.

13 10

V

DD

Supply Input for the DL Gate Drive. Connect to the system supply voltage, 4.5V to 5.5V. Bypass to

GND with a 1µF (min) ceramic capacitor.

Pin Description

QSOP QFN

NAME

LATCH

SHDN

PGOOD

GND

Standard Application Circuit

The standard application circuit (Figure 1) generates a

2.5V rail for general-purpose use in a notebook computer.
See Table 1 for component selections. Table 2 lists com-

ponent manufacturers.

MAX1844

High-Speed Step-Down Controller with

Accurate Current Limit for Notebook Computers

_______________________________________________________________________________________ 9

PIN

FUNCTION

14 11

V

CC

Analog Supply Input. Connect to the system supply voltage, 4.5V to 5.5V, with a series 20Ω resistor.

Bypass to GND with a 1µF (min) ceramic capacitor.

15 12 TON

On-Time Selection-Control Input. This four-level logic input sets the nominal DH on-time. Connect to

GND, REF, V

CC

, or leave TON unconnected to select the following nominal switching frequencies:

GND = 600kHz, REF = 450kHz, floating = 300kHz, and V

CC

= 200kHz.

16 13 V+

Battery Voltage Sense Connection. Connect to input power source. V+ is used only to set the PWM

one-shot timing.

17 14

SKIP

Pulse-Skipping Control Input. Connect to V

CC

for low-noise, forced-PWM mode. Connect to GND to

enable pulse-skipping operation.

18 15 BST

Boost Flying-Capacitor Connection. Connect to an external capacitor and diode according to the

Standard Application Circuit (Figure 1). See the MOSFET Gate Drivers (DH, DL) section.

19 16 LX

External Inductor Connection. Connect LX to the switched side of the inductor. LX serves as the

lower supply rail for the DH high-side gate driver.

20 17 DH High-Side Gate-Driver Output. Swings from LX to BST.

Pin Description (continued)

Table 1. Component Selection for
Standard Applications

COMPONENT 2.5V AT 4A

C1 Input Capacitor

10µF, 25V
Taiyo Yuden TMK432BJ106KM or
TDK C4532X5R1E106M

C2 Output Capacitor

330µF, 6V
Kemet T510X477108M006AS or
Sanyo 6TPB330M

D1 Schottky Nihon EP10QY03

L1 Inductor

4.7µH
Coilcraft DO33116P-682 or
Sumida CDRH124-4R7MC

Q1 High-Side MOSFET

Fairchild Semiconductor
1/2 FDS6982A

Q2 Low-Side MOSFET

Fairchild Semiconductor
1/2 FDS6982A

R

SENSE

0.015Ω ±1%, 0.5W resistor
IRC LR2010-01-R015F or
Dale WSL-2010-R015F

Table 2. Component Suppliers

*Distributor

SUPPLIER

FACTORY FAX

Coilcraft 847-639-6400 1-847-639-1469
Dale-Vishay 203-452-5664 1-203-452-5670
Fairchild 408-822-2181 1-408-721-1635
IRC 800-752-8708 1-828-264-7204
Kemet 408-986-0424 1-408-986-1442
NIEC (Nihon)

81-3-3494-7414
Sanyo 619-661-6835 81-7-2070-1174
Sumida 847-956-0666 81-3-3607-5144
Taiyo Yuden 408-573-4150 1-408-573-4159
TDK 847-390-4461 1-847-390-4405

QSOP QFN

NAME

USA PHONE

805-867-2555*

Detailed Description

The MAX1844 buck controller is targeted for low-voltage
power supplies for notebook computers. Maxim’s propri­etary Quick-PWM pulse-width modulator in the MAX1844
is specifically designed for handling fast load steps while
maintaining a relatively constant operating frequency
and inductor operating point over a wide range of input
voltages. The Quick-PWM architecture circumvents the
poor load-transient timing problems of fixed-frequency
current-mode PWMs while also avoiding the problems
caused by widely varying switching frequencies in con­ventional constant-on-time and constant-off-time PWM
schemes.

5V Bias Supply (VCCand VDD)

The MAX1844 requires an external 5V bias supply in
addition to the battery. Typically, this 5V bias supply is
the notebook’s 95% efficient 5V system supply. Keeping
the bias supply external to the IC improves efficiency
and eliminates the cost associated with the 5V linear reg­ulator that would otherwise be needed to supply the
PWM circuit and gate drivers. If stand-alone capability is
needed, the 5V supply can be generated with an exter­nal linear regulator such as the MAX1615.

The battery and 5V bias inputs can be connected
together if the input source is a fixed 4.5V to 5.5V supply.
If the 5V bias supply is powered up prior to the

MAX1844

High-Speed Step-Down Controller with
Accurate Current Limit for Notebook Computers

10 ______________________________________________________________________________________

V

CC

UVP

V

IN

7V TO 20V

5V

BIAS SUPPLY

C2
330µF

SEE TABLE 1 FOR OTHER COMPONENT SELECTIONS.

POWER-GOOD
INDICATOR

L1

4.7µH
V

OUT

2.5V

SHDN

V+

D2
CMPSH-3

C6

3.3µF

C7

0.1µF

C4

0.22µF

270kΩ

130kΩ

Q1

D1

R2
100kΩ

Q2

R

SENSE

15mΩ

C5

4.7µF

R1

20Ω

SKIP

ILIM

ON/OFF

CONTROL

LOW-NOISE

CONTROL

DL

LX

BST

DH

CS

OUT

FB

LATCH

OVP

PGOOD

V

DD

MAX1844

5V

TON
REF

GND

C1

10µF

Figure 1. Standard Application Circuit

battery supply, the enable signal (SHDN) must be
delayed until the battery voltage is present in order to
ensure startup. The 5V bias supply provides VCCand
gate-drive power, so the maximum current drawn is:

I

BIAS

= ICC+ f (QG1+ QG2) = 5mA to 30mA (typ)

where ICCis 550µA (typ), f is the switching frequency,
and QG1and QG2are the MOSFET data sheet total
gate-charge specification limits at VGS= 5V.

Free-Running, Constant-On-Time PWM

Controller with Input Feed-Forward

The Quick-PWM control architecture is a pseudo-fixed-fre­quency, constant-on-time on-demand PWM with voltage
feed-forward (Figure 2). This architecture relies on the out­put filter capacitor’s ESR to act as a current-sense resistor,
so the output ripple voltage provides the PWM ramp sig­nal. The control algorithm is simple: the high-side switch
on-time is determined solely by a one-shot whose pulse

MAX1844

High-Speed Step-Down Controller with

Accurate Current Limit for Notebook Computers

______________________________________________________________________________________ 11

Figure 2. MAX1844 Functional Diagram

REF

-10%

FROM

OUT

REF

FB

ERROR

AMP

TOFF

TON

REF

+10%

FEEDBACK

MUX

(SEE FIGURE 6)

CHIP

SUPPLY

x2

1.0V

R

0.1V

POR

OVP

9R

ILIM

V

CC

- 1V

V

CC

- 1V

V

CC

- 1V

SHDN

PGOOD

ON-TIME

COMPUTE

TON

1-SHOT

1-SHOT

TRIG

IN

2V TO 28V

TRIG

Q

Q

S
R

2V

REF

REF

5V

OUTPUT

DL

CS

GND

V

CC

V

DD

LX

ZERO CROSSING

CURRENT

LIMIT

DH

BST

5V

+5V

Q

SKIP

TON

LATCH

V+

Σ

MAX1844

S
R

Q

0.7V

1.14V

UVP

20ms

TIMER

OVP/UVP

LATCH

0.1V

OUT

MAX1844

width is inversely proportional to input voltage and directly
proportional to output voltage. Another one-shot sets a
minimum off-time (400ns typ). The on-time one-shot is trig­gered if the error comparator is low, the low-side switch
current is below the current-limit threshold, and the mini­mum off-time one-shot has timed out.

On-Time One-Shot (TON)

The heart of the PWM core is the one-shot that sets the
high-side switch on-time. This fast, low-jitter, adjustable
one-shot includes circuitry that varies the on-time in
response to battery and output voltage. The high-side
switch on-time is inversely proportional to the battery
voltage as measured by the V+ input, and proportional
to the output voltage. This algorithm results in a nearly
constant switching frequency despite the lack of a fixed­frequency clock generator. The benefits of a constant
switching frequency are twofold: first, the frequency can
be selected to avoid noise-sensitive regions such as the
455kHz IF band; second, the inductor ripple-current
operating point remains relatively constant, resulting in

easy design methodology and predictable output volt­age ripple. The on-time is given by:

On-Time = K (V

OUT

+ 0.075V) / V

IN

where K (switching period) is set by the TON pin-strap
connection (Table 4), and 0.075V is an approximation to
accommodate for the expected drop across the low-side
MOSFET switch. One-shot timing error increases for the
shorter on-time settings due to fixed propagation delays;
it is approximately ±12.5% at 600kHz and 450kHz, and
±10% at the two slower settings. This translates to
reduced switching-frequency accuracy at higher frequen­cies (Table 5). Switching frequency increases as a func­tion of load current due to the increasing drop across the
low-side MOSFET, which causes a faster inductor-current
discharge ramp. The on-times guaranteed in the
Electrical Characteristics are influenced by switching
delays in the external high-side power MOSFET.

Two external factors that influence switching-frequency
accuracy are resistive drops in the two conduction loops
(including inductor and PC board resistance) and the
dead-time effect. These effects are the largest contribu­tors to the change of frequency with changing load cur­rent. The dead-time effect increases the effective
on-time, reducing the switching frequency as one or
both dead times are added to the effective on-time. It
occurs only in PWM mode (SKIP = high) when the induc­tor current reverses at light or negative load currents.
With reversed inductor current, the inductor’s EMF caus­es LX to go high earlier than normal, extending the on­time by a period equal to the low-to-high dead time.

For loads above the critical conduction point, the actual
switching frequency is:

f

VV

t(V V )

OUT DROP1

ON IN DROP2

=

+

+

High-Speed Step-Down Controller with
Accurate Current Limit for Notebook Computers

12 ______________________________________________________________________________________

Table 3. Operating Mode Truth Table

Normal operation with automatic PWM/PFM switchover for pulse skipping at light loads.
Best light-load efficiency.

Run

(PFM/PWM)

SwitchingGND1

Low-noise operation with no automatic switchover. Fixed-frequency PWM action is
forced regardless of load. Inductor current reverses at light load levels. Low noise,
high IQ.

Run (PWM),

Low Noise

SwitchingV

CC

1

Fault latch has been set by overvoltage protection, output UVLO, or thermal shutdown.
Device will remain in FAULT mode until V

CC

power is cycled or SHDN is toggled.

FaultHighX1

Low-power shutdown state. DL is forced to VDDif OVP is enabled and to GND if OVP is
disabled. ICC< 1µA typ.

Shutdown

High or

Low

X0

COMMENTSMODEDL

SKIPSHDN

Good operating point for
compound buck designs
or desktop circuits.

+5V input

600

TON = GND

450

TON = REF

3-cell Li+ notebook

Useful in 3-cell systems
for lighter loads than the
CPU core or where size is
key.

Considered mainstream
by current standards.

4-cell Li+ notebook

300

TON = Float

200

TON = V

CC

4-cell Li+ notebook

Use for absolute best
efficiency.

COMMENTS

TYPICAL

APPLICATION

FREQUENCY

(kHz)

Table 4. Frequency Selection Guidelines

where V

DROP1

is the sum of the parasitic voltage drops
in the inductor discharge path, including synchronous
rectifier, inductor, and PC board resistances; V

DROP2

is

the sum of the resistances in the charging path, and t

ON

is the on-time calculated by the MAX1844.

Automatic Pulse-Skipping Switchover

In skip mode (SKIP low), an inherent automatic
switchover to PFM takes place at light loads (Table 3).
This switchover is effected by a comparator that trun­cates the low-side switch on-time at the inductor cur­rent’s zero crossing. This mechanism causes the
threshold between pulse-skipping PFM and nonskipping
PWM operation to coincide with the boundary between
continuous and discontinuous inductor-current operation
(also known as the “critical conduction” point; see the
Continuous to Discontinuous Inductor Current vs. Input
Voltage graph in the Typical Operating Characteristics).
In low-duty-cycle applications, this threshold is relatively
constant, with only a minor dependence on battery volt­age.

where K is the on-time scale factor (Table 5). The load­current level at which PFM/PWM crossover occurs,
I

LOAD(SKIP)

, is equal to 1/2 the peak-to-peak ripple cur­rent, which is a function of the inductor value (Figure 3).
For example, in the standard application circuit with
K = 3.3µs (Table 5), V

OUT

= 2.5V, VIN= 15V, and L =

6.8µH, switchover to pulse-skipping operation occurs at
I

LOAD

= 0.51A or about 1/8 full load. The crossover point
occurs at an even lower value if a swinging (soft-satura­tion) inductor is used.

The switching waveforms may appear noisy and asyn­chronous when light loading causes pulse-skipping
operation, but this is a normal operating condition that

results in high light-load efficiency. Trade-offs in PFM
noise vs. light-load efficiency are made by varying the
inductor value. Generally, low inductor values produce a
broader efficiency vs. load curve, while higher values
result in higher full-load efficiency (assuming that the coil
resistance remains fixed) and less output voltage ripple.
Penalties for using higher inductor values include larger
physical size and degraded load-transient response
(especially at low input voltage levels).

DC output accuracy specifications refer to the threshold
of the error comparator. When the inductor is in continu­ous conduction, the output voltage will have a DC regu­lation level higher than the trip level by 50% of the ripple.
In discontinuous conduction (SKIP = GND, light load),
the output voltage will have a DC regulation level higher
than the error-comparator threshold by approximately

1.5% due to slope compensation.

Forced-PWM Mode (

SKIP

= High)

The low-noise forced-PWM mode (SKIP = high) disables
the zero-crossing comparator, which controls the low­side switch on-time. This causes the low-side gate-drive
waveform to become the complement of the high-side
gate-drive waveform. This in turn causes the inductor
current to reverse at light loads while DH maintains a
duty factor of V

OUT/VIN

. The benefit of forced-PWM
mode is to keep the switching frequency fairly constant,
but it comes at a cost: the no-load battery current can be
10mA to 40mA, depending on the external MOSFETs.

Forced-PWM mode is most useful for reducing audio­frequency noise, improving load-transient response, pro­viding sink-current capability for dynamic output voltage
adjustment, and improving the cross-regulation of
multiple-output applications that use a flyback trans­former or coupled inductor.

I

KV

2L

V-V

V

LOAD(SKIP)

OUT IN OUT

IN

≈×

MAX1844

High-Speed Step-Down Controller with

Accurate Current Limit for Notebook Computers

______________________________________________________________________________________ 13

Figure 3. Pulse-Skipping/Discontinuous Crossover Point

INDUCTOR CURRENT

I

LOAD

= I

PEAK

/2

ON-TIME0 TIME

I

PEAK

L

V

BATT -VOUT

∆i
∆t

=

Figure 4. ‘‘Valley’’ Current-Limit Threshold Point

I

LIMIT

I

LOAD

0 TIME

I

PEAK

INDUCTOR CURRENT

MAX1844

Current-Limit Circuit (ILIM)

The current-limit circuit employs a unique “valley” cur­rent-sensing algorithm (Figure 4). If the magnitude of the
current-sense voltage at CS is above the current-limit
threshold, the PWM is not allowed to initiate a new cycle.
The actual peak current is greater than the current-limit
threshold by an amount equal to the inductor ripple cur­rent. Therefore, the exact current-limit characteristic and
maximum load capability are a function of the sense
resistance, inductor value, and battery voltage.

There is also a negative current limit that prevents exces­sive reverse inductor currents when V

OUT

is sinking cur­rent. The negative current-limit threshold is set to
approximately 120% of the positive current limit and
therefore tracks the positive current limit when ILIM is
adjusted.

The current-limit threshold is adjusted with an external
resistor-divider at ILIM. A 1µA (min) divider current is
recommended. The current-limit threshold adjustment
range is from 25mV to 300mV. In the adjustable mode,
the current-limit threshold voltage is precisely 1/10 the
voltage seen at ILIM. The threshold defaults to 100mV
when ILIM is connected to VCC. The logic threshold for
switchover to the 100mV default value is approximately
VCC- 1V.

Carefully observe the PC board layout guidelines to
ensure that noise and DC errors do not corrupt the cur­rent-sense signal seen by CS. Mount or place the IC
close to the low-side MOSFET and sense resistor with
short, direct traces, making a Kelvin sense connection to
the sense resistor.

In Figure 1, the Schottky diode (D1) provides a current
path parallel to the Q2/R

SENSE

current path. Accurate
current sensing demands D1 to be off while Q2 con­ducts. A void large current-sense voltages that, com­bined with the voltages across Q2, would allow D1 to
conduct. If very large sense voltages are used, connect
D1 in parallel with Q2.

MOSFET Gate Drivers (DH, DL)

The DH and DL drivers are optimized for driving moder­ate-sized high-side, and larger low-side power
MOSFETs. This is consistent with the low duty factor
seen in the notebook environment, where a large V

BATT

-

V

OUT

differential exists. An adaptive dead-time circuit
monitors the DL output and prevents the high-side FET
from turning on until DL is fully off. There must be a low­resistance, low-inductance path from the DL driver to the
MOSFET gate for the adaptive dead-time circuit to work

properly; otherwise, the sense circuitry in the MAX1844
will interpret the MOSFET gate as “off” while there is
actually still charge left on the gate. Use very short, wide
traces measuring no more than 20 squares (50 to 100
mils wide if the MOSFET is 1 inch from the MAX1844).

The dead time at the other edge (DH turning off) is deter­mined by a fixed 35ns (typ) internal delay.

The internal pulldown transistor that drives DL low is
robust, with a 0.5Ω (typ) on-resistance. This helps pre­vent DL from being pulled up during the fast rise-time of
the inductor node, due to capacitive coupling from the
drain to the gate of the low-side synchronous-rectifier
MOSFET. However, for high-current applications, there
are still some combinations of high- and low-side FETs
that will cause excessive gate-drain coupling, which can
lead to efficiency-killing, EMI-producing shoot-through
currents. This is often remedied by adding a resistor in
series with BST, which increases the turn-on time of the
high-side FET without degrading the turn-off time (Figure

5).

POR, UVLO, and Soft-Start

Power-on reset (POR) occurs when VCCrises above
approximately 2V, resetting the fault latch and soft-start
counter, and preparing the PWM for operation. Until V

CC

reaches 4.2V, VCCundervoltage lockout (UVLO) circuitry
inhibits switching. DL is held low if overvoltage protec­tion is disabled, and held high if overvoltage protection is
enabled. See the Output Overvoltage Protection section.
When VCCrises above 4.2V, an internal digital soft-start
timer begins to ramp up the maximum allowed current
limit. The ramp occurs in five steps: 20%, 40%, 60%,
80%, and 100%; 100% current is available after 1.7ms
±50%.

High-Speed Step-Down Controller with
Accurate Current Limit for Notebook Computers

14 ______________________________________________________________________________________

BST

+5V

V

IN

5Ω

DH

LX

MAX1844

Figure 5. Reducing the Switching-Node Rise Time

Power-Good Output (PGOOD)

The PGOOD window comparator continuously monitors
the output. PGOOD is actively held low in shutdown,
standby, and soft-start. After digital soft-start terminates,
PGOOD is released if the output is within 10% of the
nominal output voltage setting. Note that the PGOOD
window detector is completely independent of the over­voltage and undervoltage protection fault detectors.

Output Overvoltage Protection

OVP controls the output overvoltage protection func­tion. Connect OVP to VCCto disable overvoltage pro­tection. If overvoltage protection is enabled, the output
is continuously monitored. If the output exceeds the
overvoltage protection threshold, overvoltage protec­tion is triggered and the DL low-side gate-driver output
is forced high. This turns on the low-side MOSFET
switch to rapidly discharge the output capacitor and
reduce the output voltage.

If LATCH is high, normal operation resumes when the
overvoltage condition ends. If LATCH is low, the DL
gate-driver output remains high until OVP is brought
high, SHDN is toggled, or VCCis cycled below 1V.
When the condition that caused the overvoltage per­sists (such as a shorted high-side MOSFET), the bat­tery fuse will open. If overvoltage protection is enabled,

DL is kept high continuously in shutdown mode or
when UVLO is active.

Note that forcing DL high in shutdown causes the out­put voltage to go slightly negative when energy has
been previously stored in the LC tank circuit (see the
shutdown waveforms in the Typical Operating
Characteristics). If the load cannot tolerate being
forced to a negative voltage, it may be desirable to
place a power Schottky diode across the output to act
as a reverse-polarity clamp.

Output Undervoltage Protection

UVP controls the output undervoltage protection func­tion. Connect UVP to GND to disable undervoltage pro­tection. The output undervoltage protection function is
similar to foldback current limiting but employs a timer
and latch rather than a variable current limit. If the output
voltage is below the undervoltage protection threshold
after the output undervoltage protection blanking time
has elapsed, the PWM is latched off and does not restart
until V

CC

power is cycled. SHDN is toggled, or UVP is

brought low.
Connect UVP to VCCto enable the default undervoltage

trip threshold of 70% of nominal. To select a different
threshold, drive UVP to a voltage between 0.4V and 1V
for a threshold between 40% and 100% of nominal.

MAX1844

High-Speed Step-Down Controller with

Accurate Current Limit for Notebook Computers

______________________________________________________________________________________ 15

0.2V

2V

OUT

FB

FIXED

1.8V

TO ERROR AMP

FIXED

2.5V

MAX1844

Figure 6. Feedback Mux

DL

GND

OUT

CS

DH

FB

V

BATT

V

OUT

R1

R2

MAX1844

Figure 7. Setting V

OUT

with a Resistor-Divider

MAX1844

Fixed Output Voltages

The MAX1844’s Dual ModeTMoperation allows the selec­tion of common voltages without requiring external com­ponents (Figure 6). Connect FB to GND for a fixed 2.5V
output or to VCCfor a 1.8V output, or connect FB directly
to OUT for a fixed 1V output.

Setting V

OUT

with a Resistor-Divider

The output voltage can be adjusted from 1V to 5.5V with
a resistor-divider if desired (Figure 7). The equation for
adjusting the output voltage is:

where VFBis 1V.

Design Procedure

Component selection for the MAX1844 is primarily dictat­ed by the following four criteria:

1) Input voltage range. The maximum value (V

IN(MAX)

)
must accommodate the worst-case high AC-adapter
voltage. The minimum value (V

IN(MIN)

) must account
for the lowest battery voltage after drops due to con­nectors, fuses, and battery selector switches. Lower
input voltages result in better efficiency.

2) Maximum load current. There are two values to con-
sider. The peak load current (I

LOAD(MAX)

) determines
the instantaneous component stresses and filtering
requirements and thus drives output capacitor selec­tion, inductor saturation rating, and the design of the
current-limit circuit. The continuous load current
(I

LOAD

) determines the thermal stresses and thus dri­ves the selection of input capacitors, MOSFETs, and
other critical heat-contributing components.

3) Switching frequency. This choice determines the
basic trade-off between size and efficiency. The opti­mal frequency is largely a function of maximum input
voltage, due to MOSFET switching losses that are
proportional to frequency and V

IN

2

. The optimum fre­quency is also a moving target, due to rapid improve­ments in MOSFET technology that are making higher
frequencies more practical (Table 4).

4) Inductor operating point. This choice provides
trade-offs between size vs. efficiency. Low inductor
values cause large ripple currents, resulting in the
smallest size, but poor efficiency and high output rip­ple. The minimum practical inductor value is one that
causes the circuit to operate at the edge of critical
conduction (where the inductor current just touches
zero with every cycle at maximum load). Inductor val-

ues lower than this grant no further size-reduction
benefit.

The MAX1844’s pulse-skipping algorithm initiates skip
mode at the critical conduction point. So, the inductor
operating point also determines the load-current value
at which PFM/PWM switchover occurs.

These four factors impact the component selection
process. Selecting components and calculating their
effect on the MAX1844’s operation is best done with a
spreadsheet. Using the formulas provided, calculate the
LIR (the ratio of the inductor ripple current to the
designed maximum load current) for both the minimum
and maximum input voltages. Maintaining an LIR within a
20% to 50% range is recommended. The use of a
spreadsheet allows quick evaluation of component
selection.

Inductor Selection

The switching frequency and inductor operating point
determine the inductor value as follows:

Example: I

LOAD(MAX)

= 8A, V

IN =

7V, V

OUT

= 1.5V,

f = 300kHz, 33% ripple current or LIR = 0.33.

Find a low-loss inductor having the lowest possible DC
resistance that fits in the allotted dimensions. Ferrite
cores are often the best choice, although powdered iron
is inexpensive and can work well at 200kHz. The core
must be large enough not to saturate at the peak induc­tor current (I

PEAK

).

I

PEAK

= I

LOAD(MAX)

+ [(LIR / 2) ✕I

LOAD(MAX)

]

Most inductor manufacturers provide inductors in stan­dard values, such as 1.0µH, 1.5µH, 2.2µH, 3.3µH, etc.
Also look for nonstandard values, which can provide a
better compromise in LIR across the input voltage range.
If using a swinging inductor (where the no-load induc­tance decreases linearly with increasing current), evalu­ate the LIR with properly scaled inductance values.

Transient Response

The inductor ripple current also impacts transient­response performance, especially at low V

IN

- V

OUT

dif­ferentials. Low inductor values allow the inductor
current to slew faster, replenishing charge removed
from the output filter capacitors by a sudden load step.

L

1.5V (7V-1.5V)

7V 300kHz 0.33 8A

1.49 H=

×××

=µ

L =

V(V- V)

V f LIR I

OUT IN OUT

IN LOAD(MAX)

×× ×

V V1

R1

R2

OUT FB

=+











High-Speed Step-Down Controller with
Accurate Current Limit for Notebook Computers

16 ______________________________________________________________________________________

Dual Mode is a trademark of Maxim Integrated Products.

The amount of output sag is also a function of the maxi­mum duty factor, which can be calculated from the on­time and minimum off-time:

where

and minimum off-time = 400ns (typ) (see Table 5 for K
values).

The amount of overshoot during a full-load to no-load
transient due to stored inductor energy can be calculated
as:

Setting the Current Limit

For most applications, set the MAX1844 current limit by
the following procedure:

1) Determine the minimum (valley) inductor current
I

L(MIN)

under conditions when VINis small, V

OUT

is
large, and load current is maximum. The minimum
inductor current is I

LOAD

minus half the ripple cur-

rent (Figure 4).

2) The sense resistor determines the achievable
current-limit accuracy. There is a trade-off between
current-limit accuracy and sense-resistor power dis­sipation. Most applications employ a current-sense
voltage of 50mV to 100mV. Choose a sense resistor
so that:

R

SENSE

= CS Threshold Voltage / I

L(MIN)

Extremely cost-sensitive applications that do not
require high-accuracy current sensing can use the on­resistance of the low-side MOSFET switch in place of
the sense resistor by connecting CS to LX (Figure 8b).
Use the worst-case value for R

DS(ON)

from the MOSFET
Q2 data sheet, and add a margin of 0.5%/°C for the
rise in R

DS(ON)

with temperature. Then use that

R

DS(ON)

value and I

L(MIN)

from step 1 above to deter­mine the CS threshold voltage. If the default 100mV
threshold is unacceptable, set the value as in step 2
above.

In all cases, ensure an acceptable CS threshold volt­age despite inaccuracies in resistor values.

Output Capacitor Selection

The output filter capacitor must have low enough effective
series resistance (ESR) to meet output ripple and load­transient requirements, yet have high enough ESR to sat­isfy stability requirements.

For CPU core voltage converters and other applications
where the output is subject to violent load transients, the
output capacitor’s size depends on how much ESR is
needed to prevent the output from dipping too low under
a load transient. Ignoring the sag due to finite capaci­tance:

In non-CPU applications, the output capacitor’s size often
depends on how much ESR is needed to maintain an
acceptable level of output voltage ripple:

The actual microfarad capacitance value required relates
to the physical size needed to achieve low ESR, as well
as to the chemistry of the capacitor technology. Thus, the
capacitor is usually selected by ESR and voltage rating
rather than by capacitance value (this is true of tantalums,
OS-CONs, and other electrolytics).

When using low-capacity filter capacitors, such as
ceramic or polymer types, capacitor size is usually deter­mined by the capacity needed to prevent V

SAG

and

V

SOAR

from causing problems during load transients.
Generally, once enough capacitance is added to meet
the overshoot requirement, undershoot at the rising load
edge is no longer a problem (also, see the V

SAG

and

V

SOAR

equation in the Transient Response section).

R

V

LIR I

ESR

P-P

LOAD(MAX)

≤

×

R

V

I

ESR

DIP

LOAD(MAX)

≤

V

LI

CV

SOAR

LOAD MAX

OUT OUT

≈

×∆

()

()

2

2

DUTY

K (V + 0.075V)/ V

K (V + 0.075V)/ V + min off - time

OUT IN

OUT OUT

=

V

(I ) L

2 C DUTY (V - V )

SAG

LOAD(MAX)

2

OUT IN(MIN) OUT

=

×

××

∆

MAX1844

High-Speed Step-Down Controller with

Accurate Current Limit for Notebook Computers

______________________________________________________________________________________ 17

DL

CS

LX

a) b)

MAX1844

DL

CS

LX

MAX1844

Figure 8. Current-Sense Circuits

MAX1844

Output Capacitor Stability Considerations

Stability is determined by the value of the ESR zero rela­tive to the switching frequency. The point of instability is
given by the following equation:

where:

For a typical 300kHz application, the ESR zero frequency
must be well below 95kHz, preferably below 50kHz.

Tantalum and OS-CON capacitors in widespread use at
the time of publication have typical ESR zero frequencies
of 25kHz. In the design example used for inductor selec­tion, the ESR needed to support 60mV

P-P

ripple is
60mV/2.7A = 22mΩ. Two 470µF/4V Kemet T510 low-ESR
tantalum capacitors in parallel provide 22mΩ (max) ESR.
Their typical combined ESR results in a zero at 27kHz,
well within the bounds of stability.

Do not put high-value ceramic capacitors directly across
the feedback sense point without taking precautions to
ensure stability. Large ceramic capacitors can have a
high ESR zero frequency and cause erratic, unstable
operation. However, it’s easy to add enough series resis­tance by placing the capacitors a couple of inches
downstream from the feedback sense point, which
should be as close as possible to the inductor.

Unstable operation manifests itself in two related but dis­tinctly different ways: double-pulsing and fast-feedback
loop instability.

Double-pulsing occurs due to noise on the output or
because the ESR is so low that there isn’t enough volt­age ramp in the output voltage signal. This “fools” the
error comparator into triggering a new cycle immediately
after the 400ns minimum off-time period has expired.
Double-pulsing is more annoying than harmful, resulting
in nothing worse than increased output ripple. However,
it can indicate the possible presence of loop instability,
which is caused by insufficient ESR.

Loop instability can result in oscillations at the output
after line or load perturbations that can trip the overvolt­age protection latch or cause the output voltage to fall
below the tolerance limit.

The easiest method for checking stability is to apply a
very fast zero-to-max load transient and carefully
observe the output voltage ripple envelope for over­shoot and ringing. It can help to monitor simultaneously
the inductor current with an AC current probe. Don’t

allow more than one cycle of ringing after the initial
step-response under- or overshoot.

Input Capacitor Selection

The input capacitor must meet the ripple current
requirement (I

RMS

) imposed by the switching currents.
Nontantalum chemistries (ceramic, aluminum, or OS­CON) are preferred due to their resistance to power-up
surge currents.

For optimal circuit reliability, choose a capacitor that
has less than 10°C temperature rise at the peak ripple
current.

Power MOSFET Selection

Most of the following MOSFET guidelines focus on the
challenge of obtaining high load-current capability (>5A)
when using high-voltage (>20V) AC adapters. Low-cur­rent applications usually require less attention.

For maximum efficiency, choose a high-side MOSFET
(Q1) that has conduction losses equal to the switching
losses at the optimum battery voltage (15V). Check to
ensure that the conduction losses at minimum input
voltage do not exceed the package thermal limits or
violate the overall thermal budget. Check to ensure that
conduction losses plus switching losses at the maxi-
mum input voltage do not exceed the package ratings
or violate the overall thermal budget.

Choose a low-side MOSFET (Q2) that has the lowest
possible R

DS(ON)

, comes in a moderate to small pack­age (i.e., SO-8), and is reasonably priced. Ensure that
the MAX1844 DL gate driver can drive Q2; in other
words, check that the gate is not pulled up by the high­side switch turn on, due to parasitic drain-to-gate capac­itance, causing cross-conduction problems. Switching
losses are not an issue for the low-side MOSFET since it
is a zero-voltage switched device when used in the buck
topology.

MOSFET Power Dissipation

Worst-case conduction losses occur at the duty factor
extremes. For the high-side MOSFET, the worst-case
power dissipation due to resistance occurs at minimum
battery voltage:

PD(Q1 Resistive) = (V

OUT

/ V

IN(MIN)

) ✕I

LOAD

2

✕

R

DS(ON)

Generally, a small high-side MOSFET is desired to
reduce switching losses at high input voltages. However,
the R

DS(ON)

required to stay within package power-dissi-

I I

VV-V

V

RMS LOAD

OUT IN OUT

IN

=

()





















f

f

f

1

2R C

ESR

ESR

ESR OUT

=

=

×× ×

π

π

High-Speed Step-Down Controller with
Accurate Current Limit for Notebook Computers

18 ______________________________________________________________________________________

pation limits often limits how small the MOSFET can be.
Again, the optimum occurs when the switching (AC)
losses equal the conduction (R

DS(ON)

) losses. High-side
switching losses do not usually become an issue until
the input is greater than approximately 15V.

Switching losses in the high-side MOSFET can become
an insidious heat problem when maximum AC adapter
voltages are applied, due to the squared term in the
CV2f switching loss equation. If the high-side MOSFET
chosen for adequate R

DS(ON)

at low battery voltages
becomes extraordinarily hot when subjected to
V

IN(MAX)

, reconsider the choice of MOSFET.

Calculating the power dissipation in Q1 due to switching
losses is difficult, since it must allow for difficult-to-quanti­fy factors that influence the turn-on and turn-off times.
These factors include the internal gate resistance, gate
charge, threshold voltage, source inductance, and PC
board layout characteristics. The following switching loss
calculation provides only a very rough estimate and is no
substitute for breadboard evaluation, preferably including
a sanity check using a thermocouple mounted on Q1.

where C

RSS

is the reverse transfer capacitance of Q1,

and I

GATE

is the peak gate-drive source/sink current (1A

typ).
For the low-side MOSFET, Q2, the worst-case power dis-

sipation always occurs at maximum battery voltage:

PD(Q2) = (1 - V

OUT

/ V

IN(MAX)

) ✕I

LOAD

2

✕

R

DS(ON)

The absolute worst case for MOSFET power dissipation
occurs under heavy overloads that are greater than
I

LOAD(MAX)

but are not quite high enough to exceed the
current limit. To protect against this possibility, you must
“overdesign” the circuit to tolerate I

LOAD

= I

LIMIT(HIGH)

+

[(LIR / 2) ✕I

LOAD(MAX)

], where I

LIMIT(HIGH)

is the maxi­mum valley current allowed by the current-limit circuit,
including threshold tolerance and sense-resistance vari­ation. If short-circuit protection without overload protec­tion is adequate, enable undervoltage protection, and
use I

LOAD(MAX

) to calculate component stresses.

Choose a Schottky diode D1 having a forward voltage
drop low enough to prevent the Q2 MOSFET body diode
from turning on during the dead time. As a general rule,
a diode having a DC current rating equal to 1/3 of the
load current is sufficient. This diode is optional, and if
efficiency isn’t critical it can be removed.

Applications Information

Dropout Performance

The output voltage adjust range for continuous-conduc­tion operation is restricted by the nonadjustable 500ns
(max) minimum off-time one-shot. For best dropout per­formance, use the slower (20 0kHz) on-time settings.
When working with low input voltages, the duty-factor
limit must be calculated using worst-case values for on­and off-times. Manufacturing tolerances and internal
propagation delays introduce an error to the TON K­factor. This error is greater at higher frequencies (Table

5). Also, keep in mind that transient response perfor­mance of buck regulators operated close to dropout is
poor, and bulk output capacitance must often be
added (see the V

SAG

equation in the Transient

Response section).
The absolute point of dropout is when the inductor cur-

rent ramps down during the minimum off-time (∆I

DOWN

)
as much as it ramps up during the on-time (∆IUP). The
ratio h = ∆IUP/∆I

DOWN

indicates the circuit’s ability to
slew the inductor current higher in response to
increased load, and must always be greater than 1. As
h approaches 1, the absolute minimum dropout point,
the inductor current will be less able to increase during
each switching cycle, and V

SAG

will greatly increase

unless additional output capacitance is used.
A reasonable minimum value for h is 1.5, but this may

be adjusted up or down to allow trade-offs between
V

SAG

, output capacitance, and minimum operating
voltage. For a given value of h, the minimum operating
voltage can be calculated as:

where V

DROP1

and V

DROP2

are the parasitic voltage

drops in the discharge and charge paths, t

OFF(MIN)

is
from the Electrical Characteristics table, and K is taken­from Table 5. The absolute minimum input voltage is cal­culated with h = 1.

If the calculated V

IN(MIN)

is greater than the required
minimum input voltage, then operating frequency must
be reduced or output capacitance added to obtain an
acceptable V

SAG

. If operation near dropout is anticipat-

ed, calculate V

SAG

to be sure of adequate transient

response.

V

VV

th

K

VV

IN MIN

OUT DROP

OFF MIN

DROP DROP()

()

=

+

()

×













+

1

21

1-

-

PD(Q1 switching)

CV fI

I

RSS IN(MAX)

2

LOAD

GATE

=

×××

MAX1844

High-Speed Step-Down Controller with

Accurate Current Limit for Notebook Computers

______________________________________________________________________________________ 19

MAX1844

High-Speed Step-Down Controller with
Accurate Current Limit for Notebook Computers

20 ______________________________________________________________________________________

Dropout Design Example:

V

OUT

= 2.5V
fsw = 300kHz
K = 1.8µs, worst-case K = 2.97µs
t

OFF(MIN)

= 500ns

V

DROP1

= V

DROP2

= 100mV

h = 1.5

Calculating again with h = 1 gives the absolute limit of
dropout:

V

VV

s

s

VV V

IN MIN()

..

.

.

. . .

=

+

()

µ×

µ











+=

25 01

1

05 1

297

01 01 313

-

-

V

VV

s

s

VV V

IN MIN()

..

. .

.

.. .

=

+

()

µ×

µ











+=

25 01

1

05 15

297

01 01 348

-

-

AGND PLANE

PGND

PLANE

VIA TO IC OUT

POWER

GROUND

VIA TO IC

CS PIN

V

DD

BYPASS

REF

BYPASS

V

CC

BYPASS

USE AGND PLANE TO:

- BYPASS V

CC

AND REF

- TERMINATE EXTERNAL FB, ILIM,
OVP, UVP DIVIDERS

- PIN-STRAP CONTROL INPUTS
USE PGND PLANE TO:

- BYPASS V

DD

- CONNECT IC GND PIN
TO TOP-SIDE POWER GROUND

VIA TO POWER
GROUND

TOP SIDEBOTTOM SIDE

V

OUT

L1

C1

C2

D1

Q1

V

IN

Q2

Q

VIA R

S

VIA TO PGND PLANE
AND IC GND PIN

Figure 9. Power-Stage PC Board Layout Example

Table 5. Approximate K-Factor Errors

TON

SETTING

(kHz)

APPROXIMATE

K-FACTOR
ERROR (%)

MINIMUM V

IN

AT V

OUT

= 2V

(V)

200 ±10 2.6
300 ±10 2.9
450 ±12.5 3.2
600 ±12.5 3.6

K

FACTOR

(µs)

5

3.3

2.2

1.7

Therefore, VINmust be greater than 3.13V, even with
very large output capacitance, and a practical input volt­age with reasonable output capacitance would be 3.48V.

PC Board Layout Guidelines

Careful PC board layout is critical to achieving low
switching losses and clean, stable operation. The switch­ing power stage requires particular attention (Figure 9). If
possible, mount all of the power components on the top
side of the board, with their ground terminals flush
against one another. Follow these guidelines for good
PC board layout:

• Keep the high-current paths short, especially at the
ground terminals. This practice is essential for stable,
jitter-free operation.

• Keep the power traces and load connections short.
This practice is essential for high efficiency. Using
thick copper PC boards (2oz vs. 1oz) can enhance
full-load efficiency by 1% or more. Correctly routing
PC board traces is a difficult task that must be
approached in terms of fractions of centimeters,
where a single milliohm of excess trace resistance
causes a measurable efficiency penalty.

• Minimize current sensing errors by connecting CS
directly to the R

SENSE

terminal.

• When trade-offs in trace lengths must be made, it is
preferable to allow the inductor charging path to be
made longer than the discharge path. For example,
it is better to allow some extra distance between the
input capacitors and the high-side MOSFET than to
allow distance between the inductor and the low­side MOSFET or between the inductor and the out­put filter capacitor.

• Route high-speed switching nodes (BST, LX, DH, and
DL) away from sensitive analog areas (REF, FB, CS).

Layout Procedure

1) Place the power components first, with ground termi­nals adjacent (Q2 source, C

IN-

, C

OUT-

, D1 anode). If
possible, make all these connections on the top layer
with wide, copper-filled areas.

2) Mount the controller IC adjacent to MOSFET Q2,
preferably on the back side opposite Q2 in order to
keep LX, GND, and the DL gate-drive lines short and
wide. The DL gate trace must be short and wide,
measuring 10 to 20 squares (50 to 100 mils wide if the
MOSFET is 1 inch from the controller IC GND pin.

3) Group the gate-drive components (BST diode and
capacitor, VDDbypass capacitor) together near the
controller IC.

4) Make the DC-DC controller ground connections as
shown in Figure 9. This diagram can be viewed as
having two separate ground planes: power ground,
where all the high-power components go; and an ana­log ground plane for sensitive analog components.
The analog ground plane and power ground plane
must meet only at a single point directly at the IC.

5) Connect the output power planes directly to the out­put filter capacitor positive and negative terminals
with multiple vias. Place the entire DC-DC converter
circuit as close to the load as is practical.

MAX1844

High-Speed Step-Down Controller with

Accurate Current Limit for Notebook Computers

______________________________________________________________________________________ 21

Chip Information

TRANSISTOR COUNT: 2963
PROCESS: BiCMOS

Pin Configuration

20
19
18
17
16
15
14
13

1
2
3
4
5
6
7
8

DH
LX
BST
SKIPOVP

SHDN

LATCH

CS

TOP VIEW

V+
TON
V

CC

V

DD

REF

ILIM

OUT

FB

12
11

9

10

DL
GNDPGOOD

UVP

MAX1844EEP

20 QSOP

3

2

1

20 19

4
5

6

7

8

910

11

12

13

14

15

16

17

18

20 QFN

MAX1844EGP

V

CC

TON

V+

SKIP

BST

REF

ILIM

OUT

FB

OVP

LX

DH

CS

LATCH

SHDN

V

DD

DL

GND

PGOOD

UVP

32L QFN .EPS

MAX1844

High-Speed Step-Down Controller with
Accurate Current Limit for Notebook Computers

22 ______________________________________________________________________________________

Package Information

(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,
go to www.maxim-ic.com/packages.)

MAX1844

High-Speed Step-Down Controller with

Accurate Current Limit for Notebook Computers

Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.

23 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600

© 2002 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.

QSOP.EPS

Package Information (continued)

(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,
go to www.maxim-ic.com/packages.)