The MAX1739/MAX1839 fully integrated controllers are
optimized to drive cold-cathode fluorescent lamps
(CCFLs) using the industry-proven Royer oscillator
inverter architecture. The Royer architecture provides
near sinusoidal drive waveforms over the entire input
range to maximize the life of CCFLs. The MAX1739/
MAX1839 optimize this architecture to work over a wide
input voltage range, achieve high efficiency, and maximize the dimming range.
The MAX1739/MAX1839 monitor and limit the transformer center-tap voltage when required. This ensures
minimal voltage stress on the transformer, which
increases the operating life of the transformer and
eases its design requirements. These controllers also
provide protection against many other fault conditions,
including lamp-out and buck short faults.
These controllers achieve 50:1 dimming range by
simultaneously adjusting lamp current and “chopping”
the CCFL on and off using a digitally adjusted pulsewidth modulated (DPWM) method. CCFL brightness is
controlled by an analog voltage or is set with an
SMBusTM-compatible two-wire interface (MAX1739).
The MAX1739/MAX1839 drive an external high-side
N-channel power MOSFET and two low-side N-channel
power MOSFETs, all synchronized to the Royer oscillator. An internal 5.3V linear regulator powers the MOSFET drivers and most of the internal circuitry. The
MAX1739/MAX1839 are available in space-saving
20-pin QSOP packages and operate over the -40°C to
+85°C temperature range.
(V+ = 8.2V, VSH/SUS = VSH= 5.5V, MINDAC = GND, TA= 0°C to +85°C, unless otherwise noted. Typical values are at TA= +25°C.)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
VBATT to GND ...........................................................-0.3V to 30V
V
BST
, V
SYNC
to GND.................................................-0.3V to 34V
V
BST
to VLX.................................................................-0.3V to 6V
V
DH
to VLX.................................................-0.3V to (V
BST
+ 0.3V)
V
LX
to GND...................................................-6V to (V
BST
+ 0.3V)
VL to GND...................................................................-0.3V to 6V
V
CCV
, V
CCI
, V
REF
, V
DL1
, V
DL2
to GND .........-0.3V to (VL + 0.3V)
V
MINDAC
, V
CTFB
, V
CSAV
to GND ................................-0.3V to 6V
V
CS
to GND...................................................-0.6V to (VL + 0.3V)
V
MODE
to GND.............................................................-6V to 12V
V
CRF/SDA
, V
CRF
, V
CTL/SCL
, V
CTL
, V
SH/SUS
,
V
SH
to GND ............................................................-0.3V to 6V
(V+ = 8.2V, VSH/SUS = VSH= 5.5V, MINDAC = GND, TA= 0°C to +85°C, unless otherwise noted. Typical values are at TA= +25°C.)
ANALOG INTERFACE BRIGHTNESS CONTROL (MODE connected to REF or GND )
CRF/SDA, CRF Input Range2.75.5V
CRF/SDA, CRF Input Current
CTL/SCL, Input RangeMAX17390
CTL Input RangeMAX18390CRFV
CTL/SCL, CTL Input CurrentMODE = REF or GND-11µA
ADC ResolutionGuaranteed monotonic5Bits
ADC Hysteresis1LSB
SH Input Low Voltage0.8V
SH Input High Voltage2.1V
SH/SUS Input Hysteresis when
Transitioning In and Out of Shutdown
SH Input Bias Current-11µA
SYSTEM MANAGEMENT BUS BRIGHTNESS CONTROL (MAX1739, MODE connected to VL, see Figures 12 and 13)
CRF/SDA, CTL/SCL, SH/SUS Input
CRF/SDA, CTL/SCL, SH/SUS Input
Note 1: Corresponds to 512 DPWM cycles or 65536 MODE
cycles.
Note 2: When the buck switch is shorted, V
CTFB
goes high
causing V
CCV
to go below the fault detection threshold.
Note 3: Corresponds to 64 DPWM cycles or 8192 MODE cycles.
Note 4: The MODE pin thresholds are only valid while the part is
operating. In shutdown, V
REF
= 0 and the part only
differentiates between SMB mode and ADC mode. In
shutdown with ADC mode selected, the CRF/SDA and
CTL/SCL pins are at high impedance and will not cause
extra supply current when their voltages are not at
GND or VL.
V
AMPLITUDE
> 2V
MODE
500pF
10k
Note 5: The amplitude is measured with the following circuit:
Note 6: Specifications from -40°C to +85°C are guaranteed by
design, not production tested.
SUPPLY AND REFERENCE
V
BATT
V
BATT
VL Output Voltage, Normal Operation
VL Undervoltage Lockout Threshold
REF Output Voltage, Normal
Operation
VL POR Threshold0.92.7V
SWITCHING REGULATOR
DH Driver On-Resistance18Ω
DL1, DL2 Driver On-Resistance18Ω
SYNC Synchronization RangeDetect falling edges on SYNC64200kHz
CS Overcurrent Threshold408492mV
DAC AND ERROR AMPLIFIER
CSAV Regulation PointV
CTFB Regulation Point560640mV
CTFB to CCV Transconductance1V < V
ANALOG INTERFACE BRIGHTNESS CONTROL (MODE connected to REF or MODE connected to GND)
SH Input Low Voltage0.8V
SH Input High Voltage2.1V
SYSTEM MANAGEMENT BUS BRIGHTNESS CONTROL (MODE connected to VL)