The MAX16033–MAX16040 supervisory circuits reduce
the complexity and number of components required for
power-supply monitoring and battery control functions
in microprocessor (µP) systems. The devices significantly improve system reliability and accuracy compared to other ICs or discrete components. The
MAX16033–MAX16040 provide µP reset, backup-battery switchover, power-fail warning, watchdog, and
chip-enable gating features.
The MAX16033–MAX16040 operate from supply voltages up to 5.5V. The factory-set reset threshold voltage
ranges from 2.32V to 4.63V. The devices feature a manual-reset input (MAX16033/MAX16037), a watchdog
timer input (MAX16034/MAX16038), a battery-on output
(MAX16035/MAX16039), an auxiliary adjustable reset
input (MAX16036/MAX16040), and chip-enable gating
(MAX16033–MAX16036). Each device includes a
power-fail comparator and offers an active-low pushpull reset or an active-low open-drain reset.
The MAX16033–MAX16040 are available in 2mm x
2mm, 8-pin or 10-pin µDFN packages and are fully
specified from -40°C to +85°C.
Applications
Features
♦ Low 1.2V Operating Supply Voltage
♦ Precision Monitoring of 5.0V, 3.3V, 3.0V, and 2.5V
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
Ordering Information continued on last page.
*
These parts offer a choice of reset threshold voltages. From the
Reset Threshold Ranges table, insert the desired threshold voltage code in the blank to complete the part number. See Selector
Guide for a listing of device features.
+
Denotes a lead-free package.
T
= Tape and reel.
Pin Configurations and Typical Operating Circuit appear at
end of data sheet.
Ordering Information
Note: Replace “_” with L for push-pull or P for open-drain RESET and PFO outputs.
Selector Guide
Portable/BatteryPowered Equipment
POS Equipment
Critical µP/µC Power
Monitoring
Set-Top Boxes
Controllers
Computers
Fax Machines
Industrial Control
Real-Time Clocks
Intelligent Instrument
PART*TEMP RANGE
MAX16033LLB_ _+T-40°C to +85°C 10 µDFN-10 L1022-1
MAX16033PLB_ _+T-40°C to +85°C 10 µDFN-10 L1022-1
MAX16034LLB_ _+T-40°C to +85°C 10 µDFN-10 L1022-1
MAX16034PLB_ _+T-40°C to +85°C 10 µDFN-10 L1022-1
PINPACKAGE
PKG
CODE
PARTMRWATCHDOGBATTONRESETIN
MAX16033_✓✓✓10 µDFN-10
MAX16034_✓✓✓10 µDFN-10
MAX16035_✓✓✓10 µDFN-10
MAX16036_✓✓ ✓10 µDFN-10
MAX16037_✓✓8 µDFN-8
MAX16038_✓✓8 µDFN-8
MAX16039_✓✓8 µDFN-8
MAX16040_✓✓8 µDFN-8
CEIN/CEOU
PFI, PFOPIN-PACKAGE
MAX16033–MAX16040
Low-Power Battery Backup
Circuits in Small µDFN Packages
= 3V, RESET not asserted, TA= -40°C to +85°C, unless otherwise noted. Typical values are at TA=
+25°C.) (Note 1)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
Terminal Voltages (with respect to GND)
V
CC,
BATT, OUT .......................................................-0.3V to +6V
RESET (open drain), PFO (open drain) ....................-0.3V to +6V
threshold (V
pulses when the internal watchdog times out. RESET remains low for the reset
timeout period (t
input goes from low to high, after RESETIN goes high, or after the watchdog triggers
a reset event. The MAX160_ _L is an active-low push-pull output, while the
MAX160_ _P is an active-low open-drain output.
Chip-Enable Input. The input to the chip-enable gating circuit. Connect to GND or
OUT if not used.
Manual-Reset Input (MAX16033/MAX16037). Driving MR low asserts RESET. RESET
remains asserted as long as MR is low and for the reset timeout period (t
MR transitions from low to high. Leave unconnected, or connect to V
MR has an internal 20kΩ pullup to V
Watchdog Input (MAX16034/MAX16038). If WDI remains high or low for longer than
the watchdog timeout period (t
pulse is triggered for the reset timeout period (t
whenever RESET asserts or whenever WDI sees a rising or falling edge (Figure 2).
Battery-On Output (MAX16035/MAX16039). BATTON goes high during battery
backup mode.
Reset Input (MAX16036/MAX16040). When RESETIN falls below 1.235V, RESET
asserts. RESET remains asserted as long as RESETIN is low and for at least t
after RESETIN goes high.
), the manual-reset input is low, or RESETIN is low. It asserts low in
TH
) after VCC rises above the reset threshold, after the manual-reset
RP
is below the reset
CC
falls below 1.235V.
PFI
) after
RP
if not used.
.
CC
), the internal watchdog timer runs out and a reset
WD
). The internal watchdog clears
RP
CC
RP
Active-Low Power-Fail Output. PFO goes low when V
65PFO
76V
87OUT
98BATT
10—CEOUT
CC
stays low until V
the reset threshold voltage.
Supply Voltage, 1.2V to 5.5V
Output. OUT sources from V
V
CC
Backup Battery Input. When V
BATT if V
switches to V
slowly.
Chip-Enable Output. CEOUT goes low only when CEIN is low and reset is not
asserted. When CEOUT is disconnected from CEIN, CEOUT is actively pulled up to
OUT.
falls below 1.235V. PFO
goes above 1.235V. PFO also goes low when VCC falls below
PFI
when RESET is not asserted and from the greater of
or BATT when VCC is below the reset threshold voltage.
is 40mV greater than VCC. When VCC rises above V
BATT
. The 40mV hysteresis prevents repeated switching if VCC falls
CC
CC
falls below the reset threshold, OUT switches to
CC
PFI
BATT
, OUT
MAX16033–MAX16040
Low-Power Battery Backup
Circuits in Small µDFN Packages
shows a typical connection for the MAX16033–MAX16040. OUT powers the
static random-access memory (SRAM). If V
CC
is
greater than the reset threshold (VTH), or if VCCis lower
than VTHbut higher than V
BATT
, VCCis connected to
OUT. If V
CC
is lower than VTHand VCCis less than
V
BATT
, BATT is connected to OUT. OUT supplies up to
200mA from VCC. In battery-backup mode, an internal
MOSFET connects the backup battery to OUT. The onresistance of the MOSFET is a function of the backupbattery voltage and temperature and is shown in the
BATT-to-OUT On-Resistance vs. Temperature graph in
the
Typical Operating Characteristics
.
Chip-Enable Signal Gating
(MAX16033–MAX16036 Only)
The MAX16033–MAX16036 provide internal gating of
chip-enable (CE) signals to prevent erroneous data
from being written to CMOS RAM in the event of a
power failure or brownout condition. During normal
operation, the CE gate is enabled and passes all CE
transitions. When reset asserts, this path becomes
disabled, preventing erroneous data from corrupting
the CMOS RAM. The MAX16033–MAX16036 provide a
series transmission gate from CEIN to CEOUT. A 2ns
(typ) propagation delay from CEIN to CEOUT allows
these devices to be used with most µPs and highspeed DSPs.
When RESET is deasserted, CEIN is connected to
CEOUT through a low on-resistance transmission gate.
If CEIN is high when RESET is asserted, CEOUT
remains high regardless of any subsequent transitions
on CEIN during the reset event.
If CEIN is low when RESET is asserted, CEOUT is held
low for 1µs to allow completion of the read/write operation (Figure 1). After the 1µs delay expires, CEOUT
goes high and stays high regardless of any subsequent
transitions on CEIN during the reset event. When
CEOUT is disconnected from CEIN, CEOUT is actively
pulled up to OUT.
The propagation delay through the chip-enable circuitry depends on both the source impedance of the drive
to CEIN and the capacitive loading at CEOUT. The
chip-enable propagation delay is specified from the
50% point of CEIN to the 50% point of CEOUT, using a
50Ω driver and 50pF load capacitance. Minimize the
capacitive load at CEOUT and use a low output-impedance driver to minimize propagation delay.
In high-impedance mode, the leakage current at CEIN
is ±1µA (max) over temperature. In low-impedance
mode, the impedance of CEIN appears as a 75Ω resistor in series with the load at CEOUT.
Figure 1. RESET and Chip-Enable Timing
V
CC
V
TH
CEIN
CEOUT
RESET-TO-CEOUT DELAY
RESET
PFO
PFI > V
PFI
t
RD
t
RP
t
RD
* IF CEIN GOES HIGH BEFORE RESET ASSERTS,
CEOUT GOES HIGH WITHOUT DELAY AS CEIN GOES HIGH.
*
t
RP
MAX16033–MAX16040
Low-Power Battery Backup
Circuits in Small µDFN Packages
To preserve the contents of the RAM in a brownout or
power failure, the MAX16033–MAX16040 automatically
switch to back up the battery installed at BATT when
the following two conditions are met:
1) V
CC
falls below the reset threshold voltage.
2) VCCis below V
BATT
.
Table 1 lists the status of the inputs and outputs in battery-backup mode. The devices do not power-up if the
only voltage source is V
BATT
. OUT only powers up from
V
CC
at startup.
Manual-Reset Input
(MAX16033/MAX16037 Only)
Many µP-based products require manual-reset capability, allowing the user or external logic circuitry to initiate
a reset. For the MAX16033/MAX16037, a logic-low on
MR asserts RESET. RESET remains asserted while MR
is low and for a minimum of 140ms (tRP) after it returns
high. MR has an internal 20kΩ (min) pullup resistor to
VCC. This input can be driven from TTL/CMOS logic
outputs or with open-drain/collector outputs. Connect a
normally-open momentary switch from MR to GND to
create a manual-reset function; external debounce circuitry is not required. When driving MR from long
cables or when using the device in a noisy environment, connect a 0.1µF capacitor from MR to GND to
provide additional noise immunity.
Watchdog Input
(MAX16034/MAX16038 Only)
The watchdog monitors µP activity through the watchdog input (WDI). RESET asserts when the µP fails to
toggle WDI. Connect WDI to a bus line or µP I/O line. A
change of state (high to low, low to high, or a minimum
100ns pulse) resets the watchdog timer. If WDI remains
high or low for longer than the watchdog timeout period
(tWD), the internal watchdog timer runs out and triggers
a reset pulse for the reset timeout period (t
RP
). The
internal watchdog timer clears whenever reset is
asserted or whenever WDI sees a rising or falling edge.
If WDI remains in either a high or low state, a reset
pulse periodically asserts after every watchdog timeout
period (t
WD
); see Figure 2.
Table 1. Input and Output Status in
Battery-Backup Mode
Figure 2. MAX16034/MAX16038 Watchdog Timeout Period and
Reset Active Time
PINSTATUS
V
CC
OUTConnected to BATT
BATT
RESETAsserted
BATTONHigh state
MR, RESETIN,
CEIN, and WDI
CEOUTConnected to OUT
PFOAsserted
Disconnected from OUT
Connected to OUT. Current drawn from the
battery is less than 1µA (at V
excluding I
BATTON is a push-pull output that asserts high when in
battery-backup mode. BATTON typically sinks 3.2mA
at a 0.4V saturation voltage. In battery-backup mode,
this terminal sources approximately 10µA from OUT.
Use BATTON to indicate battery-switchover status or to
supply base drive to an external pass transistor for
higher current applications (see Figure 3).
RESETIN Comparator
(MAX16036/MAX16040 Only)
An internal 1.235V reference sets the RESETIN threshold voltage. RESET asserts when the voltage at
RESETIN is below 1.235V. Use the RESETIN function to
monitor a secondary power supply.
Use the following equations to set the reset threshold
voltage (V
RTH
) of the secondary power supply (see
Figure 4):
V
RTH
= V
REF
(R1 / R2 + 1)
where V
REF
= 1.235V. To simplify the resistor selection,
choose a value for R2 and calculate R1.
R1 = R2 [(V
RTH
/ V
REF
) - 1]
Since the input current at RESETIN is 25nA (max), large
values (up to 1MΩ) can be used for R2 with no significant loss in accuracy.
Power-Fail Comparator
The MAX16033–MAX16040 issue an interrupt (nonmaskable or regular) to the µP when a power failure occurs.
The power line is monitored by two external resistors connected to the power-fail input (PFI). When the voltage at
PFI falls below 1.235V, the power-fail output (PFO) drives
the processor’s NMI input low. An earlier power-fail warning can be generated if the unregulated DC input of the
regulator is available for monitoring. The MAX16033–
MAX16040 turn off the power-fail comparator and force
PFO low when V
CC
falls below the reset threshold volt-
age (see Figure 1). The MAX160_ _L devices provide
push-pull PFO outputs. The MAX160_ _P devices provide
open-drain PFO outputs.
Figure 3. MAX16035/MAX16039 BATTON Driving an External Pass Transistor
Figure 4. Setting RESETIN Voltage for the
MAX16036/MAX16040
V
CC
V
IN
R1
R2
MAX16036
MAX16040
RESETIN
2.4V TO 5.5V
0.1µF
V
BATTON
CC
BATT
MAX16035
MAX16039
GND
( ) FOR MAX16035 ONLY
OUT
(CEOUT)
(CEIN)
RESET
CE
ADDRESS
DECODE
CMOS RAM
A0–A15
µP
RESET
MAX16033–MAX16040
Low-Power Battery Backup
Circuits in Small µDFN Packages
A µP’s reset input puts the µP in a known state. The
MAX16033–MAX16040 µP supervisory circuits assert a
reset to prevent code-execution errors during powerup, power-down, and brownout conditions. RESET
asserts when V
CC
is below the reset threshold voltage
and for at least 140ms (tRP) after VCCrises above the
reset threshold. RESET also asserts when MR is low
(MAX16033/MAX16037) or when RESETIN is below
1.235V (MAX16036/MAX16040). The MAX16034/
MAX16038 watchdog function causes RESET to assert in
pulses following a watchdog timeout (Figure 2). The
MAX160_ _L devices provide push-pull RESET outputs.
The MAX160_ _P devices provide open-drain RESET
outputs.
Applications Information
Operation Without a Backup Power Source
The MAX16033–MAX16040 provide a battery backup
function. If a backup power source is not used, connect
BATT to GND and OUT to V
CC
.
Using a Super Cap as a
Backup Power Source
Super caps are capacitors with extremely high capacitance, such as 0.47F. Figure 5 shows two methods to
use a super cap as a backup power source. Connect
the super cap through a diode to the 3V input (Figure
5a) or connect the super cap through a diode to 5V
(Figure 5b) if a 5V supply is available. The 5V supply
charges the super cap to a voltage close to 5V, allowing a longer backup period. Since V
BATT
can be higher
than V
CC
while VCCis above the reset threshold voltage, there are no special precautions required when
using these µP supervisors with a super cap.
One way to help the watchdog timer to monitor software execution more closely is to set and reset the
watchdog at different points in the program, rather than
pulsing the watchdog input periodically. Figure 6
shows a flow diagram where the I/O driving the watchdog is set low in the beginning of the program, set high
at the beginning of every subroutine or loop, and set
low again when the program returns to the beginning. If
the program should hang in any subroutine, the watchdog would timeout and reset the µP.
Replacing the Backup Battery
Decouple BATT to GND with a 0.1µF capacitor. The
backup power source may be removed while V
CC
remains valid without the danger of triggering a reset
pulse. The device does not enter battery-backup mode
when VCCstays above the reset threshold voltage.
Power-Fail Comparator
Monitoring an Additional Power Supply
Monitor another voltage by connecting a resistive divider
to PFI as shown in Figure 7. The threshold voltage is:
V
TH(PFI)
= 1.235 (R1 / R2 + 1)
where V
TH(PFI)
is the threshold at which the monitored
voltage will trip PFO.
To simplify the resistor selection, choose a value for R2
and calculate R1.
R1 = R2 [(V
TH(PFI)
/ 1.235) - 1]
Connect PFO to MR in applications that require RESET to
assert when the second voltage falls below its threshold.
RESET remains asserted as long as PFO holds MR low,
and for 140ms (min) after PFO goes high.
Adding Hysteresis to the Power-Fail Comparator
The power-fail comparator provides a typical hysteresis
of 12mV, which is sufficient for most applications where
a power-supply line is being monitored through an
external voltage-divider. Connect a voltage-divider
between PFI and PFO as shown in Figure 8a to provide
additional noise immunity. Select the ratio of R1 and R2
such that V
PFI
falls to 1.235V when VINdrops to its trip
point, V
TRIP
. R3 adds hysteresis and is typically more
than 10 times the value of R1 or R2. The hysteresis window extends above (VH) and below (VL) the original trip
point, V
TRIP
. Connecting an ordinary signal diode in
series with R3 as shown in Figure 8b causes the lower
trip point (VL) to coincide with the trip point without hysteresis (V
TRIP
). This method provides additional noise
margin without compromising the accuracy of the
power-fail threshold when the monitored voltage is
falling. Set the current through R1 and R2 to be at least
10µA to ensure that the 100nA (max) PFI input current
does not shift the trip point. Set R3 to be higher than
10kΩ to reduce the load at PFO. Capacitor C1 adds
additional noise rejection.
START
Figure 6. Watchdog Flow Diagram
Figure 7. Monitoring an Additional Power Supply
V
CC
SET
WDI
LOW
SUBROUTINE
OR PROGRAM LOOP
SET
WDI HIGH
RETURN
END
V
CC
MAX16033–
V+
R1
R2
MAX16040
PFI
RESETTO µP
MR
PFO
GND
MAX16033–MAX16040
Low-Power Battery Backup
Circuits in Small µDFN Packages
Figure 8. (a) Adding Additional Hysteresis to the Power-Fail Comparator. (b) Shifting the Additional Hysteresis above V
TRIP
(a)(b)
V
IN
R1
R2
PFO
0V
VV
=+
TRIPPFT
( )
VV V
=+ ++
HPFTPFH
VV
=++
LPFTCC
.
VV
=
PFT
VmV
PFH
1 235
=
12
R3R3
C1C1
TO µP
V
L
V
TRIP
R
⎛
⎜
⎝
⎛
1
⎜
⎝
1
1
R
2
⎛
⎜
⎝
R
1
R
2
V
CC
MAX16033–
MAX16040
PFI
PFO (PUSH-PULL)
GND
V
H
⎞
⎟
⎠
R
1
1
R
2
R
1
⎞
−
⎟
⎠
R
3
V
IN
R
1
⎞
⎟
⎠
R
3
R
1
V
R
3
V
CC
V
IN
MAX16033–
PFI
PFO (PUSH-PULL)
⎞
⎟
⎠
R
1
1
R
2
MAX16040
GND
V
H
R
R
V
R
1
3
1
⎞
−
⎟
⎠
R
3
R1
R2
TO µP
PFO
0V
VV
=+
TRIPPFT
( )
VV V
=+ ++
HPFTPFHD
VV
=
LTRIP
.
VV
=
PFT
VmV
PFH
VDIODE FORWARD VOLTAGE
D
1 235
=
12
=
V
TRIP
R
⎛
⎜
⎝
1
1
R
2
⎛
⎜
⎝
IN
V
Monitoring a Negative Voltage
Connect the circuit as shown in Figure 9 to use the
power-fail comparator to monitor a negative supply rail.
PFO stays low when V- is good. When V- rises to cause
PFI to be above +1.235V, PFO goes high. Ensure V
CC
comes up before the negative supply.
Negative-Going V
CC
Transients
The MAX16033–MAX16040 are relatively immune to
short-duration, negative-going VCCtransients.
Resetting the µP when VCCexperiences only small
glitches is not usually desired.
The
Typical Operating Characteristics
section contains
a Maximum Transient Duration vs. Reset Threshold
Overdrive graph. The graph shows the maximum pulse
width of a negative-going VCCtransient that would not
trigger a reset pulse. As the amplitude of the transient
increases (i.e., goes further below the reset threshold
voltage), the maximum allowable pulse width decreases. Typically, a VCCtransient that goes 100mV below
the reset threshold and lasts for 25µs does not trigger a
reset pulse.
A 0.1µF bypass capacitor mounted close to VCCprovides additional transient immunity.
Note: 48 standard versions shown in bold are available. Sample stock is generally held on standard versions only. Contact factory for
nonstandard versions availability.
These parts offer a choice of reset threshold voltages. From the
Reset Threshold Ranges table, insert the desired threshold voltage code in the blank to complete the part number. See Selector
Guide for a listing of device features.
+
Denotes a lead-free package.
T
= Tape and reel.
Ordering Information (continued)
Reset Threshold Ranges
PART*TEMP RANGE
MAX16035LLB_ _+T-40°C to +85°C 10 µDFN-10 L1022-1
MAX16035PLB_ _+T-40°C to +85°C 10 µDFN-10 L1022-1
MAX16036LLB_ _+T-40°C to +85°C 10 µDFN-10 L1022-1
MAX16036PLB_ _+T-40°C to +85°C 10 µDFN-10 L1022-1
MAX16037LLA_ _+T-40°C to +85°C 8 µDFN-8L822-1
MAX16037PLA_ _+T-40°C to +85°C 8 µDFN-8L822-1
MAX16038LLA_ _+T-40°C to +85°C 8 µDFN-8L822-1
MAX16038PLA_ _+T-40°C to +85°C 8 µDFN-8L822-1
MAX16039LLA_ _+T-40°C to +85°C 8 µDFN-8L822-1
MAX16039PLA_ _+T-40°C to +85°C 8 µDFN-8L822-1
MAX16040LLA_ _+T-40°C to +85°C 8 µDFN-8L822-1
MAX16040PLA_ _+T-40°C to +85°C 8 µDFN-8L822-1
PINPACKAGE
PKG
CODE
SUFFIX
464.504.634.75
444.254.384.50
313.003.083.15
292.852.933.00
262.552.632.70
232.252.322.38
RESET THRESHOLD VOLTAGE (V)
MINTYPMAX
MAX16033–MAX16040
Low-Power Battery Backup
Circuits in Small µDFN Packages
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,
go to www.maxim-ic.com/packages
.)
D
XXXX
XXXX
SAMPLE
MARKING
7
E
XXXX
PIN 1
INDEX AREA
A
A1
A
L
b
A2
L
e
C
L
e
EVEN TERMINAL
A A
(N/2 -1) x e)
b
N
1
C
L
e
ODD TERMINAL
SOLDER
MASK
COVERAGE
PIN 1
0.10x45∞
L1
6, 8, 10L UDFN.EPS
L
PACKAGE OUTLINE,
6, 8, 10L uDFN, 2x2x0.80 mm
-DRAWING NOT TO SCALE-
21-0164
1
A
2
MAX16033–MAX16040
Low-Power Battery Backup
Circuits in Small µDFN Packages
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,
go to www.maxim-ic.com/packages
.)
COMMON DIMENSIONS
SYMBOLMIN.NOM.
A
A1
A2
D1.952.00
E
L
L1
PACKAGE VARIATIONS
PKG. CODENeb
0.700.75
0.150.200.25
0.0200.0250.035
1.952.00
0.300.40
MAX.
0.80
2.05
-
2.05
0.50
0.10 REF.
6L622-10.65 BSC0.30±0.05
0.25±0.050.50 BSC8L822-1
0.20±0.030.40 BSC10L1022-1
(N/2 -1) x e
1.30 REF.
1.50 REF.
1.60 REF.
PACKAGE OUTLINE,
6, 8, 10L uDFN, 2x2x0.80 mm
-DRAWING NOT TO SCALE-
21-0164
2
A
2
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