The MAX1566/MAX1567 provide a complete powersupply solution for digital cameras. They improve performance, component count, and size compared to conventional multichannel controllers in 2-cell AA,
1-cell lithium-ion (Li+), and dual-battery designs. On-chip
MOSFETs provide up to 95% efficiency for critical power
supplies, while additional channels operate with external
FETs for optimum design flexibility. This optimizes overall
efficiency and cost, while also reducing board space.
The MAX1566/MAX1567 include six high-efficiency DCto-DC conversion channels:
• Step-up DC-to-DC converter with on-chip power FETs
• Main DC-to-DC converter with on-chip FETs, configurable to step either up or down
• Step-down core DC-to-DC converter with on-chip
FETs
• DC-to-DC controller for white LEDs or other output
• Extra DC-to-DC controller (typically for LCD); two
extra controllers on the MAX1566
• Transformerless inverting DC-to-DC controller (typically for negative CCD bias) on the MAX1567
All DC-to-DC channels operate at one fixed frequency
settable from 100kHz to 1MHz to optimize size, cost, and
efficiency. Other features include soft-start, power-OK
outputs, and overload protection. The MAX1566/
MAX1567 are available in space-saving 40-pin thin QFN
packages. An evaluation kit is available to expedite
designs.
Applications
Digital Cameras
PDAs
Features
♦ 95% Efficient Step-Up DC-to-DC Converter
♦ 0.7V Minimum Input Voltage
♦ Main DC-to-DC Configurable as Either Step-Up or
Step-Down
♦ Combine Step-Up and Step-Down for 90%
Efficient Boost-Buck
♦ 95% Efficient Step-Down for DSP Core
♦ Regulate LED Current for Four, Six, or More LEDs
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
PV, PVSU, SDOK, AUX1OK, SCF, ON_, FB_,
SUSD to GND ....................................................... -0.3V to +6V
PG_ to GND...........................................................-0.3V to +0.3V
DL1, DL3, INDL2, PVM, PVSD to GND …-0.3V to (PVSU + 0.3V)
DL2 to GND ............................................-0.3V to (INDL2 + 0.3V)
LXSU Current (Note 1) ..........................................................3.6A
LXM Current (Note 1) ............................................................3.6A
LXSD Current (Note 1) ........................................................2.25A
REF, OSC, CC_ to GND...........................-0.3V to (PVSU + 0.3V)
= 3.6V, TA= 0°C to +85°C, unless otherwise noted.)
Idle Mode is a trademark of Maxim Integrated Products, Inc.
PARAMETERCONDITIONSMINTYPMAXUNITS
STEP-UP DC-TO-DCStep-Up Startup-to-Normal
Operating Threshold
Step-Up Startup-to-Normal
Operating Threshold Hysteresis
Rising edge or falling edge (Note 4)2.302.52.65V
80mV
Step-Up Voltage Adjust Range3.05.5VStart Delay of ONSD, ONM,
ON1, ON2, and ON3 after
SU in Regulation
1024
OSC
cycles
FBSU Regulation Voltage1.2311.251.269VFBS U to C C S U Tr anscond uctanceFBSU = CCSU80135185µSFBSU Input Leakage CurrentFBSU = 1.25V-1000.01+100nAIdle Mode
Current-Sense Amplifier
Transresistance
TM
Trip Level 150 mA
0.275V/A
Step-Up Maximum Duty CycleFBSU = 1V808590%PVSU Leakage CurrentVLXSU Leakage CurrentV
Switch On-Resistance
= 0V, PVSU = 3.6V 0.1 5 µA
LX
LX
= V
OUT
= 3.6V
0.15µAN channel95150P channel150250
mΩ
N-Channel Current Limit1.82.12.4AP-Channel Turn-Off Current20mAStartup Current LimitPVSU = 1.8V (Note 5)450mAStartup t
= 3.6V, TA= -40°C to +85°C, unless otherwise noted.)
Note 2: The MAX1566/MAX1567 are powered from the step-up output (PVSU). An internal low-voltage startup oscillator drives the
step-up starting at approximately 0.9V until PVSU reaches approximately 2.5V. When PVSU reaches 2.5V, the main control
circuitry takes over. Once the step-up is up and running, it can maintain operation with very low input voltages; however,
output current is limited.
Note 3: Since the device is powered from PVSU, a Schottky rectifier, connected from the battery to PVSU, is required for low-voltage
startup.
Note 4: The step-up regulator is in startup mode until this voltage is reached. Do not apply full load current during startup. A power-
OK output can be used with an external PFET to gate the load until the step-up is in regulation. See the
AUX1OK, SDOK
,
and SCF Connections section.
Note 5: The step-up current limit in startup refers to the LXSU switch current limit, not the output current limit.
Note 6: If the main converter is configured as a step-up (SUSD = PVSU), the P-channel synchronous rectifier is disabled until the
2.5V normal operation threshold has been exceeded. If the main converter is configured as a step-down (SUSD = GND), all
step-down operation is locked out until the normal operation threshold has been exceeded. When the main is configured as
a step-down, operation in dropout (100% duty cycle) can only be maintained for 100,000 OSC cycles before the output is
considered faulted, triggering global shutdown.
Note 7: Operation in dropout (100% duty cycle) can only be maintained for 100,000 OSC cycles before the output is considered
faulted, triggering global shutdown.
Note 8: ONM, ONSD, ON1, ON2, and ON3 are disabled until 1024 OSC cycles after PVSU reaches 2.7V.
PARAMETERCONDITIONSMINMAXUNITSAUX3 FBL or FBH to CC
Transconductance
FB_ Input Leakage Current-100+100nADL_ Driver ResistanceOutput high or low7ΩAUX1OK Output Low0.1mA into AUX1OK0.1VAUX1OK Leakage CurrentONSU = GND1µAOVERLOAD PROTECTIONSCF Leakage CurrentONSU = PVSU, FBSU = 1.5V1µASCF Output Low Voltage0.1mA into SCF0.1VLOGIC INPUTS (ON_, SUSD)
AUX3 Controller Voltage Feedback Input. Connect a resistive voltage-divider from the step-up
1FB3H
converter output to FBH to set the output voltage. The feedback threshold is 1.25V. This pin is high
impedance in shutdown. FB3H can provide conventional voltage feedback (with FB3L grounded) or
open-LED protection in white LED drive circuits.
AUX1 Controller Compensation Node. Connect a series resistor-capacitor from this pin to GND to
2CC1
3FB1
4ON1
compensate the converter control loop. This pin is actively driven to GND in shutdown, overload, and
thermal limit. See the AUX Compensation section.
AUX1 Controller Feedback Input. The feedback threshold is 1.25V. This pin is high impedance in
shutdown.
AUX1 Controller On/Off Input. Logic high = on; however, turn-on is locked out until 1024 OSC cycles
after the step-up has reached regulation. This pin has an internal 330kΩ pulldown resistance to GND.
5PGSDPower Ground. Connect all PG_ pins to GND with short wide traces as close to the IC as possible.
6LXSD
7PVSD
Step-Down Converter Switching Node. Connect to the inductor of the step-down converter. LXSD is
high impedance in shutdown.
Step-Down Converter Input. Bypass to GND with a 1µF ceramic capacitor. The step-down efficiency
is measured from this input.
Step-Down Converter On/Off Control Input. Logic high = on; however, turn-on is locked out until 1024
8ONSD
9FBSD
OSC cycles after the step-up has reached regulation. This pin has an internal 330kΩ pulldown
resistance to GND.
Step-Down Converter Feedback Input. The feedback threshold is 1.25V. This pin is high impedance
in shutdown.
Step-Down Converter Compensation Node. Connect a series resistor-capacitor from this pin to GND
10CCSD
for compensating the converter control loop. This pin is actively driven to GND in shutdown, overload,
and thermal limit. See the Step-Down Compensation section.
Configures the Main Converter as a Step-Up or a Step-Down. This function must be hardwired. On-
11SUSD
the-fly changes are not allowed. With SUSD connected to PV, the main is configured as a step-up
and PVM is the converter output. With SUSD connected to GND, the main is configured as a stepdown and PVM is the power input.
Main Converter Compensation Node. Connect a series resistor-capacitor from this pin to GND for
12CCM
13FBM
compensating the converter control loop. This pin is actively driven to GND in shutdown, overload,
and thermal limit. See the Step-Up Compensation section when the main is used in step-up mode
and the Step-Down Compensation section when the main is used in step-down mode.
Main Converter Feedback Input. The feedback threshold is 1.25V. This pin is high impedance in
shutdown. The main output voltage must not be set higher than the step-up output.
On/Off Control for the Main DC-to-DC Converter. Logic high = on; however, turn-on is locked out until
14ONM
15REF
1024 OSC cycles after the step-up has reached regulation. This pin has an internal 330kΩ pulldown
resistance to GND. SUSD pin configures the main converter as a step-up or step-down.
Reference Output. Bypass REF to GND with a 0.1µF or greater capacitor. The maximum-allowed REF
load is 200µA. REF is actively pulled to GND when the step-up is shut down (all converters turn off).
Step-Up Converter Compensation Node. Connect a series resistor-capacitor from this pin to GND for
16CCSU
17FBSU
18ONSU
19SCF
20AUX1OK
21SDOK
22OSC
23PGSUPower Ground. Connect all PG_ pins to GND with short wide traces as close to the IC as possible.
24LXSU
25PVSU
26PGMPower Ground. Connect all PG_ pins to GND with short wide traces as close to the IC as possible.
27LXM
28PVM
29ON2
30CC2
compensating the converter control loop. This pin is actively driven to GND in shutdown, overload,
and thermal limit. See the Step-Up Compensation section.
Step-Up Converter Feedback Input. The feedback threshold is 1.25V. This pin is high impedance in
shutdown.
Step-Up Converter On/Off Control. Logic high = on. All other ON_ pins are locked out until 1024 OSC
cycles after the step-up DC-to-DC converter output has reached its final value. This pin has an
internal 330kΩ pulldown resistance to GND.
Open-Drain, Active-Low, Short-Circuit Flag Output. SCF goes open when overload protection occurs
and during startup. SCF can drive high-side PFET switches connected to one or more outputs to
completely disconnect the load when the channel turns off in response to a logic command or an
overload. See the Status Outputs (
SDOK, AUX1OK
, SCF) section.
Open-Drain, Active-Low, Power-OK Signal for AUX1 Controller. AUX1OK goes low when the AUX1
controller has successfully completed soft-start. AUX1OK goes high impedance in shutdown,
overload, and thermal limit.
Open-Drain, Active-Low, Power-OK Signal for Step-Down Converter. SDOK goes low when the step-
down has successfully completed soft-start. SDOK goes high impedance in shutdown, overload, and
thermal limit.
Oscillator Control. Connect a timing capacitor from OSC to GND and a timing resistor from OSC to
PVSU (or other DC voltage) to set the oscillator frequency between 100kHz and 1MHz. See the
Setting the Switching Frequency section. This pin is high impedance in shutdown.
Step-Up Converter Switching Node. Connect to the inductor of the step-up converter. LXSU is high
impedance in shutdown.
Power Output of the Step-Up DC-to-DC Converter. PVSU can also power other converter channels.
Connect PVSU and PV together.
Main Converter Switching Node. Connect to the inductor of the main converter (can be configured as
a step-up or step-down by SUSD). LXM is high impedance in shutdown.
When SUSD = PVSU, the main converter is configured as a step-up and PVM is the main output.
When SUSD = GND, the main is configured as a step-down and PVM is the power input.
AUX2 Controller On/Off Input. Logic high = on; however, turn-on is locked out until 1024 OSC cycles
after the step-up has reached regulation. This pin has an internal 330kΩ pulldown resistance to GND.
AUX2 Controller Compensation Node. Connect a series resistor-capacitor from this pin to GND to
compensate the converter control loop. This pin is actively driven to GND in shutdown, overload, and
thermal limit. See the AUX Compensation section.
MAX1566/MAX1567
Six-Channel, High-Efficiency, Digital
Camera Power Supplies
Feedback Input. This
pin is high impedance
in shutdown.
Voltage Input for AUX2
32INDL2
Gate Driver. The voltage
at INDL2 sets the high
gate-drive voltage.
33GNDAnalog Ground. Connect to all PG_ pins as close to the IC as possible.
AUX2 Controller Gate-
34DL2
Drive Output. DL2
drives between INDL2
and GND.
AUX3 Controller Gate-Drive Output. Connect to the gate of an N-channel MOSFET. DL3 drives
35DL3
between GND and PVSU and supplies up to 500mA. This pin is actively driven to GND in shutdown,
overload, and thermal limit.
AUX1 Controller Gate-Drive Output. Connect to the gate of an N-channel MOSFET. DL1 drives
36DL1
between GND and PVSU and supplies up to 500mA. This pin is actively driven to GND in shutdown,
overload, and thermal limit.
37PVIC Power Input. Connect PVSU and PV together.
AUX3 Controller Compensation Node. Connect a series resistor-capacitor from this pin to GND for
38CC3
compensating the converter control loop. This pin is actively driven to GND in shutdown, overload,
and thermal limit. See the AUX Compensation section.
MAX1566 (AUX2 is configured as a boost): FB2 feedback threshold is
1.25V.
MAX1567 (AUX2 is configured as an inverter): FB2 feedback threshold is
0V.
MAX1566 (AUX2 is configured as a boost): connect INDL2 to PVSU for
optimum N-channel gate drive.
MAX1567 (AUX2 is configured as an inverter): connect INDL2 to the
external P-channel MOSFET source to ensure the P channel is completely
off when DL2 swings high.
The MAX1566 configures DL2 to drive an N-channel FET in a boost
configuration. DL2 is driven low in shutdown, overload, and thermal limit.
The MAX1567 configures DL2 to drive a PFET in an inverter configuration.
DL2 is driven high in shutdown, overload, and thermal limit.
AUX3 Controller Current-Feedback Input. Connect a resistor from FB3L to GND to set LED current in
39FB3L
40ON3
LED boost-drive circuits. The feedback threshold is 0.2V. Connect this pin to GND if using only the
FB3H feedback. This pin is high impedance in shutdown.
AUX3 Controller On/Off Input. Logic high = on; however, turn-on is locked out until 1024 OSC cycles
after the step-up has reached regulation. This pin has an internal 330kΩ pulldown resistance to GND.
Exposed Metal Pad. This pad is connected to ground. Note this internal connection is a soft-connect,
meaning there is no internal metal or bond wire physically connecting the exposed pad to the GND
PadEP
pin. The connection is through the silicon substrate of the die and then through a conductive epoxy.
Connecting the exposed pad to ground does not remove the requirement for a good ground
connection to the appropriate pins.
The MAX1566/MAX1567 include the following blocks to
build a multiple-output digital camera power-supply
system. Both devices can accept inputs from a variety
of sources including 1-cell Li+ batteries, 2-cell alkaline
or NiMH batteries, and even systems designed to
accept both battery types. The MAX1566/
MAX1567 include six DC-to-DC converter channels to
generate all required voltages:
• Step-up DC-to-DC converter (_SU pins) with on-chip
power FETS
• Main DC-to-DC converter (_M pins) with on-chip
power FETS that can be configured as either a stepup or step-down DC-to-DC converter
• Step-down core DC-to-DC converter with on-chip
MOSFETs (_SD pins)
• AUX1 DC-to-DC controller for boost and flyback
converters
• AUX2 DC-to-DC controller for boost and flyback
converters (MAX1566)
• AUX2 DC-to-DC controller for inverting DC-to-DC
converters (MAX1567)
• AUX3 DC-to-DC controller for white LED as well as
conventional boost applications; includes open LED
overvoltage protection
Step-Up DC-to-DC Converter
The step-up DC-to-DC switching converter typically is
used to generate a 5V output voltage from a 1.5V to
4.5V battery input, but any voltage from VINto 5V can
be set. An internal NFET switch and external synchronous rectifier allow conversion efficiencies as high as
95%. Under moderate to heavy loading, the converter
operates in a low-noise PWM mode with constant
frequency and modulated pulse width. Switching
harmonics generated by fixed-frequency operation are
consistent and easily filtered. Efficiency is enhanced
under light (<75mA typ) loading by an Idle Mode that
switches the step-up only as needed to service the
load. In this mode, the maximum inductor current is
150mA for each pulse.
Main DC-to-DC Converter (Step-Up or
Step-Down)
The main converter can be configured as a step-up
(Figure 2) or a step-down converter (Figure 1) with the
SUSD pin. The main DC-to-DC converter is typically
used to generate 3.3V, but any voltage from 2.7V to 5V
can be set; however, the main output must not be set
higher than the step-up output (PVSU).
An internal MOSFET switch and synchronous rectifier
allow conversion efficiencies as high as 95%. Under
moderate to heavy loading, the converter operates in a
low-noise PWM mode with constant frequency and
modulated pulse width. Switching harmonics generated
by fixed-frequency operation are consistent and easily
filtered. Efficiency is enhanced under light loading
(<150mA typical for step-up mode, <100mA typical for
step-down mode) by assuming an Idle Mode during
which the converter switches only as needed to service
the load.
Step-down operation can be direct from a Li+ cell if the
minimum input voltage exceeds the desired output by
approximately 200mV. Note that if the main DC-to-DC,
operating as a step-down, operates in dropout, the
overload protection circuit senses an out-of-regulation
condition and turns off all channels.
Li+ to 3.3V Boost-Buck Operation
When generating 3.3V from an Li+ cell, boost-buck
operation may be needed so a regulated output can be
maintained for input voltages above and below 3.3V. In
that case, it may be best to configure the main converter as a step-down (SUSD = GND) and to connect its
input, PVM, to the step-up output (PVSU), set to a voltage at or above 4.2V (Figures 1 and 3). The compound
efficiency with this connection is typically up to 90%.
This connection is also suitable for designs that must
operate from both 1-cell Li+ and 2 AA cells.
Note that the step-up output supplies both the step-up
load and the main step-down input current when the
main is powered from the step-up. The main input current reduces the available step-up output current for
other loads.
2 AA to 3.3V Operation
In designs that operate only from 2 AA cells, the main
DC-to-DC can be configured as a boost converter (SUSD
= PVM) to maximize the 3.3V efficiency (Figure 2).
MAX1566/MAX1567
Six-Channel, High-Efficiency, Digital
Camera Power Supplies
Figure 1. Typical 1-Cell Li+ Powered System (3.3V logic is stepped down from +5V, and 1.8V core is stepped down directly from the
battery. Alternate connections are shown in the following figures.)
Figure 3. Li+ or Multibattery Input (This power supply accepts inputs from 1.5V to 4.2V, so it can operate from either 2 AA cells or 1
Li+ cell. The 3.3V logic supply and the 1.8V core supply are both stepped down from 5V for true boost-buck operation.)
The step-down DC-to-DC is optimized for generating low
output voltages (down to 1.25V) at high efficiency. The
step-down runs from the voltage at PVSD. This pin can
be connected directly to the battery if sufficient headroom exists to avoid dropout; otherwise, PVSD can be
powered from the output of another converter. The stepdown can also operate with the step-up, or the main converter in step-up mode, for boost-buck operation.
Under moderate to heavy loading, the converter operates in a low-noise PWM mode with constant frequency
and modulated pulse width. Efficiency is enhanced
under light (<75mA typ) loading by assuming an Idle
Mode during which the step-down switches only as
needed to service the load. In this mode, the maximum
inductor current is 100mA for each pulse. The stepdown DC-to-DC is inactive until the step-up DC-to-DC
is in regulation.
The step-down also features an open-drain SDOK out-
put that goes low when the step-down output is in regulation. SDOK can be used to drive an external MOSFET
switch that gates 3.3V power to the processor after the
core voltage is in regulation. This connection is shown
in Figure 15.
AUX1, AUX2, and AUX3 DC-to-DC
Controllers
The three auxiliary controllers operate as fixed-frequency voltage-mode PWM controllers. They do not have
internal MOSFETs, so output power is determined by
external components. The controllers regulate output
voltage by modulating the pulse width of the DL_ drive
signal to an external MOSFET switch.
On the MAX1566, AUX1 and AUX2 are boost/flyback
PWM controllers. On the MAX1567, AUX1 is a boost/flyback PWM controller, but AUX2 is an inverting PWM
controller. On both devices, AUX3 is a boost/flyback
controller that can be connected to regulate output voltage and/or current (for white-LED drive).
Figure 5 shows a functional diagram of an AUX boost
controller channel. A sawtooth oscillator signal at OSC
governs timing. At the start of each cycle, DL_ goes high,
turning on the external NFET switch. The switch then
turns off when the internally level-shifted sawtooth rises
above CC_ or when the maximum duty cycle is exceeded. The switch remains off until the start of the next cycle.
A transconductance error amplifier forms an integrator at
CC_ to maintain high DC loop gain and accuracy.
The auxiliary controllers do not start until 1024 OSC
cycles after the step-up DC-to-DC output is in regulation. If the auxiliary controller remains faulted for
100,000 OSC cycles (200ms at 500kHz), then all
MAX1566/MAX1567 channels latch off.
Maximum Duty Cycle
The AUX PWM controllers have a guaranteed maximum
duty cycle of 80%: all controllers can achieve at least
80% and typically reach 85%. In boost designs that
employ continuous current, the maximum duty cycle
limits the boost ratio so:
1 - VIN/ V
OUT
< 80%
With discontinuous inductor current, no such limit exists
for the input/output ratio since the inductor has time to
fully discharge before the next cycle begins.
AUX1
AUX1 can be used for conventional DC-to-DC boost
and flyback designs (Figures 8 and 9). Its output (DL1)
is designed to drive an N-channel MOSFET. Its feedback (FB1) threshold is 1.25V.
AUX2
In the MAX1566, AUX2 is identical to AUX1. In the
MAX1567, AUX2 is an inverting controller that generates a regulated negative output voltage, typically for
CCD and LCD bias. This is useful in height-limited
designs where transformers may not be desired.
The AUX2 MOSFET driver (DL2) in the MAX1567 is
designed to drive P-channel MOSFETs. INDL2 biases
the driver so V
INDL2
is the high output level of DL2.
INDL2 should be connected to the P-channel MOSFET
source to ensure the MOSFET turns completely off when
DL2 is high. See Figure 10 for a typical inverter circuit.
AUX3 DC-to-DC Controller, LED Driver
The AUX3 step-up DC-to-DC controller has two feedback inputs, FB3L and FB3H, with feedback thresholds
of 0.2V (FB3L) and 1.25V (FB3H). If used as a conventional voltage-output step-up, FB3L is grounded and
FB3H is used as the feedback input. In that case, AUX3
behaves exactly like AUX1.
If AUX3 is used as a switch-mode boost current source
for white LEDs, FB3L provides current-sensing feedback, while FB3H provides (optional) open-LED overvoltage protection (Figure 7).
The MAX1566/MAX1567 support MAX1801 slave PWM
controllers that obtain input power, a voltage reference,
and an oscillator signal directly from the MAX1566/
MAX1567 master. The master-slave configuration allows
channels to be easily added and minimizes system cost
by eliminating redundant circuitry. The slaves also control the harmonic content of noise because their operating frequency is synchronized to that of the MAX1566/
MAX1567 master converter. A MAX1801 connection to
the MAX1566/MAX1567 is shown in Figure 14.
Status Outputs (
SDOK, AUX1OK
, SCF)
The MAX1566/MAX1567 include three versatile status
outputs that can provide information to the system. All
are open-drain outputs and can directly drive MOSFET
switches to facilitate sequencing, disconnect loads
during overloads, or perform other hardware-based
functions.
Figure 6. Oscillator Functional Diagram
Figure 7. LED drive with open LED overvoltage protection is
provided by the additional feedback input to AUX3, FB3H.
Figure 8. +15V LCD Bias with Basic Boost Topology
Figure 9. +15V and -7.5V CCD Bias with Transformer
V
SU
R
OSC
OSC
V
C
OSC
TO
V
BATT
(1.25V)
REF
150ns
ONE-SHOT
MAX1566
MAX1567
MAX1566
MAX1567
(PARTIAL)
PVSU
DL3
D2–D5
LEDS
R1
R2
FB3H
(1.25V)
FB3L
(0.2V)
AUX3
PWM
MAX1566
MAX1567
(PARTIAL)
AUX
PWM
NOTE: THIS CIRCUIT CAN OPERATE WITH AUX1, AUX2,
OR AUX3 ON THE MAX1566, AND WITH AUX1 OR AUX3 ON
THE MAX1567. TO USE AUX3, FB3L = GND, AND
FB3H IS USED FOR FEEDBACK.
MAX1566
MAX1567
(PARTIAL)
AUX
PWM
PVSU
PVSU
DL_
FB_
TO
V
BATT
+15V
50mA
D6
Q1
DL_
FB_
TO
V
BATT
Q1
D2
LCD
+15V
50mA
CCD+
-7.5V
30mA
CCD-
NOTE: THIS CIRCUIT CAN OPERATE WITH AUX1, AUX2,
R3
NOTE: IF OPEN LED PROTECTION IS NOT
REQUIRED, REMOVE R2 AND R3 AND GROUND FB3H.
OR AUX3 ON THE MAX1566, AND WITH AUX1 OR AUX3 ON
THE MAX1567. TO USE AUX3, FB3L = GND, AND
FB3H IS USED FOR FEEDBACK.
SDOK pulls low when the step-down has successfully
completed soft-start. SDOK goes high impedance in
shutdown, overload, and thermal limit. A typical use for
SDOK is to drive a P-channel MOSFET that connects
3.3V power to the CPU I/O after the CPU core is powered up (Figure 15), thus providing safe sequencing in
hardware without system intervention.
AAUUXX11OOKK
pulls low when the AUX1 controller has suc-
cessfully completed soft-start. AUX1OK goes high
impedance in shutdown, overload, and thermal limit. A
typical use for AUX1OK is to drive a P-channel MOSFET
that connects 5V power to the CCD after the 15V CCD
bias (generated by AUX1) is powered up (Figure 16).
SCF goes high (high impedance, open drain) when
overload protection occurs. Under normal operation,
SCF pulls low. SCF can drive a high-side P-channel
MOSFET switch that can disconnect a load during
power-up or when a channel turns off in response to a
logic command or an overload. Several connections
are possible for SCF. One is shown in Figure 17 where
SCF provides load disconnect for the step-up on fault
and power-up.
Figure 10. Regulated -7.5V Negative CCD (Bias is provided by
conventional inverter (works only with the MAX1567).)
Figure 11. ±15V Output Using an AUX-Driven Boost with
Charge-Pump Inversion
Figure 12. +15V and -7.5V CCD Bias Without Transformer
Using Boost with a Diode-Capacitor Charge Pump (A positiveoutput linear regulator (MAX1616) can be used to regulate the
negative output of the charge pump.)
MAX1567
(PARTIAL)
INDL2
DL2
AUX2
INVERTING
PWM
FB2
REF
L1
TO V
BATT
AUX_
PWM
PVSU
10µH
1µF
FB_
DL_
MAX1566
MAX1567
(PARTIAL)
TO V
BATT
-7.5V
100mA
R
TOP
R
REF
D2
C2
1µF
1µF
C1
D1
Q1
R1
1MΩ
90.9kΩ
D3
V
OUT+
+15V
20mA
R2
V
OUT-
-15V
C3
10mA
1µF
TO V
BATT
AUX_
PWM
FB_
PVSU
DL_
MAX1566/MAX1567
(PARTIAL)
SHDNIN
GND
OUT
+1.25V
FB_
MAX1616
NOTE: THIS CIRCUIT CAN OPERATE WITH AUX1, AUX2, OR AUX3 ON THE MAX1566,
AND WITH AUX1 OR AUX3 ON THE MAX1567. TO USE AUX3, FB3L = GND,
AND FB3H IS USED FOR FEEDBACK.
+15V
20mA
-7.5V
20mA
MAX1566/MAX1567
Six-Channel, High-Efficiency, Digital
Camera Power Supplies
The MAX1566/MAX1567 channels feature a soft-start
function that limits inrush current and prevents excessive battery loading at startup by ramping the output
voltage of each channel up to the regulation voltage.
This is accomplished by ramping the internal reference
inputs to each channel error amplifier from 0V to the
1.25V reference voltage over a period of 4096 oscillator
cycles (16ms at 500kHz) when initial power is applied
or when a channel is enabled.
The step-down soft-start ramp takes half the time (2048
clock cycles) of the other channel ramps. This allows
the step-down and main outputs to track each other
and rise at nearly the same dV/dt rate on power-up.
Once the step-down output reaches its regulation point
(1.5V or 1.8V typ), the main output (3.3V typ) continues
to rise at the same ramp rate. See the TypicalOperating Characteristics Main and Step-Down Startup
Waveforms graphs.
Soft-start is not included in the step-up converter to
avoid limiting startup capability with loading.
Fault Protection
The MAX1566/MAX1567 have robust fault and overload
protection. After power-up, the device is set to detect
an out-of-regulation state that could be caused by an
overload or short. If any DC-to-DC converter channel
(step-up, main, step-down, or any of the auxiliary controllers) remains faulted for 100,000 clock cycles
(200ms at 500kHz), then all outputs latch off until the
step-up DC-to-DC converter is reinitialized by the
ONSU pin or by cycling the input power. The faultdetection circuitry for any channel is disabled during its
initial turn-on soft-start sequence.
An exception to the standard fault behavior is that there
is no 100,000 clock cycle delay in entering the fault
state if the step-up output (PVSU) is dragged below its
2.5V UVLO threshold or is shorted. In this case, the
Figure 16.
AUX1OK
Drives an External PFET that Gates 5V Supply to the CCD After the +15V CCD Bias Supply Is Up
MAX1566
MAX1567
(PARTIAL)
AUX1
PWM
CURRENT-
MODE
STEP-UP
PWM
PVSU
TO
V
BATT
AUX1OK
PVSU
LXSU
PGSU
FBSU
DL1
FB1
PV
15V
D6
TO
V
BATT
L2
100mA
GATED +5V
TO CCD
V
SU
+5V
MAX1566/MAX1567
Six-Channel, High-Efficiency, Digital
Camera Power Supplies
step-up UVLO immediately triggers and shuts down all
channels. The step-up then continues to attempt starting. If the step-up output short remains, these attempts
cannot succeed since PVSU remains near ground.
If a soft-short or overload remains on PVSU, the startup
oscillator switches the internal N-channel MOSFET, but
fault is retriggered if regulation is not achieved by the
end of the soft-start interval. If PVSU is dragged below
the input, the overload is supplied by the body diode of
the internal synchronous rectifier, or by a Schottky
diode connected from the battery to PVSU. If desired,
this overload current can be interrupted by a P-channel
MOSFET controlled by SCF, as shown in Figure 17.
Reference
The MAX1566/MAX1567 has a precise 1.250V reference. Connect a 0.1µF ceramic bypass capacitor from
REF to GND within 0.2in (5mm) of the REF pin. REF can
source up to 200µA and is enabled whenever ONSU is
high and PVSU is above 2.5V. The auxiliary controllers
and MAX1801 slave controllers (if connected) each sink
up to 30µA REF current during startup. In addition, the
feedback network for the AUX2 inverter (MAX1567) also
draws current from REF. If the 200µA REF load limit
must be exceeded, buffer REF with an external op amp.
Oscillator
All DC-to-DC converter channels employ fixed-frequency
PWM operation. The operating frequency is set by an RC
network at the OSC pin. The range of usable settings is
100kHz to 1MHz. When MAX1801 slave controllers are
added, they operate at the frequency set by OSC.
The oscillator uses a comparator, a 150ns one-shot, and
an internal NFET switch in conjunction with an external
timing resistor and capacitor (Figure 6). When the switch
is open, the capacitor voltage exponentially approaches
the step-up output voltage from zero with a time constant
given by the product of R
OSC
and C
OSC
. The comparator output switches high when the capacitor voltage
reaches V
REF
(1.25V). In turn, the one-shot activates the
internal MOSFET switch to discharge the capacitor for
150ns, and the cycle repeats. The oscillation frequency
changes as the main output voltage ramps upward following startup. The oscillation frequency is then constant
once the main output is in regulation.
Low-Voltage Startup Oscillator
The MAX1566/MAX1567 internal control and referencevoltage circuitry receive power from PVSU and do not
function when PVSU is less than 2.5V. To ensure lowvoltage startup, the step-up employs a low-voltage
startup oscillator that activates at 0.9V if a Schottky rectifier is connected from V
BATT
to PVSU (1.1V with no
Schottky rectifier). The startup oscillator drives the internal N-channel MOSFET at LXSU until PVSU reaches
2.5V, at which point voltage control is passed to the
current-mode PWM circuitry.
Once in regulation, the MAX1566/MAX1567 operate
with inputs as low as 0.7V since internal power for the
IC is supplied by PVSU. At low input voltages, the step-
Figure 17. SCF Drives PFET Load Switch on 5V to Disconnect
Load on Fault and Allow Full-Load Startup
up may have difficulty starting into heavy loads (see the
Minimum Startup Voltage vs. Load Current (OUTSU)
graph in the Typical Operating Characteristics); however,
this can be remedied by connecting an external Pchannel load switch driven by SCF so the load is not
connected until the PVSU is in regulation (Figure 17).
Shutdown
The step-up converter is activated with a high input at
ONSU. The main converter (step-up or step-down) is activated by a high input on ONM. The step-down and auxiliary DC-to-DC converters 1, 2, and 3 activate with high
inputs at ONSD, ON1, ON2, and ON3, respectively. The
step-down, main, and AUX_ converters cannot be activated until PVSU is in regulation. For automatic startup, connect ON_ to PVSU or a logic level greater than 1.6V.
Design Procedure
Setting the Switching Frequency
Choose a switching frequency to optimize external
component size or circuit efficiency for the particular
application. Typically, switching frequencies between
400kHz and 500kHz offer a good balance between
component size and circuit efficiency—higher frequencies generally allow smaller components, and lower frequencies give better conversion efficiency. The
switching frequency is set with an external timing resistor (R
OSC
) and capacitor (C
OSC
). At the beginning of a
cycle, the timing capacitor charges through the resistor
until it reaches V
REF
. The charge time, t1, is as follows:
t1= -R
OSC
x C
OSC
x In(1 - 1.25 / V
PVSU
)
The capacitor voltage then decays to zero over time, t
2
= 150ns. The oscillator frequency is as follows:
f
OSC
= 1 / (t1+ t2)
f
OSC
can be set from 100kHz to 1MHz. Choose C
OSC
between 22pF and 470pF. Determine R
OSC
:
R
OSC
= (150ns - 1 / f
OSC
) / (C
OSC
ln[1 - 1.25 / V
PVSU
])
See the Typical Operating Characteristics for f
OSC
vs.
R
OSC
using different values of C
OSC
.
Setting Output Voltages
All MAX1566/MAX1567 output voltages are resistor set.
The FB_ threshold is 1.25V for all channels except for
FB3L (0.2V) on both devices and FB2 (inverter) on the
MAX1567. When setting the voltage for any channel
except the MAX1567 AUX2, connect a resistive voltage-divider from the channel output to the corresponding FB_ input and then to GND. The FB_ input bias
current is less than 100nA, so choose the bottom-side
(FB_-to-GND) resistor to be 100kΩ or less. Then calculate the top-side (output-to-FB_) resistor:
R
TOP
= R
BOTTOM
[(V
OUT
/ 1.25) - 1]
When using AUX3 to drive white LEDs (Figure 7), select
the LED current-setting resistor (R3, Figure 7) using the
following formula:
R3 = 0.2V / I
LED
The FB2 threshold on the MAX1567 is 0V. To set the
AUX2 negative output voltage, connect a resistive voltage-divider from the negative output to the FB2 input,
and then to REF. The FB2 input bias current is less than
100nA, so choose the REF-side (FB2-to-REF) resistor
(R
REF
) to be 100kΩ or less. Then calculate the top-side
(output-to-FB2) resistor:
R
TOP
= R
REF
(-V
OUT(AUX2)
/ 1.25)
General Filter Capacitor Selection
The input capacitor in a DC-to-DC converter reduces
current peaks drawn from the battery or other input
power source and reduces switching noise in the controller. The impedance of the input capacitor at the
switching frequency should be less than that of the
input source so high-frequency switching currents do
not pass through the input source.
The output capacitor keeps output ripple small and
ensures control-loop stability. The output capacitor must
also have low impedance at the switching frequency.
Ceramic, polymer, and tantalum capacitors are suitable,
with ceramic exhibiting the lowest ESR and high-frequency impedance.
Output ripple with a ceramic output capacitor is
approximately as follows:
V
RIPPLE
= I
L(PEAK)
[1 / (2π x f
OSC
x C
OUT
)]
If the capacitor has significant ESR, the output ripple
component due to capacitor ESR is as follows:
V
RIPPLE(ESR)
= I
L(PEAK)
x ESR
Output capacitor specifics are also discussed in each
converter’s Compensation section.
Step-Up Component Selection
This section describes component selection for the
step-up, as well as for the main, if SUSD = PV.
The external components required for the step-up are
an inductor, an input and output filter capacitor, and a
compensation RC.
The inductor is typically selected to operate with continuous current for best efficiency. An exception might be
if the step-up ratio, (V
OUT
/ VIN), is greater than 1 / (1 -
D
MAX
), where D
MAX
is the maximum PWM duty factor
of 80%.
When using the step-up channel to boost from a low
input voltage, loaded startup is aided by connecting a
MAX1566/MAX1567
Six-Channel, High-Efficiency, Digital
Camera Power Supplies
Schottky diode from the battery to PVSU. See the
Minimum Startup Voltage vs. Load Current graph in the
Typical Operating Characteristics.
Step-Up Inductor
In most step-up designs, a reasonable inductor value
(L
IDEAL
) can be derived from the following equation,
which sets continuous peak-to-peak inductor current at
1/2 the DC inductor current:
L
IDEAL
= [2V
IN(MAX)
x D(1 - D)] / (I
OUT
x f
OSC
)
where D is the duty factor given by:
D = 1 - (V
IN
/ V
OUT
)
Given L
IDEAL
, the consistent peak-to-peak inductor cur-
rent is 0.5 I
OUT
/ (1 - D). The peak inductor current,
I
IND(PK)
= 1.25 I
OUT
/ (1 - D).
Inductance values smaller than L
IDEAL
can be used to
reduce inductor size; however, if much smaller values
are used, inductor current rises and a larger output
capacitance may be required to suppress output ripple.
Step-Up Compensation
The inductor and output capacitor are usually chosen
first in consideration of performance, size, and cost. The
compensation resistor and capacitor are then chosen to
optimize control-loop stability. In some cases, it may
help to readjust the inductor or output-capacitor value to
get optimum results. For typical designs, the component
values in the circuit of Figure 1 yield good results.
The step-up converter employs current-mode control,
thereby simplifying the control-loop compensation.
When the converter operates with continuous inductor
current (typically the case), a right-half-plane zero
appears in the loop-gain frequency response. To
ensure stability, the control-loop gain should cross over
(drop below unity gain) at a frequency (f
C
) much less
than that of the right-half-plane zero.
The relevant characteristics for step-up channel compensation are as follows:
• Transconductance (from FB to CC), gmEA(135µS)
• Current-sense amplifier transresistance, R
CS
(0.3V/A)
• Feedback regulation voltage, V
FB
(1.25V)
• Step-up output voltage, V
SU
, in V
• Output load equivalent resistance, R
LOAD
, in Ω =
V
OUT
/ I
LOAD
The key steps for step-up compensation are as follows:
1) Place fCsufficiently below the right-half-plane zero
(RHPZ) and calculate CC.
2) Select RCbased on the allowed load-step transient.
RCsets a voltage delta on the CCpin that corresponds to load-current step.
3) Calculate the output-filter capacitor (C
OUT
) required
to allow the RCand CCselected.
4) Determine if CPis required (if calculated to be
>10pF).
For continuous conduction, the right-half-plane zero frequency (f
RHPZ
) is given by the following:
f
RHPZ
= V
OUT
(1 - D)2/ (2π x L x I
LOAD
)
where D = the duty cycle = 1 - (V
IN
/ V
OUT
), L is the
inductor value, and I
LOAD
is the maximum output current. Typically target crossover (fC) for 1/6 of the RHPZ.
For example, if we assume f
OSC
= 500kHz, VIN= 2.5V,
V
OUT
= 5V, and I
OUT
= 0.5A, then R
LOAD
= 10Ω. If we
select L = 4.7µH, then:
f
RHPZ
= 5 (2.5 / 5)2/ (2π x 4.7 x 10-6x 0.5) = 84.65kHz
Choose fC= 14kHz. Calculate CC:
CC= (VFB/ V
OUT
)(R
LOAD
/ RCS)(gm / 2π x fC)(1 - D)
= (1.25 / 5)(10 / 0.3) x [135µS / (6.28 x 14kHz)] (2/5)
= 6.4nF
Choose 6.8nF.
Now select RCso transient-droop requirements are
met. As an example, if 4% transient droop is allowed,
the input to the error amplifier moves 0.04 x 1.25V, or
50mV. The error-amp output drives 50mV x 135µS, or
6.75µA, across RCto provide transient gain. Since the
current-sense transresistance is 0.3V/A, the value of R
C
that allows the required load-step swing is as follows:
RC= 0.3 I
IND(PK)
/ 6.75µA
In a step-up DC-to-DC converter, if L
IDEAL
is used, out-
put current relates to inductor current by:
I
IND(PK)
= 1.25 I
OUT
/ (1 - D) = 1.25 I
OUT
x V
OUT
/ V
IN
So, for a 500mA output load step with VIN= 2.5V and
V
OUT
= 5V:
RC= [1.25(0.3 x 0.5 x 5) / 2)] / 6.75µA = 69.4kΩ
Note that the inductor does not limit the response in this
case since it can ramp at 2.5V / 4.7µH, or 530mA/µs.
The output filter capacitor is then chosen so the C
OUT
R
LOAD
pole cancels the RCCCzero:
C
OUT
x R
LOAD
= RCx C
C
For the example:
C
OUT
= 68kΩ x 6.8nF / 10Ω = 46µF
Choose 47µF for C
OUT
. If the available C
OUT
is substantially different from the calculated value, insert the
available C
values allow a
higher RC, which provides higher transient gain and
consequently less transient droop.
If the output filter capacitor has significant ESR, a zero
occurs at the following:
Z
ESR
= 1 / (2π x C
OUT
x R
ESR
)
If Z
ESR
> fC, it can be ignored, as is typically the case
with ceramic output capacitors. If Z
ESR
is less than fC,
it should be cancelled with a pole set by capacitor C
P
connected from CC to GND:
CP= C
OUT
x R
ESR
/ R
C
If CPis calculated to be <10pF, it can be omitted.
Step-Down Component Selection
This section describes component selection for the
step-down converter, and for the main converter if used
in step-down mode (SUSD = GND).
Step-Down Inductor
The external components required for the step-down
are an inductor, input and output filter capacitors, and
compensation RC network.
The MAX1566/MAX1567 step-down converter provides
best efficiency with continuous inductor current. A reasonable inductor value (L
IDEAL
) can be derived from
the following:
L
IDEAL
= [2(VIN) x D(1 - D)] / I
OUT
x f
OSC
This sets the peak-to-peak inductor current at 1/2 the
DC inductor current. D is the duty cycle:
D = V
OUT
/ V
IN
Given L
IDEAL
, the peak-to-peak inductor current is 0.5
I
OUT
. The absolute-peak inductor current is 1.25 I
OUT
.
Inductance values smaller than L
IDEAL
can be used to
reduce inductor size; however, if much smaller values are
used, inductor current rises, and a larger output capacitance may be required to suppress output ripple. Larger
values than L
IDEAL
can be used to obtain higher output
current, but typically with larger inductor size.
Step-Down Compensation
The relevant characteristics for step-down compensation are as follows:
• Transconductance (from FB to CC), gmEA(135µS)
• Step-down slope-compensation pole, P
SLOPE
= V
IN
/
(πL)
• Current-sense amplifier transresistance, R
CS
(0.6V/A)
• Feedback-regulation voltage, V
FB
(1.25V)
• Step-down output voltage, V
SD
, in V
• Output-load equivalent resistance, R
LOAD
, in Ω =
V
OUT
/ I
LOAD
The key steps for step-down compensation are
as follows:
1) Set the compensation RC to zero to cancel the
R
LOADCOUT
pole.
2) Set the loop crossover below the lower of 1/5 the
slope compensation pole or 1/5 the switching
frequency.
If we assume VIN= 2.5V, V
OUT
= 1.8V, and I
OUT
=
350mA, then R
LOAD
= 5.14Ω.
If we select f
OSC
= 500kHz and L = 5.6µH.
P
SLOPE
= V
IN
/ (πL) = 142kHz, so choose fC= 24kHz
and calculate CC:
CC= (V
FB
/ V
OUT
)(R
LOAD
/ RCS)(gm / 2π x fC)
= (1.25 / 1.8)(5.14 / 0.6) x [135µS / (6.28 x 24kHz)]
= 6.4nF
Choose 6.8nF.
Now select RCso transient-droop requirements are
met. As an example, if 4% transient droop is allowed,
the input to the error amplifier moves 0.04 x 1.25V, or
50mV. The error-amp output drives 50mV x 135µS, or
6.75µA across RCto provide transient gain. Since the
current-sense transresistance is 0.6V/A, the value of R
C
that allows the required load-step swing is as follows:
RC= 0.6 I
IND(PK)
/ 6.75µA
In a step-down DC-to-DC converter, if L
IDEAL
is used,
output current relates to inductor current by the following:
I
IND(PK)
= 1.25 I
OUT
So for a 250mA output load step with VIN= 2.5V and
V
OUT
= 1.8V:
RC= (1.25 x 0.6 x 0.25) / 6.75µA = 27.8kΩ
Choose 27kΩ.
Note that the inductor does somewhat limit the response
in this case since it ramps at (V
IN
- V
OUT
) / 5.6µH, or
(2.5 - 1.8) / 5.6µH = 125mA/µs.
The output filter capacitor is then chosen so the C
OUT
R
LOAD
pole cancels the RCCCzero:
C
OUT
x R
LOAD
= RCx C
C
For the example:
C
OUT
= 27kΩ x 6.8nF / 5.14Ω = 35.7µF
Since ceramic capacitors are common in either 22µF or
47µF values, 22µF is within a factor of two of the ideal value
and still provides adequate phase margin for stability.
MAX1566/MAX1567
Six-Channel, High-Efficiency, Digital
Camera Power Supplies
If the output filter capacitor has significant ESR, a zero
occurs at the following:
Z
ESR
= 1 / (2π x C
OUT
x R
ESR
)
If Z
ESR
> fC, it can be ignored, as is typically the case
with ceramic output capacitors. If Z
ESR
< fC, it should
be cancelled with a pole set by capacitor CPconnected from CCto GND:
CP= C
OUT
x R
ESR
/ R
C
If CPis calculated to be <10pF, it can be omitted.
AUX Controller Component Selection
External MOSFET
All MAX1566/MAX1567 AUX controllers drive external
logic-level MOSFETs. Significant MOSFET selection
parameters are as follows:
• On-resistance (R
DS(ON)
)
• Maximum drain-to-source voltage (V
DS(MAX)
)
• Total gate charge (QG)
• Reverse transfer capacitance (C
RSS
)
On the MAX1566, all AUX drivers are designed for Nchannel MOSFETs. On the MAX1567, AUX2 is a DC-toDC inverter, so DL2 is designed to drive a P-channel
MOSFET. In both devices, the driver outputs DL1 and
DL3 swing between PVSU and GND. MOSFET driver
DL2 swings between INDL2 and GND.
Use a MOSFET with on-resistance specified with gate
drive at or below the main output voltage. The gate
charge, QG, includes all capacitance associated with
charging the gate and helps to predict MOSFET transition time between on and off states. MOSFET power
dissipation is a combination of on-resistance and transition losses. The on-resistance loss is as follows:
P
RDSON
= D x I
L
2
x R
DS(ON)
where D is the duty cycle, ILis the average inductor
current, and R
DS(ON)
is MOSFET on-resistance. The
transition loss is approximately as follows:
P
TRANS
= (V
OUT
x ILx f
OSC
x tT) / 3
where V
OUT
is the output voltage, ILis the average
inductor current, f
OSC
is the switching frequency, and
tTis the transition time. The transition time is approximately QG/ IG, where QGis the total gate charge, and
I
G
is the gate-drive current (0.5A typ). The total power
dissipation in the MOSFET is as follows:
P
MOSFET
= P
RDSON
+ P
TRANS
Diode
For most AUX applications, a Schottky diode rectifies
the output voltage. Schottky low forward voltage and
fast recovery time provide the best performance in
most applications. Silicon signal diodes (such as
1N4148) are sometimes adequate in low-current
(<10mA), high-voltage (>10V) output circuits where the
output voltage is large compared to the diode forward
voltage.
AUX Compensation
The auxiliary controllers employ voltage-mode control
to regulate their output voltage. Optimum compensation depends on whether the design uses continuous or
discontinuous inductor current.
AUX Step-Up, Discontinuous Inductor Current
When the inductor current falls to zero on each switching cycle, it is described as discontinuous. The inductor
is not utilized as efficiently as with continuous current,
but in light-load applications this often has little negative
impact since the coil losses may already be low compared to other losses. A benefit of discontinuous inductor current is more flexible loop compensation, and no
maximum duty-cycle restriction on boost ratio.
To ensure discontinuous operation, the inductor must
have a sufficiently low inductance to fully discharge on
each cycle. This occurs when:
L < [V
IN
2
(V
OUT
- VIN) / V
OUT
3
] [R
LOAD
/ (2f
OSC
)]
A discontinuous current boost has a single pole at the
following:
fP= (2V
OUT
- VIN) / (2π x R
LOAD
x C
OUT
x V
OUT
)
Choose the integrator cap so the unity-gain crossover,
fC, occurs at f
OSC
/ 10 or lower. Note that for many AUX
circuits, such as those powering motors, LEDs, or other
loads that do not require fast transient response, it is
often acceptable to overcompensate by setting fCat
f
The CC RCzero is then used to cancel the fPpole, so:
RC= R
LOAD
x C
OUT
x V
OUT
/ [(2V
OUT
- VIN) x CC]
AUX Step-Up, Continuous Inductor Current
Continuous inductor current can sometimes improve
boost efficiency by lowering the ratio between peak
inductor current and output current. It does this at the
expense of a larger inductance value that requires larger
size for a given current rating. With continuous inductorcurrent boost operation, there is a right-half-plane zero,
Z
RHP
, at the following:
Z
RHP
= (1 - D)2x R
LOAD
/ (2π x L)
where (1 - D) = V
IN
/ V
OUT
(in a boost converter).
There is a complex pole pair at the following:
f
0
= V
OUT
/ [2π x VIN(L x C
OUT
)
1/2
]
If the zero due to the output capacitance and ESR is
less than 1/10 the right-half-plane zero:
Z
COUT
= 1 / (2π x C
OUT
x R
ESR
) < Z
RHP
/ 10
Then choose CCso the crossover frequency fC occurs
at Z
COUT
. The ESR zero provides a phase boost at
crossover:
CC = (V
IN
/ V
RAMP
) (V
FB
/ V
OUT
) [gM/ (2π x Z
COUT
)]
Choose RCto place the integrator zero, 1 / (2π x RC x
CC), at f0 to cancel one of the pole pairs:
RC= VIN(L x C
OUT
)
1/2
/ (V
OUT
x CC)
If Z
COUT
is not less than Z
RHP
/ 10 (as is typical with
ceramic output capacitors) and continuous conduction
is required, then cross the loop over before Z
RHP
and f0:
fC< f0 / 10, and fC< Z
RHP
/ 10
In that case:
CC = (V
IN
/ V
RAMP
) (V
FB
/ V
OUT
) (gM/ (2π x fC))
Place:
1 / (2π x RC x CC) = 1 / (2π x R
LOAD
x C
OUT
), so that
RC= R
LOAD
x C
OUT
/ C
C
Or, reduce the inductor value for discontinuous operation.
MAX1567 AUX2 Inverter Compensation,
Discontinuous Inductor Current
If the load current is very low (≤40mA), discontinuous
current is preferred for simple loop compensation and
freedom from duty-cycle restrictions on the inverter
input-output ratio. To ensure discontinuous operation,
the inductor must have a sufficiently low inductance to
fully discharge on each cycle. This occurs when:
L < [V
IN
/ (|V
OUT
| + VIN)]2R
LOAD
/ (2f
OSC
)
A discontinuous current inverter has a single pole at the
following:
f
P
= 2 / (2π x R
LOAD
x C
OUT
)
Choose the integrator cap so the unity-gain crossover,
f
C
, occurs at f
OSC
/ 10 or lower. Note that for many AUX
circuits that do not require fast transient response, it is
often acceptable to overcompensate by setting fCat
f
OSC
/ 20 or lower.
C
C
is then determined by the following:
CC= [V
IN
/ (K
1/2
x V
RAMP
] [V
REF
/ (V
OUT
+ V
REF
)] [gM/
(2π x fC)]
where K = 2L x f
OSC
/ R
LOAD
, and V
RAMP
is the internal
slope-compensation voltage ramp of 1.25V.
The CC RCzero is then used to cancel the fPpole, so:
RC= (R
LOAD
x C
OUT
) / (2CC)
MAX1567 AUX2 Inverter Compensation,
Continuous Inductor Current
Continuous inductor current may be more suitable for
larger load currents (50mA or more). It improves efficiency by lowering the ratio between peak inductor current and output current. It does this at the expense of a
larger inductance value that requires larger size for a
given current rating. With continuous inductor-current
inverter operation, there is a right-half-plane zero,
Z
RHP
, at:
Z
RHP
= [(1 - D)2 / D] x R
LOAD
/ (2π x L)
where D = |V
OUT
| / (|V
OUT
| + VIN) (in an inverter).
There is a complex pole pair at:
f0= (1 - D) / (2π(L x C)
1/2
)
If the zero due to the output-capacitor capacitance and
ESR is less than 1/10 the right-half-plane zero:
Z
COUT
= 1 / (2π x C
OUT
x R
ESR
) < Z
RHP
/ 10
Then choose C
C
such that the crossover frequency f
C
occurs at Z
COUT
. The ESR zero provides a phase boost
at crossover:
CC = (V
IN
/ V
RAMP
) [V
REF
/ (V
REF
+ |V
OUT
|)] [gM/
(2π x Z
COUT
)]
Choose R
C
to place the integrator zero, 1 / (2π x RC x
CC), at f0 to cancel one of the pole pairs:
R
C
= (L x C
OUT
)
1/2
/ [(1 - D) x CC]
If Z
COUT
is not less than Z
RHP
/ 10 (as is typical with
ceramic output capacitors) and continuous conduction
is required, then cross the loop over before Z
RHP
and f0:
fC< f0 /10, and fC< Z
RHP
/ 10
MAX1566/MAX1567
Six-Channel, High-Efficiency, Digital
Camera Power Supplies
Or, reduce the inductor value for discontinuous operation.
Applications Information
Typical Operating Circuits
Figures 1, 2, and 3 show connections for AA and Li+
battery arrangements. Figures 7–13 show various connections for the AUX1, 2, and 3 controllers. Figures 15,
16, and 17 show various connections for the SDOK,AUX1OK, and SCF outputs.
Figure 1. Typical Operating Circuit for One Li+ Cell
In this connection, the main converter is operated as a
step-down (SUSD = GND) and is powered from PVSU.
This provides boost-buck operation for the main 3.3V
output so a regulated output is maintained over the Li+
2.7V to 4.2V cell voltage range. The compound efficiency from the battery to the 3.3V output reaches 90%.
The step-down 1.8V (core) output is powered directly
from V
BATT
.
The CCD and LCD voltages are generated with a transformerless design. AUX1 generates +15V for CCD positive and LCD bias. The MAX1567 AUX2 inverter
generates -7.5V for negative CCD bias. The AUX3 controller generates a regulated current for a series network of four white LEDs that backlight the LCD.
Figure 2. Typical Operating Circuit for 2 AA Cells
Figure 2 is optimized for 2-cell AA inputs (1.5V to 3.7V)
by connecting the step-down input (PVSD) to the main
output (PVM). The main 3.3V output operates directly
from the battery as a step-up (SUSD = PVSD). The 1.8V
core output now operates as a boost-buck with efficiency up to 90%. The rest of the circuit is unchanged from
Figure 1.
Figure 3. Typical Operating Circuit for 2 AA Cells
and 1-Cell Li+
The MAX1566/MAX1567 can also allow either 1-cell Li+
or 2 AA cells to power the same design. If the stepdown and main inputs are both connected to PVSU,
then both the 3.3V and 1.8V outputs operate as boostbuck converters. There is an efficiency penalty compared to stepping down VSD directly from the battery,
but that is not possible with a 1.5V input.
Furthermore, the cascaded boost-buck efficiency compares favorably with other boost-buck techniques.
LED, LCD, and Other Boost Applications
Any AUX channel (except for the AUX2 inverter on the
MAX1567) can be used for a wide variety of step-up
applications. These include generating 5V or some
other voltage for motor or actuator drive, generating
15V or a similar voltage for LCD bias, or generating a
step-up current source to efficiently drive a series array
of white LEDs to display backlighting. Figures 7 and 8
show examples of these applications.
Multiple-Output Flyback Circuits
Some applications require multiple voltages from a single converter channel. This is often the case when generating voltages for CCD bias or LCD power. Figure 9
shows a two-output flyback configuration with an AUX
channel. The controller drives an external MOSFET that
switches the transformer primary. Two transformer secondaries generate the output voltages. Only one positive output voltage can be fed back, so the other
voltages are set by the turns-ratio of the transformer
secondaries. The load stability of the other secondary
voltages depends on transformer leakage inductance
and winding resistance. Voltage regulation is best
when the load on the secondary that is not fed back is
small compared to the load on the one that is fed back.
Regulation also improves if the load-current range is
limited. Consult the transformer manufacturer for the
proper design for a given application.
Transformerless Inverter for Negative CCD
Bias (AUX2, MAX1567)
On the MAX1567, AUX2 is set up to drive an external Pchannel MOSFET in an inverting configuration. DL2 drives
low to turn on the MOSFET, and FB2 has inverted polarity
and a 0V threshold. This is useful for generating negative
CCD bias without a transformer, particularly with high
pixel-count cameras that have a greater negative CCD
load current. Figure 10 shows an example circuit.
Boost with Charge Pump for Positive and
Negative Outputs
Another method of producing bipolar output voltages
without a transformer is with an AUX controller and a
charge-pump circuit, as shown in Figure 11. When MOSFET Q1 turns off, the voltage at its drain rises to supply
current to V
OUT+
. At the same time, C1 charges to the
voltage V
OUT+
through D1. When the MOSFET turns on,
C1 discharges through D3, thereby charging C3 to V
OUT
minus the drop across D3 to create roughly the same
voltage as V
If different magnitudes are required for the positive and
negative voltages, a linear regulator can be used at
one of the outputs to achieve the desired voltages. One
such connection is shown in Figure 12. This circuit is
somewhat unique in that a positive-output linear regulator can regulate a negative voltage output. It does this
by controlling the charge current flowing to the flying
capacitor rather than directly regulating at the output.
SEPIC Boost-Buck
The MAX1566/MAX1567s’ internal switch step-up,
main, and step-down converters can be cascaded to
make a high-efficiency boost-buck converter, but it is
sometimes desirable to build a second boost-buck
converter with an AUX_ controller.
One type of step-up/step-down converter is the SEPIC,
shown in Figure 13. Inductors L1 and L2 can be separate inductors or can be wound on a single core and
coupled like a transformer. Typically, a coupled inductor
improves efficiency since some power is transferred
through the coupling so less power passes through the
coupling capacitor (C2). Likewise, C2 should have low
ESR to improve efficiency. The ripple-current rating must
be greater than the larger of the input and output currents. The MOSFET (Q1) drain-source voltage rating and
the rectifier (D1) reverse-voltage rating must exceed the
sum of the input and output voltages. Other types of
step-up/step-down circuits are a flyback converter and a
step-up converter followed by a linear regulator.
Adding a MAX1801 Slave
The MAX1801 is a 6-pin, SOT-slave, DC-to-DC controller
that can be connected to generate additional output voltages. It does not generate its own reference or oscillator.
Instead, it uses the reference and oscillator of the
MAX1566/MAX1567 (Figure 14). The MAX1801 controller
operation and design are similar to that of the
MAX1566/MAX1567 AUX controllers. All comments in the
AUX Controller Component Selection section also apply
to add-on MAX1801 slave controllers. For more details,
refer to the MAX1801 data sheet.
Applications for Status Outputs
The MAX1566/MAX1567 have three status outputs:
SDOK, AUX1OK, and SCF. These monitor the output of
the step-down channel, the AUX1 channel, and the status of the overload-short-circuit protection. Each output
is open drain to allow the greatest flexibility. Figures 15,
16, and 17 show some possible connections for these
outputs.
Using
SDOK
and
AUX1OK
for Power Sequencing
SDOK goes low when the step-down reaches regulation. Some microcontrollers with low-voltage cores
require that the high-voltage (3.3V) I/O rail not be powered up until the core has a valid supply. The circuit in
Figure 15 accomplishes this by driving the gate of a
PFET connected between the 3.3V output and the
processor I/O supply.
Figure 16 shows a similar application where AUX1OK
gates 5V power to the CCD only after the +15V output
is in regulation.
Alternately, power sequencing can also be implemented by connecting RC networks to delay the appropriate
converter ON_ inputs.
Using SCF for Full-Load Startup
The SCF output goes low only after the step-up reaches
regulation. It can be used to drive a P-channel MOSFET
switch that turns off the load of a selected supply in the
event of an overload. Or, it can remove the load until
the supply reaches regulation, effectively allowing fullload startup. Figure 17 shows such a connection for the
step-up output.
Setting VSDBelow 1.25V
The step-down feedback voltage is 1.25V. With a standard two-resistor feedback network, the output voltage
can be set to values between 1.25V and the input voltage. If a step-down output voltage less than 1.25V is
desired, it can be set by adding a third feedback resistor from FBSD to a voltage higher than 1.25V. The stepup or main outputs are convenient for this, as shown in
Figure 18.
The equation governing output voltage in Figure 18’s
circuit is as follows:
0 = [(V
SD
- V
FBSD
) / R1] + [(0 - V
FBSD
) / R2] +
[(VSU- V
FBSD
) / R3]
where VSDis the output voltage, V
FBSD
is 1.25V, and
VSUis the step-up output voltage. Any available voltage that is higher than 1.25V can be used as the connection point for R3 in Figure 18, and for the VSDterm
in the equation. Since there are multiple solutions for
R1, R2, and R3, the above equation cannot be written
in terms of one resistor. The best method for determining resistor values is to enter the above equation into a
spreadsheet and test estimated resistor values. A good
starting point is with 100kΩ at R2 and R3.
MAX1566/MAX1567
Six-Channel, High-Efficiency, Digital
Camera Power Supplies
Designing a PC Board
Good PC board layout is important to achieve optimal
performance from the MAX1566/MAX1567. Poor design
can cause excessive conducted and/or radiated noise.
Conductors carrying discontinuous currents and any
high-current path should be made as short and wide as
possible. A separate low-noise ground plane containing the reference and signal grounds should connect to
the power-ground plane at only one point to minimize
the effects of power-ground currents. Typically, the
ground planes are best joined right at the IC.
Keep the voltage-feedback network very close to the
IC, preferably within 0.2in (5mm) of the FB_ pin. Nodes
with high dV/dt (switching nodes) should be kept as
small as possible and should be routed away from
high-impedance nodes such as FB_. Refer to the
MAX1566/MAX1567 EV kit data sheet for a full PC
board example.
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 35
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,
go to www.maxim-ic.com/packages
.)
D
D/2
E/2
(NE-1) X e
A1 A2
E
A
D2
C
L
k
(ND-1) X e
C
L
ee
PROPRIETARY INFORMATION
TITLE:
PACKAGE OUTLINE
36, 40L QFN THIN, 6x6x0.8 mm
b
D2/2
e
L
21-0141
E2/2
C
L
k
C
L
QFN THIN 6x6x0.8.EPS
E2
LL
REV.DOCUMENT CONTROL NO.APPROVAL
1
B
2
COMMON DIMENSIONS
NOTES:
1. DIMENSIONING & TOLERANCING CONFORM TO ASME Y14.5M-1994.
2. ALL DIMENSIONS ARE IN MILLIMETERS. ANGLES ARE IN DEGREES.
3. N IS THE TOTAL NUMBER OF TERMINALS.
4. THE TERMINAL #1 IDENTIFIER AND TERMINAL NUMBERING CONVENTION SHALL CONFORM TO JESD 95-1
SPP-012. DETAILS OF TERMINAL #1 IDENTIFIER ARE OPTIONAL, BUT MUST BE LOCATED WITHIN THE
ZONE INDICATED. THE TERMINAL #1 IDENTIFIER MAY BE EITHER A MOLD OR MARKED FEATURE.
5. DIMENSION b APPLIES TO METALLIZED TERMINAL AND IS MEASURED BETWEEN 0.25 mm AND 0.30 mm
FROM TERMINAL TIP.
6. ND AND NE REFER TO THE NUMBER OF TERMINALS ON EACH D AND E SIDE RESPECTIVELY.
7. DEPOPULATION IS POSSIBLE IN A SYMMETRICAL FASHION.
8. COPLANARITY APPLIES TO THE EXPOSED HEAT SINK SLUG AS WELL AS THE TERMINALS.
9. DRAWING CONFORMS TO JEDEC MO220.
10. WARPAGE SHALL NOT EXCEED 0.10 mm.
EXPOSED PAD VARIATIONS
PKG.
CODES
T3666-1
T4066-1
D2
NOM.
3.703.603.80
4.00 4.10 4.20 4.004.204.10
PROPRIETARY INFORMATION
TITLE:
PACKAGE OUTLINE
36, 40L QFN THIN, 6x6x0.8 mm
APPROVAL
DOCUMENT CONTROL NO.
MAX.MIN.
21-0141
E2
MAX.
MIN.
NOM.
3.803.703.60
REV.
2
B
2
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