General Description
The MAX15050/MAX15051 high-efficiency switching regulators deliver up to 4A load current at output voltages
from 0.6V to (0.9 x V
IN
). The devices operate from 2.9V
to 5.5V, making them ideal for on-board point-of-load
and postregulation applications. Total output-voltage
accuracy is within ±1% over load, line, and temperature.
The MAX15050/MAX15051 feature 1MHz fixed-frequency PWM operation. The MAX15050 features pulse-skip
mode to improve light-load efficiency. The MAX15050
soft-starts in a monotonic mode and then operates in
the forced PWM mode or pulse-skip mode depending
on the output load current condition. The MAX15051
soft-starts in the monotonic mode and operates in the
forced PWM mode. The high operating frequency
allows for small-size external components.
The low-resistance on-chip nMOS switches ensure high
efficiency at heavy loads while minimizing critical parasitic
inductances, making the layout a much simpler task with
respect to discrete solutions. Following a simple layout
and footprint ensures first-pass success in new designs.
The MAX15050/MAX15051 incorporate a high-bandwidth
(> 26MHz) voltage-error amplifier. The voltage-mode control
architecture and the voltage-error amplifier permit a type III
compensation scheme to achieve maximum loop bandwidth, up to 200kHz. High loop bandwidth provides fast
transient response, resulting in less required output capacitance and allowing for all-ceramic capacitor designs.
The MAX15050/MAX15051 feature an output overload
hiccup protection and peak current limit on both highside and low-side MOSFETs. These features provide for
ultra-safe operation in the cases of short-circuit conditions, severe overloads, or in converters with bulk electrolytic capacitors.
The MAX15050/MAX15051 feature an adjustable output voltage. The output voltage is adjustable by using two external
resistors at the feedback or by applying an external reference
voltage to the REFIN/SS input. The MAX15050/MAX15051
offer programmable soft-start time using one capacitor to
reduce input inrush current. A built-in thermal shutdown protection assures safe operation under all conditions. The
MAX15050/MAX15051 are available in a 2mm x 2mm,
16-bump (4 x 4 array), 0.5mm pitch WLP package.
Applications
Features
o Internal 18mΩ R
DS(ON)
MOSFETs
o Pulse-Skip Mode for High-Efficiency Light Load
(MAX15050)
o Continuous 4A Output Current
o ±1% Output-Voltage Accuracy Over Load, Line,
and Temperature
o Operates from 2.9V to 5.5V Supply
o Adjustable Output from 0.6V to (0.9 x V
IN
)
o Adjustable Soft-Start Reduces Inrush Supply Current
o Factory-Trimmed 1MHz Switching Frequency
o Compatible with Ceramic, Polymer, and
Electrolytic Output Capacitors
o Safe Startup Into Prebias Output
o Enable Input/Power-Good Output
o Fully Protected Against Overcurrent and
Overtemperature
o Overload Hiccup Protection
o Sink/Source Current for DDR Applications
o 2mm x 2mm, 16-Bump (4 x 4 Array), 0.5mm Pitch
WLP Package
MAX15050/MAX15051
High-Efficiency, 4A, 1MHz, Step-Down Regulators
with Integrated Switches in 2mm x 2mm Package
________________________________________________________________
Maxim Integrated Products
1
Ordering Information
19-4915; Rev 2; 3/10
EVALUATION KIT
AVAILABLE
+
Denotes a lead(Pb)-free/RoHS-compliant package.
Pin Configuration appears at end of data sheet.
OUTPUT
INPUT
2.9V TO 5.5V
BST
LX
IN
EN
V
DD
GND
FB
V
DD
COMP
PWRGD
REFIN/SS
GND
MAX15050
MAX15051
Typical Operating Circuit
Server Power Supplies
Point-of-Load
ASIC/CPU/DSP Core
and I/O Voltages
DDR Power Supplies
Base-Station Power
Supplies
Telecom and
Networking Power
Supplies
RAID Control Power
Supplies
Portable Applications
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
PART TEMP RANGE
M A X1 5 0 5 0 E WE + - 40°C to + 85°C 16 WLP Yes
M A X1 5 0 5 1 E WE + - 40°C to + 85°C 16 WLP No
PINPACKAGE
SKIP
MODE
MAX15050/MAX15051
High-Efficiency, 4A, 1MHz, Step-Down Regulators
with Integrated Switches in 2mm x 2mm Package
2 _______________________________________________________________________________________
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS
(VIN= VEN= 5V, C
VDD
= 2.2µF, TA= -40°C to +85°C, typical values are at TA= +25°C, unless otherwise noted.) (Note 4)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
IN, PWRGD to GND..................................................-0.3V to +6V
V
DD
to GND..................-0.3V to the lower of +4V or (VIN+ 0.3V)
COMP, FB, REFIN/SS to GND....................-0.3V to (V
DD
+ 0.3V)
EN to GND................................................................-0.3V to +6V
BST to LX..................................................................-0.3V to +6V
BST to GND ............................................................-0.3V to +12V
LX to GND ....................-0.3V to the lower of +6V or (V
IN
+ 0.3V)
LX to GND (Note 1) ..-1V to the lower of +6V or (V
IN
+ 1V) for 50ns
I
LX(RMS)
....................................................................................6A
V
DD
Output Short-Circuit Duration .............................Continuous
Converter Output Short-Circuit Duration ....................Continuous
Continuous Power Dissipation (T
A
= +70°C)
16-Bump (4 x 4 Array), 0.5mm Pitch WLP
(derate 20.4mW/°C above +70°C)..............................1000mW
Thermal Resistance (Note 2)
θ
JA
.................................................................................49°C/W
θ
JC
...................................................................................9°C/W
Operating Temperature Range ...........................-40°C to +85°C
Junction Temperature......................................................+150°C
Operating Junction Temperature
at Maximum Current (Note 3)........................................+105°C
Storage Temperature Range .............................-65°C to +150°C
Soldering Temperature (soldering, 10s) ..........................+260°C
Note 1: LX has internal clamp diodes to GND and IN. Applications that forward bias these diodes should take care not to exceed
the IC’s power dissipation limit of the device.
Note 2: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-
layer board. For detailed information on package thermal considerations, refer to www.maxim-ic.com/thermal-tutorial
.
Note 3: Operating the junction temperature above +105°C will degrade the life of the device.
PARAMETER CONDITIONS MIN TYP MAX UNITS
IN Voltage Range 2.9 5.5 V
IN Supply Current No load, no switching
Total Shutdown Current from IN VIN = V
VDD Undervoltage Lockout
Threshold
VDD Undervoltage Deglitching 10 µs
VDD Output Voltage I
VDD Dropout VIN = 2.9V, I
VDD Current Limit VDD = 0V 20 37 mA
BST
BST Supply Current
IN to BST On-Resistance VIN = 3.3V, IIN = 0.16A 4
PWM COMPARATOR
PWM Comparator Propagation
Delay
PWM Peak-to-Peak Ramp
Ampl itude
PWM Valley Amplitude 0.76 V
VIN = 3.3V 4.8 8
= 5V 5.3 8.5
V
IN
- VLX = 5V, VEN = 0V 10 20 µA
BST
LX starts/stops switching,
no load
= 0 to 10mA 3.1 3.3 3.5 V
VDD
= 10mA 0.09 V
VDD
MAX15050, V
MAX15051, V
no switching
10mV overdrive 20 ns
1 V
BST
IN
= 5V, V
= V
LX
= 3.3V, V
VDD ris ing 2.6 2.8
falling 2.35 2.55
V
DD
= 0V, no switching 10
LX
= 6.6V,
BST
250
mA
V
µA
MAX15050/MAX15051
High-Efficiency, 4A, 1MHz, Step-Down Regulators
with Integrated Switches in 2mm x 2mm Package
_______________________________________________________________________________________ 3
ELECTRICAL CHARACTERISTICS (continued)
(VIN= VEN= 5V, C
VDD
= 2.2µF, TA= -40°C to +85°C, typical values are at TA= +25°C, unless otherwise noted.) (Note 4)
PARAMETER CONDITIONS MIN TYP MAX UNITS
COMP
COMP Clamp Voltage High V
COMP Clamp Voltage Low V
COMP Slew Rate V
COMP Shutdown Res istance
ERROR AMPLIFIER
FB Regulation Accuracy Using
External Resistors
Open-Loop Voltage Gain 115 dB
Error-Amplifier Unity-Gain
Bandwidth
Error-Amplifier Common-Mode
Input Range
Error-Amplifier Maximum Output
Current
FB Input Bias Current VFB = 0.7V 70 nA
REFIN/SS
REFIN/SS Common-Mode Range V
REFIN/SS Charging Current V
REFIN/SS Offset Voltage V
REFIN/SS Pulldown Resistance VIN= V
LX (ALL BUMPS COMBINED)
LX On-Resistance, High Side ILX = -500mA VIN = V
LX On-Resistance, Low Side ILX = 500mA VIN = 3.3V 18 50 m
LX Current-Limit Thresholds VIN= 3.3V
LX Leakage Current V
LX Switching Frequenc y VIN= 3.3V 0.9 1 1.1 MHz
LX Maximum Duty Cycle VIN= 3.3V 90 96 %
LX Minimum On-Time VIN= 3.3V 80 ns
RMS LX Output Current 4 A
ENABLE
EN Input Logic-Low Threshold
(Falling)
= 2.9V to 5V, V
DD
= 2.9V to 5V, V
DD
= 0.7V to 0.5V, V
FB
From COMP to GND, V
= V
V
EN
REFIN/SS
0.594 0.6 0.606 V
26 MHz
= 2.9V to 3.5V 0 VDD - 2 V
V
DD
V
= 1V, no sw itching,
COMP
V
REFIN/SS
DD
REFIN/SS
REFIN/SS
EN
0.7 V
= 0.6V
= 2.9V to 3.5V 0 V
= 0.45V 6 8 10 µA
= 0.9V, FB shorted to COMP -4.5 +4.5 mV
= 3.3V, V
DD
= 0V
= 0.5V, V
FB
FB
= 0V
REFIN/SS
= 0.7V, V
REFIN/SS
IN
REFIN/SS
REFIN/SS
= 0.6V 1.4 V/µs
= 3.3V, V
V
FB
V
FB
= 0.1V 300
BST
High-side sourcing 5.4 8
Low-side sourcing 7
Low-side sink ing 7
Zero-crossing current threshold 0.2
Skip h igh-side sourcing 0.58
Sink current-limit DAC steps 4 Steps
V
= 0V -10
LX
= 5V 10
V
LX
= 0.6V 2 V
= 0.6V 0.68 V
= 100mV,
COMP
= 0.7V, sink 1
= 0.5V, source -1
- V
= 3.3V 24 54 m
LX
6
- 2 V
DD
mA
A
µA
MAX15050/MAX15051
High-Efficiency, 4A, 1MHz, Step-Down Regulators
with Integrated Switches in 2mm x 2mm Package
4 _______________________________________________________________________________________
Note 4: Specifications are 100% production tested at TA = +25°C. Limits over the operating temperature range are guaranteed by
design and characterization.
ELECTRICAL CHARACTERISTICS (continued)
(VIN= VEN= 5V, C
VDD
= 2.2µF, TA= -40°C to +85°C, typical values are at TA= +25°C, unless otherwise noted.) (Note 4)
Typical Operating Characteristics
(VIN= 5V, output voltage = 1.8V, I
LOAD
= 4A, and TA = +25°C, circuit of Figure 1, unless otherwise noted.)
PARAMETER CONDITIONS MIN TYP MAX UNITS
EN Input Logic-High Threshold
(Rising)
EN Input Current VEN = 0 or 5V 0.01 1 µA
THERMAL SHUTDOWN
Thermal-Shutdown Threshold +165 °C
Thermal-Shutdown Hysteresis 20 °C
POWER-GOOD (PWRGD)
Power-Good Threshold Voltage
Power-Good Edge Deglitch VFB falling or rising 48
PWRGD Output-Voltage Low I
PWRGD Leakage Current V
OVERCURRENT LIMIT (HICCUP MODE)
Current-Limit Startup Blan king 112
Autoretr y Restart Time 896
FB Hiccup Threshold VFB falling 70
Hiccup Threshold B lank ing Time VFB falling 36 µs
1.5 V
VFB falling, V
rising, V
V
FB
= 4mA 0.03 0.15 V
PWRGD
= 5V, V
PWRGD
REFIN/SS
REFIN/SS
= 0.6V 87 90 93
= 0.6V 92.5
= 0.9V, V
FB
REFIN/SS
= 0.6V 0.1 1 µA
% of
V
REFIN/SS
Clock
cycles
Clock
cycles
Clock
cycles
% of
V
REFIN/SS
EFFICIENCY vs. LOAD CURRENT
(V
= 5V) (MAX15050)
100
90
80
70
EFFICIENCY (%)
60
50
40
0.01 10
IN
V
= 2.5V
OUT
V
= 3.3V
OUT
V
= 1.8V
OUT
LOAD CURRENT (A)
V
OUT
10.1
EFFICIENCY vs. LOAD CURRENT
VIN = 5V (MAX15051)
100
MAX15050 toc01
= 1.2V
90
80
V
= 2.5V
70
EFFICIENCY (%)
60
50
40
0.1 1 10
V
= 3.3V
OUT
LOAD CURRENT (A)
OUT
V
= 1.8V
OUT
MAX15050 toc01b
V
= 1.2V
OUT
EFFICIENCY vs. LOAD CURRENT
(V
= 3.3V) (MAX15050)
V
OUT
IN
V
OUT
= 1.2V
LOAD CURRENT (A)
= 1.8V
V
= 2.5V
OUT
10.1
100
90
80
70
EFFICIENCY (%)
60
50
40
0.01 10
MAX15050 toc02
MAX15050/MAX15051
High-Efficiency, 4A, 1MHz, Step-Down Regulators
with Integrated Switches in 2mm x 2mm Package
_______________________________________________________________________________________
5
Typical Operating Characteristics (continued)
(VIN= 5V, output voltage = 1.8V, I
LOAD
= 4A, and TA = +25°C, circuit of Figure 1, unless otherwise noted.)
EFFICIENCY vs. LOAD CURRENT
= 3.3V (MAX15051)
V
V
= 1.2V
OUT
IN
V
= 1.8V
OUT
LOAD CURRENT (A)
V
= 2.5V
OUT
100
90
80
70
EFFICIENCY (%)
60
50
40
0.1 1 10
LOAD REGULATION
1.0
0.8
0.6
0.4
0.2
0
-0.2
-0.4
% OUTPUT FROM NORMAL
-0.6
-0.8
-1.0
LOAD CURRENT (A)
FREQUENCY vs. INPUT VOLTAGE
1.20
1.15
MAX15050 toc02b
1.10
1.05
1.00
0.95
FREQUENCY (MHz)
0.90
0.85
0.80
TA = +25NC
TA = -40NC
2.9 5.5
INPUT VOLTAGE (V)
LOAD-TRANSIENT RESPONSE
MAX15050 toc05
3.0 3.52.52.01.51.00.504.0
40µs/div
TA = +85NC
MAX15050 toc06
5.35.13.1 3.3 3.5 3.9 4.1 4.3 4.5 4.73.7 4.9
MAX15050 toc03
V
OUT
AC-COUPLED
200mV/div
4A
I
OUT
2A/div
1A
LINE REGULATION
(I
= 4A)
1.0
0.8
0.6
0.4
0.2
0
-0.2
-0.4
% OUTPUT FROM NORMAL
-0.6
-0.8
-1.0
2.9 5.5
LOAD
INPUT VOLTAGE (V)
LOAD-TRANSIENT RESPONSE
40µs/div
5.35.14.7 4.93.5 3.7 3.9 4.1 4.3 4.53.1 3.3
MAX15050 toc07
MAX15050 toc04
V
OUT
AC-COUPLED
100mV/div
4A
I
OUT
2A/div
2A
SWITCHING WAVEFORMS
400ns/div
MAX15050 toc08
V
OUT
AC-COUPLED
50mV/div
I
LX
1A/div
V
LX
2V/div
0V
SHUTDOWN WAVEFORM
10µs/div
MAX15050 toc09
V
EN
5V/div
V
OUT
1V/div
MAX15050/MAX15051
High-Efficiency, 4A, 1MHz, Step-Down Regulators
with Integrated Switches in 2mm x 2mm Package
6 _______________________________________________________________________________________
Typical Operating Characteristics (continued)
(VIN= 5V, output voltage = 1.8V, I
LOAD
= 4A, and TA = +25°C, circuit of Figure 1, unless otherwise noted.)
SOFT-START WAVEFORM
400µs/div
MAX15050 toc10
V
EN
5V/div
V
OUT
1V/div
12
10
8
6
4
INPUT SHUTDOWN CURRENT (µA)
2
0
-40
RMS INPUT CURRENT DURING SHORT
0.50
0.45
0.40
0.35
0.30
0.25
0.20
0.15
RMS INPUT CURRENT (A)
0.10
0.05
CIRCUIT vs. INPUT VOLTAGE
V
= 0V
OUT
0
2.9 5.5
INPUT VOLTAGE (V)
MAX15050 toc13
5.35.14.7 4.93.5 3.7 3.9 4.1 4.3 4.53.1 3.3
FEEDBACK VOLTAGE vs. TEMPERATURE
0.606
0.604
0.602
0.600
0.598
FEEDBACK VOLTAGE (V)
0.596
0.594
-40 85
INPUT SHUTDOWN CURRENT
vs. INPUT VOLTAGE
VIN = 3.3V
VIN = 5V
INPUT VOLTAGE (V)
TEMPERATURE (°C)
HICCUP CURRENT LIMIT
MAX15050 toc11
8065-25 -10 5 3520 50
400µs/div
SOFT-START WITH REFIN/SS
MAX15050 toc14
603510-15
400µs/div
MAX15050 toc12
MAX15050 toc15
V
OUT
1V/div
I
OUT
5A/div
I
IN
2A/div
I
IN
1A/div
V
REFIN/SS
500mV/div
V
OUT
1V/div
V
PWRGD
2V/div
STARTING INTO PREBIASED
OUTPUT WITH 2A LOAD
0V
0V
0A
0V
400µs/div
MAX15050 toc16
V
EN
2V/div
V
OUT
1V/div
I
OUT
2A/div
V
PWRGD
5V/div
STARTING INTO PREBIASED
OUTPUT WITH NO LOAD
0V
0V
0V
400µs/div
MAX15050 toc17
V
EN
2V/div
V
OUT
1V/div
V
PWRGD
2V/div
MAX15050/MAX15051
High-Efficiency, 4A, 1MHz, Step-Down Regulators
with Integrated Switches in 2mm x 2mm Package
_______________________________________________________________________________________ 7
Typical Operating Characteristics (continued)
(VIN= 5V, output voltage = 1.8V, I
LOAD
= 4A, and TA = +25°C, circuit of Figure 1, unless otherwise noted.)
Pin Description
CASE TEMPERATURE
vs. AMBIENT TEMPERATURE
100
I
= 4A
LOAD
80
60
40
20
0
CASE TEMPERATURE (°C)
-20
-40
-40 85
AMBIENT TEMPERATURE (°C)
TRANSITION FROM SKIP MODE
TO FORCED PWM
MAX15050 toc18
603510-15
10ms/div
MAX15050 toc19
I
OUT
2A/div
V
LX
5V/div
V
OUT
500mV/div
TRANSITION FROM FORCED PWM
TO SKIP MODE
10ms/div
BUMP NAME FUNCTION
A1, A2 GND
A3, A4 IN
B1, B2,
B3
LX
B4 V
C1 BST
C2, C3 I.C. Internally Connected. Leave unconnected or connect to ground.
C4 EN Enable Input. Connect EN to GND to disable the device. Connect EN to IN to enable the device.
D1 PWRGD
D2 FB
D3 COMP
Analog/Power Ground. Connect GND to the PCB ground plane at one point near the input bypass
capacitor return terminal as close as possible to the device.
Power-Supply Input. Input supply range is from 2.9V to 5.5V. Bypass IN to GND with a 22µF ceramic
capacitor in parallel to a 0.1µF ceramic capacitor as close as possible to the device.
Inductor Connection. All LX bumps are internally connected together. Connect all LX bumps to the
switched side of the inductor. LX is high impedance when the device is in shutdown mode.
3.3V LDO Output. VDD powers the internal analog core. Connect a low-ESR, ceramic capacitor with a
DD
minimum value of 2.2µF from V
to GND.
DD
High-Side MOSFET Driver Supply. Connect BST to LX with a 0.1µF capacitor.
Power-Good Output. PWRGD is an open-drain output that goes high impedance when V
of V
REFIN/SS
V
REFIN/SS
mode, V
and V
or V
DD
REFIN/SS
REFIN/SS
is below the internal UVLO threshold, or the device is in thermal shutdown.
is above 0.54V. PWRGD is internally pulled low when VFB falls below 90% of
is below 0.54V. PWRGD is internally pulled low when the device is in shutdown
Feedback Input. Connect FB to the center tap of an external resistor-divider from the output to GND to set
the output voltage from 0.6V to 90% of V
.
IN
Voltage-Error Amplifier Output. Connect the necessary compensation network from COMP to FB and the
converter output (see the Compensation Design section). COMP is internally pulled to GND when the
device is in shutdown mode.
MAX15050 toc20
exceeds 92.5%
FB
I
OUT
2A/div
V
LX
5V/div
V
OUT
500mV/div
D4 REFIN/SS
External Reference Input/Soft-Start Timing Capacitor Connection. Connect REFIN/SS to a system voltage to
force FB to regulate to REFIN/SS voltage. REFIN/SS is internally pulled to GND when the device is in
shutdown and thermal shutdown mode. If no external reference is applied, the internal 0.6V reference is
automatically selected. REFIN/SS is also used to perform soft-start. Connect a minimum of 1nF capacitor
from REFIN/SS to GND to set the startup time (see the Soft-Start and Reference Input (REFIN/SS) section).
MAX15050/MAX15051
High-Efficiency, 4A, 1MHz, Step-Down Regulators
with Integrated Switches in 2mm x 2mm Package
8 _______________________________________________________________________________________
Block Diagram
V
DD
MAX15050
EN
SHUTDOWN
CONTROL
UVLO
CIRCUITRY
3.3V (LDO)
CURRENT-LIMIT
COMPARATOR
MAX15051
BIAS
GENERATOR
VOLTAGE
REFIN/SS
FB
REFERENCE
SOFT-START
THERMAL
SHUTDOWN
ERROR
AMPLIFIER
PWM
COMPARATOR
V
RAMP
SHDN
1V
P-P
CONTROL
LOGIC
CURRENT-LIMIT
COMPARATOR
OSCILLATOR
LX
ILIM THRESHOLD
BST SWITCH
IN
BST
IN
LX
GND
ILIM
THRESHOLD
COMP
SHDN
COMP CLAMPS
FB
0.9 x V
REFIN/SS
PWRGD
GND
MAX15050/MAX15051
High-Efficiency, 4A, 1MHz, Step-Down Regulators
with Integrated Switches in 2mm x 2mm Package
_______________________________________________________________________________________ 9
Figure 1. All-Ceramic Capacitor Design with V
OUT
= 1.8V
Detailed Description
The MAX15050/MAX15051 high-efficiency, voltagemode switching regulators can deliver up to 4A of output current. The MAX15050/MAX15051 provide output
voltages from 0.6V to (0.9 x V
IN
) from 2.9V to 5.5V input
supplies, making them ideal for on-board point-of-load
applications. The output-voltage accuracy is better than
±1% over load, line, and temperature.
The MAX15050/MAX15051 feature a 1MHz fixed switching frequency, allowing the user to achieve all-ceramic
capacitor designs and fast transient responses. The high
operating frequency minimizes the size of external components. The MAX15050/MAX15051 are available in a
2mm x 2mm, 16-bump (4 x 4 array), 0.5mm pitch WLP
package. The REFIN/SS function makes the
MAX15050/MAX15051 ideal solutions for DDR and tracking power supplies. Using internal low-R
DS(ON)
(24mΩ
and 18mΩ) n-channel MOSFETs for the high- and lowside switches, respectively, maintains high efficiency at
both heavy-load and high-switching frequencies.
The MAX15050/MAX15051 employ voltage-mode control architecture with a high-bandwidth (> 26MHz) error
amplifier. The op-amp voltage-error amplifier works with
type III compensation to fully utilize the bandwidth of
the high-frequency switching to obtain fast transient
response. Adjustable soft-start time provides flexibilities
to minimize input startup inrush current. An open-drain,
power-good (PWRGD) output goes high impedance
when V
FB
exceeds 92.5% of V
REFIN/SS
and V
REFIN/SS
is above 0.54V. PWRGD goes low when VFBfalls below
90% of V
REFIN/SS
or V
REFIN/SS
is below 0.54V.
Controller Function
The controller logic block is the central processor that
determines the duty cycle of the high-side MOSFET
under different line, load, and temperature conditions.
Under normal operation, where the current-limit and
temperature protection are not triggered, the controller
logic block takes the output from the PWM comparator
and generates the driver signals for both high-side and
low-side MOSFETs. The control logic block controls the
break-before-make logic and the timing for charging
the bootstrap capacitors. The error signal from the voltage-error amplifier is compared with the ramp signal
generated by the oscillator at the PWM comparator to
produce the required PWM signal. The high-side switch
turns on at the beginning of the oscillator cycle and
Typical Application Circuit
INPUT
2.9V TO 5.5V
22µF
IN
IN
V
ON
EN
REFIN/SS
U1
MAX15050
MAX15051
DD
GND
0.1µF
2.2µF
C3
C5
OFF
C8
0.033µF
C1
BST
BST
GND
COMP
PWRGD
C15
1000pF
OPTIONAL
C2
47µF
OUTPUT
1.8V/4A
C4
0.01µF
R3
8.06kΩ
1%
R7
4.02kΩ
1%
C9
0.1µF
LX
LX
LX
FB
0.82µH
C11
1500pF
L1
C12
56pF
R4
5.62kΩ
R10
2.2Ω
R5
20kΩ
C10
1000pF
71.5Ω
R6
V
DD
MAX15050/MAX15051
High-Efficiency, 4A, 1MHz, Step-Down Regulators
with Integrated Switches in 2mm x 2mm Package
10 ______________________________________________________________________________________
turns off when the ramp voltage exceeds the V
COMP
signal or the current-limit threshold is exceeded. The
low-side switch then turns on for the remainder of the
oscillator cycle.
Skip Mode (MAX15050)
The MAX15050 features a skip function. In skip mode,
the MAX15050 switches only as necessary to maintain
the output at light loads (not capable of sinking current
from the output). This maximizes light-load efficiency
and reduces the input quiescent current.
In skip mode, the low-side switch is turned off when the
inductor current decreases to 0.2A (typ) to ensure no
reverse current flowing from the output capacitor.
The high-side switch minimum on-time is controlled to
guarantee that 0.9A current is reached to avoid high
frequency bursts at no-load conditions, which prevents
a rapid increase of the supply current caused by additional switching losses. Under heavy load, the device
operates as a PWM converter.
Current Limit
The internal, high-side MOSFET has a typical 8A peak
current-limit threshold. When current flowing out of LX
exceeds this limit, the high-side MOSFET turns off and
the low-side MOSFET turns on. The low-side MOSFET
remains on until the inductor current falls below the lowside current limit. This lowers the duty cycle and causes the output voltage to droop until the current limit is
no longer exceeded. The MAX15050/MAX15051 use a
hiccup mode to prevent overheating during short-circuit output conditions.
During current limit, if VFBdrops below 70% of
V
REFIN/SS
and stays below this level for typically 36µs
or more, the device enters hiccup mode. The high-side
MOSFET and the low-side MOSFET turn off and both
COMP and REFIN/SS are internally pulled low. The
device remains in this state for 896 clock cycles and
then attempts to restart for 112 clock cycles. If the faultcausing current limit has cleared, the device resumes
normal operation. Otherwise, the device reenters hiccup mode.
Soft-Start and Reference Input (REFIN/SS)
The MAX15050/MAX15051 utilize an adjustable softstart function to limit inrush current during startup. An
8µA (typ) current source charges an external capacitor
connected to REFIN/SS. The soft-start time is adjusted
by the value of the external capacitor from REFIN/SS to
GND. The required capacitance value is determined as:
where tSSis the required soft-start time in seconds.
Connect a minimum 1nF capacitor between REFIN/SS
and GND. REFIN/SS is also an external reference input
(REFIN/SS). The device regulates FB to the voltage
applied to REFIN/SS. The internal soft-start is not available when using an external reference. Figure 2 shows
a method of soft-start when using an external reference. If an external reference is not applied, the device
uses the internal 0.6V reference.
Undervoltage Lockout (UVLO)
The UVLO circuitry inhibits switching when VDDis
below 2.55V (typ). Once VDDrises above 2.6V (typ),
UVLO clears and the soft-start function activates. A
50mV hysteresis is built-in for glitch immunity.
BST
The gate-drive voltage for the high-side, n-channel
switch is generated by a flying-capacitor boost circuit.
The capacitor between BST and LX is charged from the
VINsupply while the low-side MOSFET is on. When the
low-side MOSFET is switched off, the voltage of the
capacitor is stacked above LX to provide the necessary
turn-on voltage for the high-side internal MOSFET.
Power-Good Output (PWRGD)
PWRGD is an open-drain output that goes high
impedance when VFBis above 92.5% x V
REFIN/SS
and
V
REFIN/SS
is above 0.54V. PWRGD pulls low when V
FB
is below 90% of V
REFIN/SS
for at least 48 clock cycles
or V
REFIN/SS
is below 0.54V. PWRGD is low during
shutdown.
Figure 2. Typical Soft-Start Implementation with External
Reference
At
×806µ
C
=
SS
V
.
REFIN/SS
C
R1
R2
MAX15050
MAX15051
MAX15050/MAX15051
High-Efficiency, 4A, 1MHz, Step-Down Regulators
with Integrated Switches in 2mm x 2mm Package
______________________________________________________________________________________ 11
Setting the Output Voltage
The MAX15050/MAX15051 output voltage is adjustable
from 0.6V to 90% of VINby connecting FB to the center
tap of a resistor-divider between the output and GND
(Figure 3). To determine the values of the resistordivider, first select the value of R3 between 2kΩ and
10kΩ. Then use the following equation to calculate R4:
R4 = (V
FB
x R3)/(V
OUT
- VFB)
where V
FB
is equal to the reference voltage at
REFIN/SS and V
OUT
is the output voltage. For V
OUT
=
V
FB
, remove R4. If no external reference is applied at
REFIN/SS, the internal reference is automatically selected and V
FB
becomes 0.6V.
Shutdown Mode
Drive EN to GND to shut down the device and reduce
quiescent current to less than 10µA. During shutdown,
LX is high impedance. Drive EN high to enable the
MAX15050/MAX15051.
Thermal Protection
Thermal-overload protection limits total power dissipation in the device. When the junction temperature
exceeds TJ= +165°C, a thermal sensor forces the
device into shutdown, allowing the die to cool. The thermal sensor turns the device on again after the junction
temperature cools by 20°C, causing a pulsed output
during continuous overload conditions. The soft-start
sequence begins after recovery from a thermal-shutdown condition.
Applications Information
IN and VDDDecoupling
To decrease the noise effects due to the high switching
frequency and maximize the output accuracy of
the MAX15050/MAX15051, decouple VINwith a 22µF
capacitor in parallel with a 0.1µF capacitor from VINto
GND. Also decouple VDDwith a 2.2µF capacitor from V
DD
to GND. Place these capacitors as close as possible to
the device.
Inductor Selection
Choose an inductor with the following equation:
where LIR is the ratio of the inductor ripple current to
full load current at the minimum duty cycle and fSis the
switching frequency (1MHz). Choose LIR between 20%
to 40% for best performance and stability.
Use an inductor with the lowest possible DC resistance
that fits in the allotted dimensions. Powdered iron or fer-
rite core types are often the best choice for performance. With any core material, the core must be large
enough not to saturate at the current limit of the
MAX15050/MAX15051.
Output-Capacitor Selection
The key selection parameters for the output capacitor
are capacitance, ESR, ESL, and voltage-rating requirements. These affect the overall stability, output ripple
voltage, and transient response of the DC-DC converter. The output ripple occurs due to variations in the
charge stored in the output capacitor, the voltage drop
due to the capacitor’s ESR, and the voltage drop due to
the capacitor’s ESL. Estimate the output-voltage ripple
due to the output capacitance, ESR, and ESL as follows:
where the output ripple due to output capacitance,
ESR, and ESL is:
whichever is higher.
Figure 3. Setting the Output Voltage with a Resistor VoltageDivider
VVV
×−
()
L
OUT IN OUT
=
f V LIR I
×××
S IN OUT MAX
()
LX
MAX15050
MAX15051
FB
R3
R4
VV
RIPPLE RIPPLE C
VV
RIPPLE ESR RIPPLE ESL
V
RIPPLE C
VIx
RIPPLE ESR P P()=−
and V
RIPPLE ESL
V
RIPPLE ESL
=+
() ()
=
()
xC xf
8
+
I
−
PP
OUT S
()
EESR
I
−
PP
=
()
()
=
t
ON
I
−
PP
t
OFF
xx ESL or
x ESL
MAX15050/MAX15051
High-Efficiency, 4A, 1MHz, Step-Down Regulators
with Integrated Switches in 2mm x 2mm Package
The peak-to-peak inductor current (I
P-P
) is:
Use these equations for initial output-capacitor selection. Determine final values by testing a prototype or an
evaluation circuit. A smaller ripple current results in less
output-voltage ripple. Since the inductor ripple current
is a factor of the inductor value, the output-voltage ripple decreases with larger inductance. Use ceramic
capacitors for low ESR and low ESL at the switching
frequency of the converter. The ripple voltage due to
ESL is negligible when using ceramic capacitors.
Load-transient response depends on the selected output capacitance. During a load transient, the output
instantly changes by ESR x ∆I
LOAD
. Before the controller can respond, the output deviates further,
depending on the inductor and output capacitor values. After a short time, the controller responds by regulating the output voltage back to its predetermined
value. The controller response time depends on the
closed-loop bandwidth. A higher bandwidth yields a
faster response time, preventing the output from deviating further from its regulating value. See the
Compen-
sation Design
section for more details. The minimum
recommended output capacitance for the MAX15051
and MAX15051 is 47µF and 22µF, respectively.
Input-Capacitor Selection
When transitioning from skip mode to PWM mode
(MAX15050) with a large current load step, additional output capacitance can be used to help minimize the loadtransient response. The input capacitor reduces the
current peaks drawn from the input power supply and
reduces switching noise in the device. The total input
capacitance must be equal to or greater than the value
given by the following equation to keep the input ripple
voltage within the specification and minimize the high-frequency ripple current being fed back to the input source:
where V
IN-RIPPLE
is the maximum-allowed input ripple
voltage across the input capacitors and is recommended to be less than 2% of the minimum input voltage, D
is the duty cycle (V
OUT/VIN
), TSis the switching period
(1/fS) = 1µs, and I
OUT
is the output load.
The impedance of the input capacitor at the switching frequency should be less than that of the input source so
high-frequency switching currents do not pass through
the input source, but are instead shunted through the
input capacitor. The input capacitor must meet the ripple
current requirement imposed by the switching currents.
The RMS input ripple current is given by:
where I
RIPPLE
is the input RMS ripple current.
Compensation Design
The power transfer function consists of one double pole
and one zero. The double pole is introduced by the
inductor, L, and the output capacitor, CO. The ESR of the
output capacitor determines the zero. The double pole
and zero frequencies are given as follows:
where RLis equal to the sum of the output inductor’s DC
resistance (DCR) and the internal switch resistance,
R
DS(ON)
. A typical value for R
DS(ON)
is 25mΩ. ROis the
output load resistance, which is equal to the rated output
voltage divided by the rated output current. ESR is the
total equivalent series resistance of the output capacitor. If
there is more than one output capacitor of the same type
in parallel, the value of the ESR in the above equation is
equal to that of the ESR of a single output capacitor divided by the total number of output capacitors.
The MAX15050/MAX15051 high switching frequency
allows the use of ceramic output capacitors. Since the ESR
of ceramic capacitors is typically very low, the frequency of
the associated transfer function zero is higher than the
unity-gain crossover frequency, fC, and the zero cannot be
used to compensate for the double pole created by the
output inductor and capacitor. The double pole produces
a gain drop of 40dB/decade and a phase shift of 180°. The
compensation network must compensate for this gain drop
and phase shift to achieve a stable high-bandwidth closedloop system. Therefore, use type III compensation as
shown in Figure 4 and Figure 5. Type III compensation
possesses three poles and two zeros with the first pole,
f
P1_EA
, located at zero frequency (DC). Locations of other
poles and zeros of the type III compensation are given by:
12 ______________________________________________________________________________________
I
PP
−
VV
−
IN OUTSOUT
=
fL
×
V
x
V
IN
C
IN MIN
_
DxT xI
=
SOUT
V
IN RIPPLE
−
VVV
×−()
OUT IN OUT
V
IN
II
RIPPLE LOAD
=×
O
1
1
xR xC
π
xR xC
π
1
+
⎛
R ESR
O
⎜
⎝
+
RR
OL
O
1
⎞
⎟
⎠
==
ff
PLC P LC
12
__
π
2
xLxC x
f
Z ESR
_
=
2π
x ESR x C
f
f
ZEA1
ZEA2
=
_
211
=
_
233
MAX15050/MAX15051
The above equations are based on the assumptions that
C1 >> C2, and R3 >> R2, which are true in most applications. Placements of these poles and zeros are determined by the frequencies of the double pole and ESR
zero of the power transfer function. It is also a function
of the desired closed-loop bandwidth. The following
section outlines the step-by-step design procedure to
calculate the required compensation components for
the MAX15050/MAX15051.
The output voltage is determined by:
where VFBis the feedback voltage equal to V
REFIN/SS
or 0.6V depending whether or not an external reference
voltage is applied to REFIN/SS.
For V
OUT
= VFB, R4 is not needed.
The zero-cross frequency of the closed-loop, fC, should
be between 10% and 20% of the switching frequency,
fS (1MHz). A higher zero-cross frequency results in
faster transient response. Once fCis chosen, C1 is calculated from the following equation:
where V
P-P
= 1V
P-P
(typ).
Due to the underdamped nature of the output LC double
pole, set the two zero frequencies of the type III compensation less than the LC double-pole frequency to provide
adequate phase boost. Set the two zero frequencies to
80% of the LC double-pole frequency. Hence:
Setting the second compensation pole, f
P2_EA
, at
f
Z_ESR
yields:
Set the third compensation pole at 1/2 of the switching
frequency (500kHz) to gain phase margin. Calculate
C2 as follows:
The above equations provide accurate compensation
when the zero-cross frequency is significantly higher
than the double-pole frequency. When the zero-cross
frequency is near the double-pole frequency, the actual
zero-cross frequency is higher than the calculated frequency. In this case, lowering the value of R1 reduces
the zero-cross frequency. Also, set the third pole of the
type III compensation close to the switching frequency
(1MHz) if the zero-cross frequency is above 200kHz to
boost the phase margin. The recommended range for
R3 is 2kΩ to 10kΩ. Note that the loop compensation
remains unchanged if only R4’s resistance is altered to
set different outputs.
High-Efficiency, 4A, 1MHz, Step-Down Regulators
with Integrated Switches in 2mm x 2mm Package
______________________________________________________________________________________ 13
Figure 4. Type III Compensation Network
Figure 5. Type III Compensation Illustration
f
PEA
2_
f
PEA3
_
=
=
1
xR xC
π
223
1
x
π
RRxC12
2
VR
×
R
43=
FB
VV
()
−
OUT FB
C
1
=
xxRx
231
.
1 5625
⎛
⎞
V
IN
⎜
⎟
V
⎝
⎠
−
PP
R
L
+×
()π
R
O
f
C
L x C x R ESR
x
OO
RR
L x C x R ESR
x
OO
RR
C
R
1
3
=
1
=
08 1
1
xR
08 3
xC
C x ESR
O
R
23=
C
+
()
+.
LO
+
()
+.
LO
C
2
=
xR x f
π
1
1
S
L
LX
C
OUT
MAX15050
MAX15051
FB
C1
COMP
R1
C2
V
OUT
R3
R4
R2
C3
GAIN (dB)
COMPENSATION
TRANSFER
FUNCTION
POWER-STAGE
TRANSFER
FUNCTION
FIRST AND SECOND ZEROS
FREQUENCY (Hz)
DOUBLE POLE
OPEN-LOOP
GAIN
THIRD
POLE
SECOND
POLE
MAX15050/MAX15051
High-Efficiency, 4A, 1MHz, Step-Down Regulators
with Integrated Switches in 2mm x 2mm Package
14 ______________________________________________________________________________________
Soft-Starting Into a Prebiased Output
The MAX15050/MAX15051 can soft-start into a prebiased output without discharging the output capacitor.
In safe prebiased startup, both low-side and high-side
switches remain off to avoid discharging the prebiased
output. PWM operation starts when the voltage on
REFIN/SS crosses the voltage on FB. The PWM activity
starts with the low-side switch turning on first to build
the bootstrap capacitor charge. Power-good (PWRGD)
asserts 48 clock cycles after FB crosses 92.5% of the
final regulation set point. After 4096 clock cycles, the
MAX15050 switches from prebiased safe-startup mode
to either a skip mode or a forced PWM mode depending on whether the inductor current reaches zero. The
MAX15051 switches from the prebiased safe-startup
mode to forced PWM mode regardless of inductor current level.
The MAX15051 also can start into a prebiased voltage
higher than the nominal set point without abruptly discharging the output. This is achieved by using the sink
current control of the low-side MOSFET, which has four
internally set sinking current-limit thresholds. An internal
4-bit DAC steps through these thresholds, starting from
the lowest current limit to the highest, in 128 clock
cycles on every power-up.
PCB Layout Considerations and
Thermal Performance
Careful PCB layout is critical to achieve clean and stable operation. It is highly recommended to duplicate
the MAX15050/MAX15051 evaluation kit layout for optimum performance. If deviation is necessary, follow
these guidelines for good PCB layout:
1) Place capacitors on IN, V
DD
, and REFIN/SS as
close as possible to the device and the corresponding bump using direct traces.
2) Keep the high-current paths as short and wide as
possible. Keep the path of switching current short
and minimize the loop area formed by LX, the output capacitors, and the input capacitors.
3) Connect IN, LX, and GND separately to a large
copper area to help cool the device to further
improve efficiency and long-term reliability.
4) Ensure all feedback connections are short. Place
the feedback resistors and compensation components as close to the device as possible.
5) Route high-speed switching nodes, such as LX and
BST, away from sensitive analog areas (FB, COMP).
Chip Information
PROCESS: BiCMOS
WLP
GND IN
IN
GND
A1 A2 A3 A4
B1 B2 B3 B4
C1 C2 C3
C4
D1 D2 D3
D4
LX LX
V
DD
LX
I.C. I.C.
EN
BST
PWRGD FB COMP REFIN/SS
TOP VIEW
(BUMPS ON BOTTOM)
MAX15050/MAX15051
Pin Configuration
Package Information
For the latest package outline information and land patterns,
go to www.maxim-ic.com/packages
. Note that a “+”, “#”, or
“-” in the package code indicates RoHS status only. Package
drawings may show a different suffix character, but the drawing
pertains to the package regardless of RoHS status.
PACKAGE
TYPE
PACKAGE
CODE
OUTLINE NO.
LAND
PATTERN NO.
16 WLP W162C2+1
21-0200
—
MAX15050/MAX15051
High-Efficiency, 4A, 1MHz, Step-Down Regulators
with Integrated Switches in 2mm x 2mm Package
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________
15
© 2010 Maxim Integrated Products Maxim is a registered trademark of Maxim Integrated Products, Inc.
Revision History
REVISION
NUMBER
0 8/09 Initial release. —
1
2
REVISION
DATE
10/09
3/10
DESCRIPTION
Remove future product asterisk for MAX15051, update Electrical Characteris tics
table and Typical Operating Characteristics.
Revised Absolute Maximum Ratings and Electrical Characteristics table global
and note.
PAGES
CHANGED
1, 2, 4, 5, 6, 12,
14
2, 3, 4
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