4.5-digit, analog-to-digital converters (ADCs) with integrated liquid crystal display (LCD) drivers operate from a
single 2.7V to 5.25V power supply. They include an internal reference, a high-accuracy on-chip oscillator, and a
triplexed LCD driver. An internal charge pump generates
the negative supply needed to power the integrated input
buffer for single supply operation. The ADC is configurable for either a ±2V or ±200mV input range and it outputs its conversion results to an LCD. The MAX1491 is a
3.5-digit (±1999 count) device, and the MAX1493/
MAX1495 are 4.5-digit (±19,999 count) devices.
The MAX1491/MAX1493/MAX1495 do not require external-precision integrating or auto-zero capacitors, crystal
oscillators, charge pumps, or other circuitry required
with dual slope ADCs (commonly used in panel meter
circuits). These devices also feature on-chip buffers for
the differential signal and reference inputs, allowing
direct interface with high-impedance signal sources. In
addition, the MAX1491/MAX1493/MAX1495 use continuous internal offset calibration, and offer >100dB rejection of 50Hz and 60Hz line noise. The MAX1493/
MAX1495 perform enhanced offset calibration at powerup. The MAX1495 also performs enhanced calibration
on demand. Other features include data hold and peak
hold, and a user programmable low-battery monitor.
The MAX1493/MAX1495 come in a 32-pin 7mm ✕ 7mm
TQFP package, and the MAX1491 comes in 28-pin
SSOP and 28-pin DIP packages. All devices in this family operate over the 0°C to +70°C commercial temperature range.
, unless otherwise noted. Typical values are at +25°C, unless otherwise noted.)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
AVDDto GND............................................................-0.3V to +6V
DV
DD
to GND ...........................................................-0.3V to +6V
AIN+, AIN- to GND...............................V
NEG
to + (AVDD+ 0.3V)
REF+, REF- to GND..............................V
NEG
to + (AVDD+ 0.3V)
LOWBATT to GND ...................................-0.3V to (AV
DD
+ 0.3V)
INTREF, RANGE, DPSET1, DPSET2, PEAK,
HOLD to GND......................................-0.3V to (DV
DD
+ 0.3V)
DPON to GND..........................................-0.3V to (DV
DD
+ 0.3V)
V
NEG
to GND ...........................................-2.6V to (AVDD+ 0.3V)
Maximum Current into Any Pin ...........................................50mA
, unless otherwise noted. Typical values are at +25°C, unless otherwise noted.)
Note 1: Integral nonlinearity is the derivation of the analog values at any code from its theoretical value after nulling the gain error
and offset error.
Note 2: Offset calibrated.
Note 3: Offset nulled.
Note 4: The input voltage range for the analog inputs is given with respect to the voltage on the negative input of the differential pair.
Note 5: For the range of V
AIN+
or V
AIN-
= -2.2V to +2.2V and V
REF+
or V
REF-
= -2.2V to +2.2V.
Note 6: External load must be constant during conversion for specified accuracy. Guaranteed specification of 2mV/mA is a result of
production test limitations.
Note 7: Measured at DC by changing the power-supply voltage from 2.7V to 5.25V and measuring its effect on the conversion error.
PSRR at 50Hz and 60Hz exceeds 120dB with filter notches of 10, 20, 30, 40, 50, or 60Hz.
Note 8: Analog power-supply currents are measured with all digital inputs at either GND or DV
DD
. Digital power-supply currents
measured with all digital inputs at either GND or DV
DD
.
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
POWER SUPPLY
AVDD VoltageAV
DVDD VoltageDV
Power-Supply Rejection AV
Power-Supply Rejection DV
AVDD CurrentI
DVDD CurrentI
LCD DRIVER
RMS Segment-On Voltage
RMS Segment-Off Voltage
Display Multiplex Rate107Hz
LCD Data-Update Rate2.5Hz
DD
DD
DD
DD
PSRRA(Note 7)80dB
PSRRD(Note 7)100dB
AVDD
DVDD
(Note 8)660µA
DVDD = 5V320
DVDD = 3.3V180
2.705.25V
2.705.25V
1.92 x
DV
DD
1 / 3 x
DV
DD
µA
V
V
MAX1491/MAX1493/MAX1495
3.5- and 4.5-Digit, Single-Chip
ADCs with LCD Drivers
Internal Reference Logic Input. Connect to GND to select external reference mode. Connect
to DV
Digital Power Input. Connect DVDD to a 2.7V to 5.25V power supply. Bypass DVDD to GND
DD
with a 0.1µF and a 4.7µF capacitor.
Analog Power Input. Connect AVDD to a 2.7V to 5.25V power supply. Bypass AVDD to GND
DD
with a 0.1µF and a 4.7µF capacitor.
Positive Analog Input. Positive side of fully differential analog input. Bypass A
a 0.1µF or greater capacitor.
Negative Analog Input. Negative side of fully differential analog input. Bypass A
with a 0.1µF or greater capacitor.
Negative Reference Input. For internal reference operation, connect REF- to GND. For
external reference operation, bypass REF- to GND with a 0.1µF capacitor and set V
-2.2V to +2.2V, provided V
Positive Reference Input. For internal reference operation, connect a 4.7µF capacitor from
REF+ to GND. For external reference operation, bypass REF+ to GND with a 0.1µF capacitor
and set V
Range Logic Input. RANGE controls the fully differential analog input range. Connect to GND
for the ±2V input range. Connect to DV
Decimal Point Logic Input 1. Controls the decimal point of the LCD. See the Decimal PointControl section.
Decimal Point Logic Input 2. Controls the decimal point of the LCD. See the Decimal PointControl section.
Peak Logic Input. Connect to DV
GND to disable the peak function.
to select the internal reference mode.
DD
from -2.2V to +2.2V, provided V
REF+
> V
REF+
LOWB ATT
to GND with
IN+
to GND
IN-
.
REF-
> V
REF+
< 2.048V ( typ ) , the LO WBATT sym b ol on the LC D tur ns on.
for the ±200mV input range.
DD
to display the highest ADC value on the LCD. Connect to
DD
REF-
.
REF-
from
Hold Logic Input. Connect to DV
1411HOLD
1512SEG1LCD Segment 1 Driver
1613SEG2LCD Segment 2 Driver
1714SEG3LCD Segment 3 Driver
1815SEG4LCD Segment 4 Driver
1916SEG5LCD Segment 5 Driver
2017SEG6LCD Segment 6 Driver
GND to update the LCD at a rate of 2.5Hz and disable the hold function. For the MAX1495,
placing the device into hold mode initiates an enhanced offset calibration. Assert HOLD high
for a minimum of 2s to ensure the completion of enhanced offset calibration.
to hold the current ADC value on the LCD. Connect to
DD
MAX1491/MAX1493/MAX1495
3.5- and 4.5-Digit, Single-Chip
ADCs with LCD Drivers
The MAX1491/MAX1493/MAX1495 low-power, highly
integrated ADCs with LCD drivers convert a ±2V differential input voltage (one count is equal to 100µV for the
MAX1493/MAX1495 and 1mV for the MAX1491) with a
sigma-delta ADC and output the result to an LCD. An
additional ±200mV input range (one count is equal to
10µV for the MAX1493/MAX1495 and 100µV for the
MAX1491) is available to measure small signals with
increased resolution.
These devices operate from a single 2.7V to 5.25V power
supply and offer 3.5-digit (MAX1491) or 4.5-digit
(MAX1493/MAX1495) conversion results. An internal
2.048V reference, internal charge pump and a high-accuracy on-chip oscillator eliminate external components.
These devices also feature on-chip buffers for the differential input signal and external reference inputs,
allowing direct interface with high-impedance signal
sources. In addition, they use continuous internal offset
calibration, and offer >100dB of 50Hz and 60Hz line
noise rejection. Other features include data hold and
peak hold, and a low-battery monitor. The MAX1495
also performs enhanced offset calibration on demand.
Analog Input Protection
Internal protection diodes limit the analog input range
from V
NEG
to (AVDD+ 0.3V). If the analog input
exceeds this range, limit the input current to 10mA.
Internal Analog Input/
Reference Buffers
The MAX1491/MAX1493/MAX1495 analog input/reference buffers allow the use of high-impedance signal
sources. The input buffers’ common-mode input range
allows the analog inputs and reference to range from
-2.2V to +2.2V.
Modulator
The MAX1491/MAX1493/MAX1495 perform analog-todigital conversions using a single-bit, 3rd-order, sigmadelta modulator. The sigma-delta modulation converts
the input signal into a digital pulse train whose average
duty cycle represents the digitized signal information.
The modulator quantizes the input signal at a much
higher sample rate than the bandwidth of the input.
The MAX1491/MAX1493/MAX1495 modulator provides
3rd-order frequency shaping of the quantization noise
resulting from the single-bit quantizer. The modulator is
fully differential for maximum signal-to-noise ratio and
minimum susceptibility to power-supply noise. A singlebit data stream is then presented to the digital filter for
processing, to remove the frequency-shaped quantization noise.
Digital Filtering
The MAX1491/MAX1493/MAX1495 contain an on-chip
digital lowpass filter that processes the data stream
from the modulator using a SINC4 (sinx/x)
4
response.
The SINC4filter has a settling time of four output data
periods (4 x 200ms).
The MAX1491/MAX1493/MAX1495 have 25% overrange
capability built into the modulator and digital filter:
Filter Characteristics
Figure 2 shows the filter frequency response. The SINC
4
characteristic -3dB cutoff frequency is 0.228 times the
first notch frequency (5Hz). The oversampling ratio
(OSR) for the MAX1491 is 128 and the OSR for the
MAX1493/MAX1495 is 1024.
The output data rate for the digital filter corresponds
with the positioning of the first notch of the filter’s frequency response. The notches of the SINC
4
filter are
repeated at multiples of the first notch frequency. The
SINC
4
filter provides an attenuation of better than
100dB at these notches. For example, 50Hz is equal to
10 times the first notch frequency and 60Hz is equal to
12 times the first notch frequency.
Hz
N
z
z
()=
()
()
⎡
⎣
⎢
⎢
⎢
⎤
⎦
⎥
⎥
⎥
1
1
1
1
4
-
-
-N
-
Hf
N
N
f
f
f
f
m
m
()
sin
sin
=
⎛
⎝
⎜
⎞
⎠
⎟
⎛
⎝
⎜
⎞
⎠
⎟
⎡
⎣
⎢
⎢
⎢
⎢
⎢
⎤
⎦
⎥
⎥
⎥
⎥
⎥
1
4
π
π
Figure 2. Frequency Response of the SINC4Filter (Notch at 60Hz)
0
-40
-80
GAIN (dB)
-120
-160
-200
060
FREQUENCY (Hz)
5040302010
MAX1491/MAX1493/MAX1495
Internal Clock
The MAX1491/MAX1493/MAX1495 contain an internal
oscillator. Using the internal oscillator saves board
space by removing the need for an external clock
source. The oscillator is optimized to give 50Hz and
60Hz power supply and common-mode rejection.
Charge Pump
The MAX1491/MAX1493/MAX1495 contain an internal
charge pump to provide the negative supply voltage for
the internal analog input/reference buffers. The bipolar
input range of the analog input/reference buffers allows
the devices to accept negative inputs with high source
impedances. For the charge pump to operate correctly,
connect a 0.1µF capacitor from V
NEG
to GND.
LCD Driver
The MAX1491/MAX1493/MAX1495 contain the necessary backplane and segment driver outputs to drive
3.5-digit (MAX1491) and 4.5-digit (MAX1493/MAX1495)
LCDs. The LCD update rate is 2.5Hz. Figures 4–7 show
the connection schemes for a standard LCD. The
MAX1491/MAX1493/MAX1495 automatically display the
results of the ADC.
Triplexing
An internal resistor string of three equal-value resistors
(52kΩ, 1% matching) is used to generate the display
drive voltages. One end of the string is connected to
DVDDand the other end is connected to GND. Note that
V
LCD(VLCD
= DVDD- GND) should be three times the
threshold voltage for the liquid-crystal material used.
The connection diagram for a typical 7-segment display
font with two annunciators is illustrated in Figure 3 and
Figure 8. The MAX1491/MAX1493/MAX1495 numeric
display drivers (4.5 digits, 3.5 digits) use this configuration to drive a triplexed LCD with three backplanes and
13 segment driver lines (10 for 3.5 digits). Figures 4 and
5 show the assignment of the 4.5-digit display segments
and Figures 6 and 7 show the assignment of the 3.5digit display segments.
The voltage waveforms of the backplane lines and y
segment line (Figure 3) have been chosen as an example. This line intersects with BP1 to form the a segment,
with BP2 to form the g segment, and with BP3 to form
the d segment. Eight different ON/OFF combinations of
the a, g, and d segments and their corresponding
waveforms of the y segment line are illustrated in
Figures 9 and 10. The schematic diagram in Figure 8
shows that each intersection acts as a capacitance
from segment line to common line. Figure 11 illustrates
the voltage across the g segment.
The RMS voltage across the segment determines the
degree of polarization for the liquid-crystal material and
thus the contrast of the segment. The RMS OFF voltage
is always V
LCD
/ 3, whereas the RMS ON voltage is
always 1.92V
LCD
/ 3. This is illustrated in Figure 11. The
ratio of RMS ON to OFF voltage is fixed at 1.92 for a
triplexed LCD.
Figure 12 illustrates contrast vs. applied RMS voltage
with a V
LCD
of 3.1V. The RMS ON voltage is 2.1V and
the RMS OFF voltage is 1.1V. The OFF segment has a
contrast of less than 5%, while the ON segments have
greater than 85% contrast.
3.5- and 4.5-Digit, Single-Chip
ADCs with LCD Drivers
If ghosting is present on the LCD, the RMS OFF voltage
is too high. Choose an LCD with a higher RMS OFF
voltage or decrease DVDD.
Decimal Point Control
The MAX1491/MAX1493/MAX1495 allow for full decimal-point control and feature leading-zero suppression.
Use DPON, DPSET1, and DPSET2 to set the value of
the decimal point. Tables 2 and 3 show the truth tables
of the DPON, DPSET1, and DPSET2 that determine
which decimal point is used.
Reference
The MAX1491/MAX1493/MAX1495 reference sets the
full-scale range of the ADC transfer function. With a
nominal 2.048V reference, the ADC full-scale range is
±2V with RANGE equal to GND. With RANGE equal to
DVDD, the full-scale range is ±200mV. A decreased reference voltage decreases full-scale range (see the
Transfer Functions section).
The MAX1491/MAX1493/MAX1495 accept either an
external reference or an internal reference. The INTREF
input selects the reference mode.
For internal reference operation, connect INTREF to
DVDD, connect REF- to GND, and bypass REF+ to
GND with a 4.7µF capacitor. The internal reference provides a nominal 2.048V source between REF+ and
GND. The internal reference temperature coefficient is
typically 40ppm/°C.
Connect INTREF to GND to use the external reference.
The external reference inputs, REF+ and REF-, are fully
differential. For a valid external reference input, V
REF+
must be greater than V
REF-
. Bypass REF+ and REFwith a 0.1µF or greater capacitor to GND in external reference mode.
Figure 13 shows the MAX1493/MAX1495 operating with
an external differential reference. In this mode, REF- is
connected to the top of the strain gauge and REF+ is
connected to the midpoint of the resistor-divider on the
supply.
Applications Information
Power-On
At power-on, the digital filter and modulator circuits
reset. The MAX1493/MAX1495 allow 6s for the reference to stabilize before performing enhanced offset
calibration. During these 6s, the MAX1493/MAX1495
display 1.2V to 1.5V when a stable reference is detected. If a valid reference is not found, the MAX1493/
MAX1495 time out after 6s and begin enhanced offset
calibration. Enhanced offset calibration typically lasts
2s. The MAX1493/MAX1495 begin converting after
enhanced offset calibration.
Offset Calibration
The MAX1491/MAX1493/MAX1495 offer on-chip offset
calibration. The MAX1491/MAX1493/MAX1495 calibrate
offset during every conversion cycle. The MAX1495
Table 2. Decimal-Point Control Table (MAX1493/MAX1495)
Table 3. Decimal-Point Control Table (MAX1491)
DPONDPSET1DPSET2DISPLAY OUTPUTZERO INPUT READING
0001 8 8 8 80
0011 8 8 8 80
0101 8 8 8 80
0111 8 8 8 80
1001 8 8 8.80.0
1011 8 8.8 80.00
1101 8.8 8 80.000
1111.8 8 8 80.0000
DPSET1DPSET2DISPLAY OUTPUTZERO INPUT READING
001 8 8.80.0
011 8.8 80.00
101.8 8 80.000
111 8 8 8000
MAX1491/MAX1493/MAX1495
3.5- and 4.5-Digit, Single-Chip
ADCs with LCD Drivers
offers enhanced offset calibration on demand. Connect
HOLD to DVDDfor 2s to perform enhanced offset calibration.
Peak
The MAX1491/MAX1493/MAX1495 feature peak detection circuitry. When activated (PEAK connected to DVDD),
the devices display only the highest voltage measured to
the LCD. First, the current ADC result is displayed. Then
the new ADC conversion result is compared to this value.
If the new value is larger than the previous peak value,
the new value is displayed. If the new value is less than
the previous peak value, the display remains unchanged.
Connect PEAK to GND to clear the peak value and disable the peak function. The peak function is only valid for
the -19,487 to +19,999 range for the MAX1493/
MAX1495 and -1217 to +1999 for the MAX1491.
Hold
The MAX1491/MAX1493/MAX1495 feature data HOLD
circuitry. When activated (HOLD connected to DVDD),
the devices hold the current reading on the LCD.
Low Battery
The MAX1491/MAX1493/MAX1495 feature a low-battery
detection input. When the voltage at LOWBATT drops
below 2.048V (typ), the LOWBATT segment of the LCD
turns on.
Strain Gauge Measurement
Connect the differential inputs of the MAX1491/
MAX1493/MAX1495 to the bridge network of the strain
gauge. In Figure 13, the analog supply voltage powers
the bridge network and the MAX1491/MAX1493/
MAX1495 along with its reference voltage. The
MAX1491/MAX1493/MAX1495 handle an analog input
voltage range of ±200mV or ±2V full scale. The analog/reference inputs of the part allow the analog input
range to have an absolute value anywhere between
-2.2V and +2.2V.
4–20mA Measurement
To measure 4–20mA signals, connect a shunt resistor
across AIN+ and AIN- to create the ±2V or ±200mV
input voltage (see Figure 14).
Table 4. LCD Priority Table
Figure 13. Strain-Gauge Application with the MAX1491/MAX1493/
MAX1495
Figure 14. 4–20mA Measurement
ACTIVE
GAUGE
DUMMY
GAUGE
R
0.1µF
ANALOG SUPPLY
FERRITE
BEAD
0.1µF
0.1µF
REF
0.1µF
R
0.1µF
R
4.7µF
REF+
REF-
AIN+
AIN-
AV
DD
MAX1491
MAX1493
MAX1495
GND
R = 100
Ω for ±200mV RANGE
10
0.1µF
DV
DD
V
NEG
INTREF
Ω for ±2V RANGE
4.7µF
0.1µF
4–20mA
HOLDPEAKDISPLAYS
DV
DD
GNDDV
GNDGNDLatest ADC result
XCurrent value
DD
Peak value
0.1µF
R
0.1µF
AIN+
AIN-
MAX1491
MAX1493
MAX1495
±1.8.8.8.8
Transfer Functions
Figures 15–18 show the MAX1491/MAX1493s’ transfer
functions. The transfer function for the MAX1493/
MAX1495 with AIN+ - AIN- ≥ 0 and RANGE = GND is:
The transfer function for the MAX1493 with AIN+ - AIN< 0 and RANGE = GND is:
The transfer function for the MAX1491 with AIN+ - AIN≥ 0 and RANGE = GND is:
The transfer function for the MAX1491 with AIN+ - AIN< 0 and RANGE = GND is:
The transfer function for the MAX1493/MAX1495 with
AIN+ - AIN- ≥ 0 and RANGE = DV
DD
is:
The transfer function for the MAX1493 with AIN+ - AIN< 0 and RANGE = DVDDis:
The transfer function for the MAX1491 with AIN+ - AIN≥ 0 and RANGE = DVDDis:
The transfer function for the MAX1491 with AIN+ - AIN< 0 and RANGE = DVDDis:
Counts
VV
VV
AINAIN
REFREF
=××
⎛
⎝
⎜
⎞
⎠
⎟
×+
+
+
1 0242000101.
-
-
-
-
Counts
VV
VV
AINAIN
REFREF
=×
⎛
⎝
⎜
⎞
⎠
⎟
××
+
+
1 024200010.
-
-
-
-
Counts
VV
VV
AINAIN
REFREF
=××
⎛
⎝
⎜
⎞
⎠
⎟
×+
+
+
1 02420 000101. ,
-
-
-
-
Counts
VV
VV
AINAIN
REFREF
=×
⎛
⎝
⎜
⎞
⎠
⎟
××
+
+
1 02420 000 10. ,
-
-
-
-
Counts
VV
VV
AINAIN
REFREF
=××
⎛
⎝
⎜
⎞
⎠
⎟
+
+
+
1 02420001.
-
-
-
-
Counts
VV
VV
AINAIN
REFREF
=×
⎛
⎝
⎜
⎞
⎠
⎟
×
+
+
1 0242000.
-
-
-
-
Counts
VV
VV
AINAIN
REFREF
=××
⎛
⎝
⎜
⎞
⎠
⎟
+
+
+
1 02420 0001. ,
-
-
-
-
Counts
VV
VV
AINAIN
REFREF
=×
⎛
⎝
⎜
⎞
⎠
⎟
×
+
+
1 02420 000. ,
-
-
-
-
MAX1491/MAX1493/MAX1495
3.5- and 4.5-Digit, Single-Chip
ADCs with LCD Drivers
Figure 15. MAX1493/MAX1495 Transfer Function ±2V Range
Figure 16. MAX1493/MAX1495 Transfer Function ±200mV Range
LCD
1 - - - -
19,999
2
1
0
- 0
- 1
- 2
-19,999
- 1 - - - -
100µV
-100µV
-2V
0
ANALOG INPUT VOLTAGE
+2V
LCD
1 - - - -
19,999
2
1
0
- 0
- 1
- 2
-19,999
- 1 - - - -
10µV
-10µV
-200mV
0
ANALOG INPUT VOLTAGE
+200mV
MAX1491/MAX1493/MAX1495
Supplies, Layout, and Bypassing
Power up AVDDand DVDDbefore applying an analog
input and external reference voltage to the device. If
this is not possible, limit the current into these inputs to
50mA. Isolate the digital supply from the analog supply
with a low-value resistor (10Ω) or ferrite bead when the
analog and digital supplies come from the same
source. For best performance, ground the MAX1491/
MAX1493/MAX1495 to the analog ground plane of the
circuit board.
Avoid running digital lines under the device, because
these may couple noise onto the die. Run the analog
ground plane under the MAX1491/MAX1493/MAX1495
to minimize coupling of digital noise. Make the powersupply lines to the MAX1491/MAX1493/MAX1495 as
wide as possible to provide low-impedance paths and
reduce the effects of glitches on the power-supply line.
Shield fast-switching signals, such as clocks, with digital
ground to avoid radiating noise to other sections of the
board. Avoid running clock signals near the analog
inputs. Avoid crossover of digital and analog signals.
Running traces that are on opposite sides of the board at
right angles to each other reduces feedthrough effects.
Good decoupling is important when using high-resolution ADCs. Decouple the supplies with 4.7µF and 0.1µF
ceramic capacitors to GND. Place these components
as close to the device as possible to achieve the
best decoupling.
Refer to the MAX1494 evaluation kit manual for the recommended layout. The evaluation board package
includes a fully assembled and tested evaluation board.
Definitions
INL
Integral nonlinearity (INL) is the deviation of the values
on an actual transfer function from a straight line. This
straight line is either a best-straight-line fit or a line
drawn between the end points of the transfer function,
once offset and gain errors have been nullified. INL for
the MAX1491/MAX1493/MAX1495 is measured using
the end-point method.
DNL
Differential nonlinearity (DNL) is the difference between
an actual step width and the ideal value of one count. A
DNL error specification of less than one count guarantees
no missing counts and a monotonic transfer function.
Rollover Error
Rollover error is defined as the absolute value difference between a near-positive full-scale reading and
near-negative full-scale reading. Rollover error is tested
by applying a full-scale positive voltage, swapping
AIN+ and AIN-, and then adding the results.
Zero Input Reading
Ideally, with AIN+ connected to AIN-, the MAX1491/
MAX1493/MAX1495 display a zero. Zero input reading
is the measured deviation from the ideal zero and the
actual measured point.
3.5- and 4.5-Digit, Single-Chip
ADCs with LCD Drivers
Gain error is the amount of deviation between the measured full-scale transition point and the ideal full-scale
transition point.
Common-Mode Rejection
Common-mode rejection is the ability of a device to
reject a signal that is common to both input terminals.
The common-mode signal can be either an AC or a DC
signal or a combination of the two. CMR is often
expressed in decibels.
Normal-Mode 50Hz and 60Hz Rejection
(Simultaneously)
Normal mode rejection is a measure of how much output
changes when 50Hz and 60Hz signals are injected into
just one of the differential inputs. The MAX1491/
MAX1493/MAX1495 sigma-delta converter uses its internal digital filter to provide normal mode rejection to both
50Hz and 60Hz power-line frequencies simultaneously.
Power-Supply Rejection Ratio
Power-supply rejection ratio (PSRR) is the ratio of the
input supply change (in volts) to the change in the converter output (in volts). It is measured typically
in decibels.
Enhanced Offset Calibration
Enhanced offset calibration is a more accurate calibration method that is needed in the case of the ±200mV
range and 4.5-digit resolution. The MAX1493/MAX1495
perform the enhanced offset calibration upon power-up.
The MAX1495 also performs enhanced offset calibration
on demand with the HOLD input.
HOLDPEAKLOW BATTERY
BACKPLANE
CONNECTIONS
INTREF
DPSET1
DPSET2
RANGE
PEAK
HOLD
DPON
DV
DD
R
LOW
SEG1–SEG13
(SEG1–SEG10)
MAX1493
MAX1495
(MAX1491)
NEG
0.1µF4.7µF
GNDREF-REF+
V
IN
0.1µF
4.7µF
L
ISO
2.7V TO
5.25V
0.1µF
0.1µF
4.7µF
10µF
AIN+
AIN-
DV
AV
DD
DD
LOWBATTV
R
HI
MAX1491/MAX1493/MAX1495
3.5- and 4.5-Digit, Single-Chip
ADCs with LCD Drivers
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information
go to www.maxim-ic.com/packages
.)
32L/48L,TQFP.EPS
MAX1491/MAX1493/MAX1495
3.5- and 4.5-Digit, Single-Chip
ADCs with LCD Drivers
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information
go to www.maxim-ic.com/packages
.)
12
INCHES
DIM
A
A1
B
HE
N
A
e
D
B
A1
C
D
E
e
H
L
MAX
MIN
0.068
0.078
0.002
0.008
0.010
0.015
0.004
0.008
SEE VARIATIONS
0.205
0.212
0.0256 BSC
0.301
0.311
0.025
0.037
0∞
L
8∞
NOTES:
1. D&E DO NOT INCLUDE MOLD FLASH.
2. MOLD FLASH OR PROTRUSIONS NOT TO EXCEED .15 MM (.006").
3. CONTROLLING DIMENSION: MILLIMETERS.
4. MEETS JEDEC MO150.
5. LEADS TO BE COPLANAR WITHIN 0.10 MM.
MILLIMETERS
MAX
MIN
1.731.99
0.21
0.05
0.38
0.25
0.20
0.09
5.38
5.20
0.65 BSC
7.65
7.90
0.63
0.95
0∞
8∞
INCHES
MIN
D
0.239
D
0.239
D
0.278
D
0.317
0.397
D
PROPRIETARY INFORMATION
TITLE:
MAX
0.249
0.249
0.289
0.328
0.407
MILLIMETERS
MAX
MIN
6.07
6.33
6.07
6.33
7.07
7.33
8.07
8.33
10.07
10.33
PACKAGE OUTLINE, SSOP, 5.3 MM
21-0056
SSOP.EPS
N
14L
16L
20L
24L
28L
C
REV.DOCUMENT CONTROL NO.APPROVAL
1
C
1
MAX1491/MAX1493/MAX1495
3.5- and 4.5-Digit, Single-Chip
ADCs with LCD Drivers
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 25
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information
go to www.maxim-ic.com/packages
.)
PDIPN.EPS
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