Rainbow Electronics MAX126 User Manual

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________________General Description

The MAX125/MAX126 are high-speed, multichannel,
14-bit data-acquisition systems (DAS) with simultane­ous track/holds (T/Hs). These devices contain a 14-bit,
3µs, successive-approximation analog-to-digital con­verter (ADC), a +2.5V reference, a buffered reference
input, and a bank of four simultaneous-sampling T/H
amplifiers that preserve the relative phase information
of the sampled inputs. The MAX125/MAX126 have two
multiplexed inputs for each T/H, allowing a total of eight
inputs. In addition, the converter is overvoltage tolerant
to ±17V; a fault condition on any channel will not harm
the IC. Available input ranges are ±5V (MAX125) and
±2.5V (MAX126).

An on-board sequencer converts one to four channels
per CONVST pulse. In the default mode, one T/H output
(CH1A) is converted. An interrupt signal (INT) is pro­vided after the last conversion is complete. Convert
two, three, or four channels by reprogramming the
MAX125/MAX126 through the bidirectional parallel
interface. Once programmed, the MAX125/MAX126
continue to convert the specified number of channels
per CONVST pulse until they are reprogrammed. The
channels are converted sequentially, beginning with
CH1. The INT signal always follows the end of the last
conversion in a conversion sequence. The ADC con­verts each assigned channel in 3µs and stores the
result in an internal 14x4 RAM. Upon completion of the
conversions, data can be accessed by applying suc­cessive pulses to the RD pin. Four successive reads
access four data words sequentially.

The parallel interface’s data-access and bus-release
timing specifications are compatible with most popular
digital signal processors and 16-bit/32-bit microproces­sors, so the MAX125/MAX126 conversion results can
be accessed without resorting to wait states.

________________________Applications

Multiphase Motor Control
Power-Grid Synchronization
Power-Factor Monitoring
Digital Signal Processing
Vibration and Waveform Analysis

____________________________Features

♦ Four Simultaneous-Sampling T/H Amplifiers with

Two Multiplexed Inputs (eight single-ended inputs
total)

♦ 3µs Conversion Time per Channel
♦ Throughput: 250ksps (1 channel)

142ksps (2 channels)
100ksps (3 channels)
76ksps (4 channels)

♦ Input Range: ±5V (MAX125)

±2.5V (MAX126)

♦ Fault-Protected Input Multiplexer (±17V)
♦ ±5V Supplies
♦ Internal +2.5V or External Reference Operation
♦ Programmable On-Board Sequencer
♦ High-Speed Parallel DSP Interface

MAX125/MAX126

2x4-Channel, Simultaneous-Sampling

14-Bit DAS

________________________________________________________________

Maxim Integrated Products

1

19-1319; Rev 1; 1/98

PART

MAX125ACAX

MAX125BCAX 0°C to +70°C

0°C to +70°C

TEMP. RANGE PIN-PACKAGE

36 SSOP*
36 SSOP*

EVALUATION KIT

AVAILABLE

______________Ordering Information

*

Contact factory for availability.

Typical Operating Circuit appears at end of data sheet.

Pin Configuration appears at end of data sheet.

INL

(LSB)

±2
±4

MAX125AEAX -40°C to +85°C 36 SSOP* ±2
MAX125BEAX -40°C to +85°C 36 SSOP* ±4

MAX125CCAX 0°C to +70°C 36 SSOP ±4

MAX125CEAX -40°C to +85°C 36 SSOP ±4
MAX126ACAX
MAX126BCAX
MAX126CCAX 0°C to +70°C

0°C to +70°C

0°C to +70°C 36 SSOP*

36 SSOP*
36 SSOP

±2
±4

±4
MAX126AEAX -40°C to +85°C 36 SSOP* ±2
MAX126BEAX -40°C to +85°C 36 SSOP* ±4
MAX126CEAX -40°C to +85°C 36 SSOP ±4

MAX125

MAX125/MAX126

2x4-Channel, Simultaneous-Sampling
14-Bit DAS

2 _______________________________________________________________________________________

ABSOLUTE MAXIMUM RATINGS

ELECTRICAL CHARACTERISTICS

(AVDD= +5V ±5%, AVSS= -5V ±5%, DVDD= +5V ±5%, V

REFIN

= 2.5V, AGND = DGND = 0V, 4.7µF capacitor from REFOUT to

AGND, 0.1µF capacitor from REFIN to AGND, f

CLK

= 16MHz, external clock, 50% duty cycle, TA= T

MIN

to T

MAX

, unless otherwise

noted.)

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.

AVDDto AGND ...........................................................-0.3V to 6V

AVSSto AGND............................................................0.3V to -6V

DVDDto DGND...........................................................-0.3V to 6V

AGND to DGND.......................................................-0.3V to 0.3V

CH_ _ to AGND....................................................................±17V

REFIN, REFOUT to AGND ..........................................-0.3V to 6V

Digital Inputs/Outputs to DGND ..............-0.3V to (DVDD+ 0.3V)

Continuous Power Dissipation (TA= +70°C)

SSOP (derate 11.8mW/°C above +70°C) .....................941mW

Operating Temperature Ranges

MAX125_CAX/MAX126_CAX...............................0°C to +70°C

MAX125_EAX/MAX126_EAX ............................-40°C to +85°C

Storage Temperature Range.............................-65°C to +150°C

Lead Temperature (soldering, 10sec)................................300°C

CONDITIONS UNITSMIN TYP MAXSYMBOLPARAMETER

All channels 14NResolution
MAX125A/MAX126A

Bits

±2

INL

Integral Nonlinearity
(Note 2)

MAX12_B/C

LSB

±2 ±4

MAX12_A/B, guaranteed monotonic to 14 bits ±1

TA= +25°C

mV

±5 ±15

Bipolar Zero Error

TA= T

MIN

to T

MAX

±25

Bipolar Zero-Error Match Between all channels mV1.2 5

±5 ppm/°CZero-Code Tempco
±5 ±10

mVGain Error

±15TA= T

MIN

to T

MAX

TA= +25°C

1.2 5 mVGain Error Match
±5

Between all channels

Gain Error Tempco ppm/°C

72 75

SINAD

Single-channel mode,
channel 1A, 250ksps

Signal-to-Noise Plus
Distortion (Note 4)

dB

-89 -80THD Single-channel mode, channel 1A, 250ksps

Total Harmonic
Distortion (Notes 4, 5)

dB

80 90SFDR Single-channel mode, channel 1A, 250ksps

Spurious-Free Dynamic
Range (Note 4)

dB

80Single-channel mode, channel 1A, 250ksps

Channel-to-Channel
Isolation (Note 6)

dB

MAX125C/MAX126C,
guaranteed monotonic to 13 bits

LSB

±2

DNLDifferential Nonlinearity

DC ACCURACY (Note 1)

DYNAMIC PERFORMANCE (f

CLK

= 16MHz, fIN= 10.06kHz) (Notes 1, 3)

70 72

MAX125
MAX126

µA

MAX125/MAX126

2x4-Channel, Simultaneous-Sampling

14-Bit DAS

_______________________________________________________________________________________ 3

ELECTRICAL CHARACTERISTICS (continued)

(AVDD= +5V ±5%, AVSS= -5V ±5%, DVDD= +5V ±5%, V

REFIN

= 2.5V, AGND = DGND = 0V, 4.7µF capacitor from REFOUT to

AGND, 0.1µF capacitor from REFIN to AGND, f

CLK

= 16MHz, external clock, 50% duty cycle, TA= T

MIN

to T

MAX

, unless otherwise

noted.)

CONDITIONS UNITSMIN TYP MAXSYMBOLPARAMETER

MAX125

V

±5

V

IN

Input Voltage Range

MAX125, VIN= ±5V

µA±667I

IN

Input Current

(Note 7) pF16C

IN

Input Capacitance

µs1t

ACQ

Acquisition Time

MHz8Small-Signal Bandwidth
MHz0.5Full-Power Bandwidth

mV/ms2Droop Rate

ns5Aperture Delay

ps

RMS

30Aperture Jitter

ps500Aperture-Delay Matching

TA= +25°C V2.475 2.500 2.525V

REFOUT

Output Voltage

0mA < I

LOAD

< 1mA %±1External Load Regulation

(Note 9) ppm/°C30REFOUT Tempco

µF0.1

External Capacitive
Bypass at REFIN

V2.50 ±10%Input Voltage Range

µF4.7 22

External Capacitive
Bypass at REFOUT

REFIN = 2.5V µA±10Input Current
(Note 10) kΩ10Input Resistance
(Note 7) pF10Input Capacitance

MHz0.1 16External Clock Frequency

V2.4V

IH

Input High Voltage

V0.8V

IL

Input Low Voltage

CONVST, RD, WR, CS, CLK

±1

(Note 7) pF15C

IN

Input Capacitance

A0–A3

µA

±10

I

IN

Input Current

MAX126 ±2.5

MAX126, VIN= ±2.5V

ANALOG INPUT

TRACK/HOLD

REFERENCE OUTPUT (Note 8)

REFERENCE INPUT

EXTERNAL CLOCK

DIGITAL INPUTS (CONVST, RD, WR, CS, CLK, A0–A3) (Note 1)

MAX125/MAX126

2x4-Channel, Simultaneous-Sampling
14-Bit DAS

4 _______________________________________________________________________________________

CONDITIONS UNITSMIN TYP MAXSYMBOLPARAMETER

I

OUT

= 1mA V4V

OH

Output High Voltage

I

OUT

= -1.6mA V0.4V

OL

Output Low Voltage

D0–D13 µA±10Three-State Leakage Current
(Note 7) pF10

Three-State Output
Capacitance

V4.75 5 5.25AV

DD

Positive Supply Voltage

V-5.25 -5 -4.75AV

SS

Negative Supply Voltage

V4.75 5 5.25DV

DD

Digital Supply Voltage

mA17 25I(AVDD)Positive Supply Current
mA-17 -13I(AVSS)Negative Supply Current
mA3 5I(DVDD)Digital Supply Current
mA3Shutdown Positive Current
mA-1Shutdown Negative Current

mA3Shutdown Digital Current
(Note 11) LSB±1 ±2PSRR+Positive Supply Rejection
(Note 11) LSB±2PSRR-Negative Supply Rejection
(Note 12) mW165 250Power Dissipation

DIGITAL OUTPUTS (D0–D13, INT) (Note 1)

POWER REQUIREMENTS

ELECTRICAL CHARACTERISTICS (continued)

(AVDD= +5V ±5%, AVSS= -5V ±5%, DVDD= +5V ±5%, V

REFIN

= 2.5V, AGND = DGND = 0V, 4.7µF capacitor from REFOUT to

AGND, 0.1µF capacitor from REFIN to AGND, f

CLK

= 16MHz, external clock, 50% duty cycle, TA= T

MIN

to T

MAX

, unless otherwise

noted.)

MAX125/MAX126

2x4-Channel, Simultaneous-Sampling

14-Bit DAS

_______________________________________________________________________________________ 5

CONDITIONS

ns30t

CW

CONVST Pulse Width

UNITSMIN TYP MAXSYMBOLPARAMETER

TIMING CHARACTERISTICS (Figure 4)

(AVDD= +5V, AVSS= -5V, DVDD= +5V, AGND = DGND = 0V, TA= T

MIN

to T

MAX

, unless otherwise noted.)

ns0t

CWS

CS to WR Setup Time

ns0t

CWH

CS to WR Hold Time

ns30t

WR

WR Low Pulse Width

ns125t

CSD

CS to CONVST Delay

ns30t

AS

Address Setup Time

ns0t

AH

Address Hold Time

25pF load ns30t

ID

RD to INT Delay

ns40t

RD

Delay Time Between Reads

ns0t

CRS

CS to RD Setup Time

ns0t

CRH

CS to RD Hold Time

ns30t

RD

RD Low Pulse Width

25pF load (Note 13) ns30t

DA

Data-Access Time

25pF load (Note 14) ns5 45t

DH

Bus-Relinquish Time

Mode 1, 1 channel

µs

3
Mode 2, 2 channel 6
Mode 3, 3 channel 9
Mode 4, 4 channel 12

t

CONV

Exiting shutdown µs5Start-Up Time

Note 1: AVDD= +5V, AVSS= -5V, DVDD= +5V, V

REFIN

= 2.500V (external), VIN= ±5V (MAX125) or ±2.5V (MAX126).

Note 2: Relative accuracy is the analog value’s deviation at any code from its theoretical value after the full-scale range has been

calibrated.

Note 3: CLK synchronized with CONVST.
Note 4: f

IN

= 10.06kHz, VIN= ±5V (MAX125) or ±2.5V (MAX126).

Note 5: First five harmonics.
Note 6: All inputs except CH1A driven with ±5V (MAX125) or ±2.5V (MAX126) 10kHz signal; CH1A connected to AGND and digitized.
Note 7: Guaranteed by design. Not production tested.
Note 8: AV

DD

= +5V, AVSS= -5V, DVDD= +5V, VIN= 0V (all channels).

Note 9: Temperature drift is defined as the change in output voltage from +25°C to T

MIN

or T

MAX

. It is calculated as

TC = [∆REFOUT/REFOUT] / ∆T.

Note 10: See Figure 2.
Note 11: Defined as the change in positive full scale caused by a ±5% variation in the nominal supply voltage. Tested with one input

at full scale and all others at AGND. V

REFIN

= 2.5V (internal).

Note 12: Tested with VIN= AGND on all channels, V

REFIN

= 2.5V (internal).

Note 13: The data-access time is defined as the time required for an output to cross 0.8V or 2.0V. It is measured using the circuit of

Figure 1. The measured number is then extrapolated back to determine the value with a 25pF load.

Note 14: The bus-relinquish time is derived from the measured time taken for the data outputs to change 0.5V when loaded with the

circuit of Figure 1. The measured number is then extrapolated back to remove the effects of charging/discharging the 120pF
capacitor. Thus, the time given is the part’s true bus-relinquish time, independent of the external bus loading capacitance.

Conversion Time

Mode 1, 1 channel

ksps

250

Conversion Rate/Channel

Mode 2, 2 channel 142
Mode 3, 3 channel 100
Mode 4, 4 channel 76