Rainbow Electronics MAX1215 User Manual
General Description
The MAX1215 is a monolithic, 12-bit, 250Msps analogto-digital converter (ADC) optimized for outstanding
dynamic performance at high-IF frequencies up to
300MHz. The product operates with conversion rates
up to 250Msps while consuming only 975mW.
At 250Msps and an input frequency up to 250MHz, the
MAX1215 achieves a spurious-free dynamic range
(SFDR) of 72.4dBc. Its excellent signal-to-noise ratio
(SNR) of 66dB at 10MHz remains flat (within 2dB) for
input tones up to 300MHz. This ADC yields an excellent
low noise floor of -67.5dBFS, which makes it ideal for
wideband applications such as cable-head end
receivers and power-amplifier predistortion in cellular
base-station transceivers.
The MAX1215 requires a single 1.8V supply. The analog
input is designed for either differential or single-ended
operation and can be AC- or DC-coupled. The ADC also
features a selectable on-chip divide-by-2 clock circuit,
which allows the user to apply clock frequencies as high
as 340MHz. This helps to reduce the phase noise of the
input clock source. A low-voltage differential signal
(LVDS) sampling clock is recommended for best performance. The converter’s digital outputs are LVDS compatible and the data format can be selected to be either
two’s complement or offset binary.
The MAX1215 is available in a 68-pin QFN package
with exposed paddle (EP) and is specified over the
industrial (-40°C to +85°C) temperature range.
See the Pin-Compatible Versions table for a complete
selection of 8-bit, 10-bit, and 12-bit high-speed ADCs in
this family.
Applications
Base-Station Power-Amplifier Linearization
Cable-Head End Receivers
Wireless and Wired Broadband Communication
Communications Test Equipment
Radar and Satellite Subsystems
Features
♦ 250Msps Conversion Rate
♦ Low Noise Floor of -67.5dBFS
♦ Excellent Low-Noise Characteristics
SNR = 65.5dB at fIN= 100MHz
SNR = 65dB at fIN= 250MHz
♦ Excellent Dynamic Range
SFDR = 70.7dBc at fIN= 100MHz
SFDR = 72.4dBc at fIN= 250MHz
♦ 65.4dB NPR for f
NOTCH
= 28.8MHz and a Noise
Bandwidth of 50MHz
♦ Single 1.8V Supply
♦ 1006mW Power Dissipation at f
SAMPLE
= 250MHz
and fIN= 100MHz
♦ On-Chip Track-and-Hold Amplifier
♦ Internal 1.24V-Bandgap Reference
♦ On-Chip Selectable Divide-by-2 Clock Input
♦ LVDS Digital Outputs with Data Clock Output
♦ MAX1215 EV Kit Available
MAX1215
1.8V, 12-Bit, 250Msps ADC for
Broadband Applications
________________________________________________________________ Maxim Integrated Products 1
PART TEMP RANGE PIN-PACKAGE
MAX1215EGK -40°C to +85°C 68 QFN-EP*
Pin-Compatible Versions
Ordering Information
PART
RESOLUTION
(BITS)
SPEED GRADE
(Msps)
MAX1121 8 250
MAX1122 10 170
MAX1123 10 210
MAX1124 10 250
MAX1213 12 170
MAX1214 12 210
19-3653; Rev 0; 4/05
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
*EP = Exposed paddle.
EVALUATION KIT
AVAILABLE
Pin Configuration appears at end of data sheet.
MAX1215
1.8V, 12-Bit, 250Msps ADC for
Broadband Applications
2 ________________________________________________________________________________________________________________________________________________________________________________
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS
(AV
CC
= OV
CC
= 1.8V, AGND = OGND = 0, f
SAMPLE
= 250MHz, differential sine-wave clock input drive, 0.1µF capacitor on REFIO,
internal reference, digital output pins differential R
L
= 100Ω ±1%, TA= T
MIN
to T
MAX
, unless otherwise noted. Typical values are at
T
A
= +25°C.) (Note 1)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
AVCCto AGND ..................................................... -0.3V to +2.1V
OV
CC
to OGND .................................................... -0.3V to +2.1V
AV
CC
to OVCC...................................................... -0.3V to +2.1V
AGND to OGND ................................................... -0.3V to +0.3V
INP, INN to AGND....................................-0.3V to (AV
CC
+ 0.3V)
All Digital Inputs to AGND........................-0.3V to (AV
CC
+ 0.3V)
REFIO, REFADJ to AGND ........................-0.3V to (AV
CC
+ 0.3V)
All Digital Outputs to OGND ....................-0.3V to (OV
CC
+ 0.3V)
ESD on All Pins (Human Body Model) .............................±2000V
Thermal Resistance
θj
C
...............................................................................0.8°C/W
θj
A
.................................................................................35°C/W
Operating Temperature Range ...........................-40°C to +85°C
Junction Temperature .....................................................+150°C
Storage Temperature Range ............................-60°C to +150°C
Maximum Current into Any Pin............................................50mA
Lead Temperature (soldering,10s) ..................................+300°C
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
DC ACCURACY
Resolution 12 Bits
Integral Nonlinearity (Note 2) INL f
IN
= 10MHz, TA = +25°C-2
+2 LSB
Differential Nonlinearity (Note 2) DNL TA = +25°C, no missing codes -1
+1 LSB
Transfer Curve Offset V
OS
TA = +25°C (Note 2)
mV
Offset Temperature Drift 40
µV/°C
ANALOG INPUTS (INP, INN)
Full-Scale Input Voltage Range V
FS
TA = +25°C (Note 2)
mV
P-P
Full-Scale Range Temperature
Drift
ppm/°C
Common-Mode Input Range V
CM
Internally self-biased 1.365 ±0.15 V
Input Capacitance C
IN
2.5 pF
Differential Input Resistance R
IN
3.0 4.2 6.3 kΩ
Full-Power Analog Bandwidth FPBW
MHz
REFERENCE (REFIO, REFADJ)
Reference Output Voltage V
REFIO
TA = +25°C, REFADJ = AGND
V
Reference Temperature Drift 90
ppm/°C
REFADJ Input High Voltage
Used to disable the internal reference AV
CC
- 0.3 V
SAMPLING CHARACTERISTICS
Maximum Sampling Rate f
SAMPLE
MHz
Minimum Sampling Rate f
SAMPLE
20
MHz
Clock Duty Cycle Set by clock-management circuit 40 to 60 %
Aperture Delay t
AD
Figures 4, 11
ps
Aperture Jitter t
AJ
Figure 11 0.2
ps
RMS
±0.85
±0.5
-3.5 +3.5
V
REFADJ
1320 1454 1590
130
700
1.18 1.23 1.30
250
620
MAX1215
1.8V, 12-Bit, 250Msps ADC for
Broadband Applications
_______________________________________________________________________________________ 33 ____________________________________________________________________________________________________
ELECTRICAL CHARACTERISTICS (continued)
(AV
CC
= OV
CC
= 1.8V, AGND = OGND = 0, f
SAMPLE
= 250MHz, differential sine-wave clock input drive, 0.1µF capacitor on REFIO,
internal reference, digital output pins differential R
L
= 100Ω±1%, TA= T
MIN
to T
MAX
, unless otherwise noted. Typical values are at
T
A
= +25°C.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
CLOCK INPUTS (CLKP, CLKN)
Differential Clock Input Amplitude
(Note 3)
mV
P-P
Clock Input Common-Mode
Voltage Range
Internally self-biased 1.15 ±0.25 V
Clock Differential Input
Resistance
R
CLK
11
kΩ
Clock Differential Input
Capacitance
C
CLK
5pF
DYNAMIC CHARACTERISTICS (at -1dBFS)
fIN = 10MHz, TA ≥ +25°C
66
fIN = 100MHz, TA ≥ +25°C
fIN = 200MHz
Signal-to-Noise
Ratio
SNR
f
IN
= 250MHz 65
dB
fIN = 10MHz, TA ≥ +25°C
fIN = 100MHz, TA ≥ +25°C62
fIN = 200MHz
Signal-to-Noise
and Distortion
SINAD
f
IN
= 250MHz
dB
fIN = 10MHz, TA ≥ +25°C7084
fIN = 100MHz, TA ≥ +25°C67
fIN = 200MHz
Spurious-Free
Dynamic Range
SFDR
f
IN
= 250MHz
dBc
fIN = 10MHz, TA ≥ +25°C -87 -70
fIN = 100MHz, TA ≥ +25°C
-67
fIN = 200MHz
Worst Harmonics
(HD2 or HD3)
fIN = 250MHz
dBc
Two-Tone Intermodulation
Distortion
TTIMD
f
IN1
= 99MHz at -7dBFS,
f
IN2
= 101MHz at -7dBFS
dBc
Noise-Power Ratio NPR
f
NOTCH
= 28.8MHz ±1MHz,
noise BW = 50MHz, A
IN
= -9.1dBFS
dB
LVDS DIGITAL OUTPUTS (D0P/N–D11P/N, ORP/N)
Differential Output Voltage |VOD|RL = 100Ω ±1%
400 mV
Output Offset Voltage OV
OS
RL = 100Ω ±1%
V
200 500
±25%
63.5
63.4 65.5
65.5
63.5 65.8
64.3
63.2
64.2
70.7
250
1.125 1.310
67.1
72.4
-70.7
-67.1
-72.4
-79
65.4
MAX1215
1.8V, 12-Bit, 250Msps ADC for
Broadband Applications
4 _______________________________________________________________________________________
ELECTRICAL CHARACTERISTICS (continued)
(AV
CC
= OV
CC
= 1.8V, AGND = OGND = 0, f
SAMPLE
= 250MHz, differential sine-wave clock input drive, 0.1µF capacitor on REFIO,
internal reference, digital output pins differential R
L
= 100Ω±1%, TA= T
MIN
to T
MAX
, unless otherwise noted. Typical values are at
T
A
= +25°C.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
LVCMOS DIGITAL INPUTS (CLKDIV, T/B)
Digital Input-Voltage Low V
IL
V
Digital Input-Voltage High V
IH
0.8 x AV
CC
V
TIMING CHARACTERISTICS
CLK-to-Data Propagation Delay t
PDL
Figure 4
ns
CLK-to-DCLK Propagation Delay
t
CPDL
Figure 4
ns
DCLK-to-Data Propagation Delay
Figure 4 (Note 3)
ns
LVDS Output Rise Time t
RISE
20% to 80%, CL = 5pF
ps
LVDS Output Fall Time t
FALL
20% to 80%, CL = 5pF
ps
Output Data Pipeline Delay
Figure 4 11
Clock
cycles
POWER REQUIREMENTS
Analog Supply Voltage Range AV
CC
V
Digital Supply Voltage Range OV
CC
V
Analog Supply Current I
AVCC
fIN = 100MHz
555 mA
Digital Supply Current I
OVCC
fIN = 100MHz 64 75 mA
Analog Power Dissipation P
DISS
fIN = 100MHz
mW
Offset 1.8
mV/V
Power-Supply Rejection Ratio
(Note 3)
PSRR
Gain 1.5
%FS/V
Note 1: ≥+25°C guaranteed by production test, <+25°C guaranteed by design and characterization.
Note 2: Static linearity and offset parameters are based on the end-point fit method. The full-scale range (FSR) is defined as 4095 x
slope of the line.
Note 3: Parameter guaranteed by design and characterization: T
A
= T
MIN
to T
MAX
.
Note 4: PSRR is measured with both analog and digital supplies connected to the same potential.
0.2 x AV
1.75
3.87
t
- t
PDL
CPDL
t
LATENCY
1.66 2.12 2.48
460
460
1.70 1.80 1.90
1.70 1.80 1.90
495
1006 1134
CC
MAX1215
1.8V, 12-Bit, 250Msps ADC for
Broadband Applications
_______________________________________________________________________________________ 5
-110
-90
-100
-60
-70
-80
-50
-40
-20
-10
-30
0
0 20 40 60 80 100 120
FFT PLOT
(8192-POINT DATA RECORD)
MAX1215toc01
ANALOG INPUT FREQUENCY (MHz)
AMPLITUDE (dBFS)
HD3
f
SAMPLE
=
249.99936MHz
f
IN
= 12.78683MHz
A
IN
= -1.008dBFS
SNR = 66.5dB
SINAD = 66.2dB
THD = -80.4dBc
SFDR = 83.3dBc
HD2 = -83.3dBc
HD3 = -88.4dBc
HD2
-110
-90
-100
-60
-70
-80
-50
-40
-20
-10
-30
0
0 20 40 60 80 100 120
FFT PLOT
(8192-POINT DATA RECORD)
MAX1215toc02
ANALOG INPUT FREQUENCY (MHz)
AMPLITUDE (dBFS)
f
SAMPLE
=
249.99936MHz
f
IN
= 65.03279MHz
A
IN
= -1.083dBFS
SNR = 66.7dB
SINAD = 65.6dB
THD = -72dBc
SFDR = 73.7dBc
HD2 = -82dBc
HD3 = -73.7dBc
HD3
HD2
-110
-90
-100
-60
-70
-80
-50
-40
-20
-10
-30
0
0 20 40 60 80 100 120
FFT PLOT
(8192-POINT DATA RECORD)
MAX1215toc03
ANALOG INPUT FREQUENCY (MHz)
AMPLITUDE (dBFS)
f
SAMPLE
=
249.99936MHz
f
IN
= 199.24876MHz
A
IN
= -1.018dBFS
SNR = 65.5dB
SINAD = 63.2dB
THD = -67dBc
SFDR = 67.1dBc
HD2 = -89.1dBc
HD3 = -67.1dBc
HD3
HD2
-110
-90
-100
-60
-70
-80
-50
-40
-20
-10
-30
0
0 20 40 60 80 100 120
FFT PLOT
(8192-POINT DATA RECORD)
MAX1215toc04
ANALOG INPUT FREQUENCY (MHz)
AMPLITUDE (dBFS)
HD3
f
SAMPLE
=
249.99936MHz
f
IN
= 248.62607MHz
A
IN
= -1.059dBFS
SNR = 65dB
SINAD = 64.2dB
THD = -71.5dBc
SFDR = 72.4dBc
HD2 = -82.1dBc
HD3 = -72.4dBc
HD2
-110
-90
-100
-60
-70
-80
-50
-40
-20
-10
-30
0
0 20 40 60 80 100 120
TWO-TONE IMD PLOT
(8192-POINT DATA RECORD)
MAX1215toc05
ANALOG INPUT FREQUENCY (MHz)
AMPLITUDE (dB)
f
IN1
2f
IN2
- f
IN1
2f
IN1
- f
IN2
f
IN2
f
SAMPLE
= 249.99936MHz
f
IN1
= 99.21239MHz
f
IN2
= 101.1044775MHz
A
IN1
= A
IN2
= -7dBFS
IMD = -79dBc
SNR/SINAD vs. ANALOG INPUT FREQUENCY
(f
SAMPLE
= 249.99936MHz, AIN = -1dBFS)
MAX1215 toc06
fIN (MHz)
SNR/SINAD (dB)
25020015010050
58
61
64
67
70
55
0300
SNR
SINAD
SFDR vs. ANALOG INPUT FREQUENCY
(f
SAMPLE
= 249.99936MHz, AIN = -1dBFS)
MAX1215 toc07
fIN (MHz)
SFDR (dBc)
25020015010050
50
60
70
80
90
40
55
65
75
85
45
0300
HD2/HD3 vs. ANALOG INPUT FREQUENCY
(f
SAMPLE
= 249.99936MHz, AIN = -1dBFS)
MAX1215 toc08
fIN (MHz)
HD2/HD3 (dBc)
25020015010050
-95
-90
-80
-70
-85
-75
-65
-60
-100
0 300
HD3
HD2
SNR/SINAD vs. ANALOG INPUT AMPLITUDE
(f
SAMPLE
= 249.99936MHz, fIN = 65.03279MHz)
MAX1215 toc09
ANALOG INPUT AMPLITUDE (dBFS)
SNR/SINAD (dB)
-5-15-25-35-45 -10-20-30-40-50
20
30
50
40
60
70
10
-55 0
SNR
SINAD
Typical Operating Characteristics
(AV
CC
= OV
CC
= 1.8V, AGND = OGND = 0, f
SAMPLE
= 250MHz, A
IN
= -1dBFS; see each TOC for detailed information on test conditions, differential input drive, differential sine-wave clock input drive, 0.1µF capacitor on REFIO, internal reference, digital output pins
differential RL = 100Ω, TA= +25°C.)
MAX1215
1.8V, 12-Bit, 250Msps ADC for
Broadband Applications
6 _______________________________________________________________________________________
Typical Operating Characteristics (continued)
(AV
CC
= OV
CC
= 1.8V, AGND = OGND = 0, f
SAMPLE
= 250MHz, A
IN
= -1dBFS; see each TOC for detailed information on test conditions, differential input drive, differential sine-wave clock input drive, 0.1µF capacitor on REFIO, internal reference, digital output pins
differential RL = 100Ω, TA= +25°C.)
SFDR vs. ANALOG INPUT AMPLITUDE
(f
SAMPLE
= 249.99936MHz, fIN = 65.03279MHz)
MAX1215 toc10
ANALOG INPUT AMPLITUDE (dBFS)
SFDR (dBc)
-5-15-25-35-45 -10-20-30-40-50
40
50
70
60
80
90
30
-55 0
HD2/HD3 vs. ANALOG INPUT AMPLITUDE
(f
SAMPLE
= 249.99936MHz, fIN = 65.03279MHz)
MAX1215 toc11
ANALOG INPUT AMPLITUDE (dBFS)
HD2/HD3 (dBc)
-5-15-25-35-45 -10-20-30-40-50
-90
-80
-60
-70
-40
-50
-30
-100
-55 0
HD3
HD2
SNR/SINAD vs. SAMPLE FREQUENCY
(f
IN
= 65MHz, AIN = -1dBFS)
MAX1215 toc12
f
SAMPLE
(MHz)
SNR/SINAD (dB)
15010050 200
61
62
66
64
68
63
67
65
69
60
0250
SNR
SINAD
SFDR vs. SAMPLE FREQUENCY
(f
IN
= 65MHz, AIN = -1dBFS)
MAX1215 toc13
f
SAMPLE
(MHz)
SFDR (dBc)
15010050 200
55
60
80
70
65
85
75
90
50
0250
HD2/HD3 vs. SAMPLE FREQUENCY
(f
IN
= 65MHz, AIN = -1dBFS)
MAX1215 toc14
f
SAMPLE
(MHz)
HD2/HD3 (dBc)
15010050 200
-105
-100
-75
-90
-95
-65
-80
-70
-85
-60
-110
0250
HD3
HD2
TOTAL POWER DISSIPATION vs. SAMPLE
FREQUENCY (f
IN
= 65MHz, AIN = -1dBFS)
MAX1215 toc15
f
SAMPLE
(MHz)
P
DISS
(mW)
15010050 200
900
920
910
930
980
950
940
1000
970
990
960
1010
890
0250
INTEGRAL NONLINEARITY
vs. DIGITAL OUTPUT CODE
MAX1215 toc16
DIGITAL OUTPUT CODE
INL (LSB)
358430722048 25601024 1536512
-0.8
-0.6
-0.4
-0.2
0
0.2
0.4
0.6
0.8
1.0
-1.0
0 4096
fIN = 13MHz
DIFFERENTIAL NONLINEARITY
vs. DIGITAL OUTPUT CODE
MAX1215 toc17
DIGITAL OUTPUT CODE
DNL (LSB)
358430722048 25601024 1536512
-0.8
-0.6
-0.4
-0.2
0
0.2
0.4
0.6
0.8
1.0
-1.0
0 4096
fIN = 13MHz
1
-7
10 100 1000
GAIN BANDWIDTH PLOT
(f
SAMPLE
= 249.99936MHz, AIN = -1dBFS)
-5
-6
MAX1215 toc18
ANALOG INPUT FREQUENCY (MHz)
GAIN (dB)
-3
-4
-1
0
-2
DIFFERENTIAL TRANSFORMER COUPLING
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