
General Description
The MAX1211 is a 3.3V, 12-bit analog-to-digital converter (ADC) featuring a fully differential wideband trackand-hold (T/H) input, driving the internal quantizer. The
MAX1211 is optimized for low power, small size, and
high dynamic performance in intermediate frequency
(IF) sampling applications. This ADC operates from a
single 3.0V to 3.6V supply, consuming only 340mW
while delivering a typical signal-to-noise ratio (SNR) performance of 66.8dB at a 175MHz input frequency. The
T/H-driven input stage accepts single-ended or differential inputs. In addition to low operating power, the
MAX1211 features a 0.15mW power-down mode to conserve power during idle periods.
A flexible reference structure allows the MAX1211 to
use its internal precision bandgap reference or accept
an externally applied reference. A common-mode reference is provided to simplify design and reduce external
component count in differential analog input circuits.
The MAX1211 supports both a single-ended and differential input clock drive. Wide variations in the clock
duty cycle are compensated with the ADC’s internal
duty-cycle equalizer.
The MAX1211 features parallel, CMOS-compatible outputs. The digital output format is pin selectable to be
either two’s complement or Gray code. A data-valid indicator eliminates external components that are normally
required for reliable digital interfacing. A separate power
input for the digital outputs accepts a voltage from 1.7V
to 3.6V for flexible interfacing with various logic levels.
The MAX1211 is available in a 6mm x 6mm x 0.8mm, 40pin thin QFN package with exposed paddle (EP), and is
specified for the extended industrial (-40°C to +85°C)
temperature range.
Applications
IF and Baseband Communication Receivers
Cellular, LMDS, Point-to-Point Microwave,
MMDS, HFC, WLAN
Ultrasound and Medical Imaging
Portable Instrumentation
Low-Power Data Acquisition
Features
♦ Direct IF Sampling Up to 400MHz
♦ 700MHz Input Bandwidth
♦ Excellent Dynamic Performance
66.8dB SNR at fIN= 175MHz
79.7dBc SFDR at fIN= 175MHz
♦ 3.3V Low-Power Operation
314mW (Single-Ended Clock Mode)
340mW (Differential Clock Mode)
♦ Differential or Single-Ended Clock
♦ Accepts 20% to 80% Clock Duty Cycle
♦ Fully Differential or Single-Ended Analog Input
♦ Adjustable Full-Scale Analog Input Range
♦ Common-Mode Reference
♦ Power-Down Mode
♦ CMOS-Compatible Outputs in Two’s Complement
or Gray Code
♦ Data-Valid Indicator Simplifies Digital Interface
♦ Out-of-Range Indicator
♦ Miniature, 40-Pin Thin QFN Package with Exposed
Paddle
♦ Evaluation Kit Available (Order MAX1211EVKIT)
MAX1211
65Msps, 12-Bit, IF Sampling ADC
________________________________________________________________ Maxim Integrated Products 1
D0
D1
EXPOSED PADDLE (GND)
D3
D4
D7
D8
D9
D5
D6
D2
COM
GND
INP
INN
GND
DCE
CLKN
CLKP
REFN
REFP
1
2
3
4
5
6
7
8
9
10
111213141516171819
20
403938373635343332
31
30
29
28
27
26
25
24
23
22
21
V
DD
GND
OV
DD
D11
D10
V
DDVDDVDD
CLKTYP
REFIN
REFOUTPDV
DD
GND
OVDDDAV
I.C.
I.C.
G/T
THIN QFN
6mm × 6mm × 0.8mm
MAX1211
DOR
TOP VIEW
Pin Configuration
Ordering Information
19-2922; Rev 1; 5/04
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
EVALUATION KIT
AVAILABLE
TEMP RANGE
-40°C to +85°C

MAX1211
65Msps, 12-Bit, IF Sampling ADC
2 _______________________________________________________________________________________
ABSOLUTE MAXIMUM RATINGS
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
VDDto GND...........................................................-0.3V to +3.6V
OV
DD
to GND........-0.3V to the lower of (VDD+ 0.3V) and +3.6V
INP, INN to GND...-0.3V to the lower of (V
DD
+ 0.3V) and +3.6V
REFIN, REFOUT, REFP, REFN,
COM to GND.....-0.3V to the lower of (V
DD
+ 0.3V) and +3.6V
CLKP, CLKN, CLKTYP, G/
T, DCE,
PD to GND ........-0.3V to the lower of (V
DD
+ 0.3V) and +3.6V
D11–D0, I.C., DAV, DOR to GND............-0.3V to (OV
DD
+ 0.3V)
Continuous Power Dissipation (TA= +70°C)
40-Pin Thin QFN 6mm x 6mm x 0.8mm
(derated 26.3mW/°C above +70°C)........................2105.3mW
Operating Temperature Range ...........................-40°C to +85°C
Junction Temperature......................................................+150°C
Storage Temperature Range.............................-65°C to +150°C
Lead Temperature (soldering 10s)..................................+300°C
ELECTRICAL CHARACTERISTICS
(VDD= 3.3V, OVDD= 2.0V, GND = 0, REFIN = REFOUT (internal reference), C
REFOUT
= 0.1µF, CL≈ 5pF at digital outputs, VIN= -
0.5dBFS, CLKTYP = high, DCE = high, PD = low, G/T = low, f
CLK
= 65MHz (50% duty cycle), C
REFP
= C
REFN
= 0.1µF, 1µF in parallel with
10µF between REFP and REFN, C
COM
= 0.1µF in parallel with 2.2µF to GND, TA= -40°C to +85°C, unless otherwise noted. Typical values
are at T
A
= +25°C.) (Note 1)
DC ACCURACY
Resolution 12 Bits
Integral Nonlinearity INL fIN = 3MHz (Note 2)
LSB
Differential Nonlinearity DNL
f
IN
= 3MHz, no missing codes over
temperature (Note 2)
LSB
Offset Error V
REFIN
= 2.048V
Gain Error V
REFIN
= 2.048V
ANALOG INPUT (INP, INN)
Differential Input Voltage Range V
DIFF
Differential or single-ended inputs
V
Common-Mode Input Voltage
V
Input Resistance R
IN
Switched capacitor load 15 kΩ
Input Capacitance C
IN
4pF
CONVERSION RATE
Maximum Clock Frequency f
CLK
65
Minimum Clock Frequency 5
Data Latency Figure 5 8.5
DYNAMIC CHARACTERISTICS (Differential inputs, 4096-point FFT)
fIN = 3MHz at -0.5dBFS (Note 3)
fIN = 70MHz at -0.5dBFS (Note 3)
Signal-to-Noise Ratio SNR
f
IN
= 175MHz at -0.5dBFS
dB
fIN = 3MHz at -0.5dBFS (Note 3)
fIN = 70MHz at -0.5dBFS (Note 3)
Signal-to-Noise and Distortion SINAD
f
IN
= 175MHz at -0.5dBFS
dB
fIN = 3MHz at -0.5dBFS (Note 3)
fIN = 70MHz at -0.5dBFS (Note 3)
Spurious-Free Dynamic Range SFDR
f
IN
= 175MHz at -0.5dBFS
SYMBOL
MIN TYP MAX
±0.30 ±0.75
±0.30 ±0.75
67.0 68.5
66.8 68.3
64.8 66.8
67.0 68.4
66.5 68.1
64.6 66.5
81.5 90.4
74.0 82.4
74.0 79.7
±0.20 ±0.91
±0.3 ±4.1
±1.024
VDD / 2

MAX1211
65Msps, 12-Bit, IF Sampling ADC
_______________________________________________________________________________________ 3
ELECTRICAL CHARACTERISTICS (continued)
(VDD= 3.3V, OVDD= 2.0V, GND = 0, REFIN = REFOUT (internal reference), C
REFOUT
= 0.1µF, CL≈ 5pF at digital outputs, VIN= -
0.5dBFS, CLKTYP = high, DCE = high, PD = low, G/T = low, f
CLK
= 65MHz (50% duty cycle), C
REFP
= C
REFN
= 0.1µF, 1µF in parallel with
10µF between REFP and REFN, C
COM
= 0.1µF in parallel with 2.2µF to GND, TA= -40°C to +85°C, unless otherwise noted. Typical values
are at T
A
= +25°C.) (Note 1)
fIN = 3MHz at -0.5dBFS (Note 3)
fIN = 70MHz at -0.5dBFS (Note 3)
Total Harmonic Distortion THD
f
IN
= 175MHz at -5dBFS
dBc
Second Harmonic HD2 f
IN1
= 70MHz at -5dBFS
dBc
Third Harmonic HD3 fIN = 70MHz at -0.5dBFS (Note 3)
dBc
f
IN1
= 68.5MHz at -7dBFS
f
IN2
= 71.5MHz at -7dBFS
Third-Order Intermodulation IM3
f
IN1
= 172.5MHz at -7dBFS
f
IN2
= 177.5MHz at -7dBFS
dBc
Full-Power Bandwidth FPBW Input at -0.5dBFS, -3dB rolloff 700
Aperture Delay t
AD
Figure 14 0.9 ns
Aperture Jitter t
AJ
Figure 14
Output Noise n
OUT
INP = INN = COM 0.5
Overdrive Recovery Time ±10% beyond full scale 1
Clock
INTERNAL REFERENCE (REFIN = REFOUT; V
REFP
, V
REFN
, and V
COM
are generated internally)
REFOUT Output Voltage
V
COM Output Voltage V
COM
V
DD
/ 2
V
Differential Reference Output
Voltage
V
REF
V
REF
= V
REFP
- V
REFN
V
REFOUT Load Regulation 35
REFOUT Temperature Coefficient
REFOUT Short-Circuit Current
Short to GND 2.1
mA
B U F F ER ED EXT ER N A L R EF ER EN C E ( RE FIN d r i ven exter nal l y, V
R E F IN
= 2.048V , V
R E F P
, V
R E F N
, and V
C OM
ar e g ener ated i nter nal l y)
REFIN Input Voltage V
REFIN
V
REFP Output Voltage V
REFP
(V
DD
/ 2) + (V
REFIN
/ 4)
V
REFN Output Voltage V
REFN
(V
DD
/ 2) - (V
REFIN
/ 4)
V
COM Output Voltage V
COM
V
DD
/ 2
V
Differential Reference Output
Voltage
V
REF
V
REF
= V
REFP
- V
REFN
V
Differential Reference
Temperature Coefficient
Source 0.4
Maximum REFP Current I
REFP
Sink 1.4
mA
Source 1.0
Maximum REFN Current I
REFN
Sink 1.0
mA
V
REFOUT
-89.3 -80.0
-81.3 -73.6
-78.7 -73.6
-82.4 -74.0
-90.9 -84.6
-82.4
-81.2
<0.2
1.996 2.048 2.071
1.65
1.024
+100
0.24
2.048
2.162
1.138
1.60 1.65 1.70
0.978 1.024 1.059
+12.5

MAX1211
65Msps, 12-Bit, IF Sampling ADC
4 _______________________________________________________________________________________
ELECTRICAL CHARACTERISTICS (continued)
(VDD= 3.3V, OVDD= 2.0V, GND = 0, REFIN = REFOUT (internal reference), C
REFOUT
= 0.1µF, CL≈ 5pF at digital outputs, VIN= -
0.5dBFS, CLKTYP = high, DCE = high, PD = low, G/T = low, f
CLK
= 65MHz (50% duty cycle), C
REFP
= C
REFN
= 0.1µF, 1µF in parallel with
10µF between REFP and REFN, C
COM
= 0.1µF in parallel with 2.2µF to GND, TA= -40°C to +85°C, unless otherwise noted. Typical values
are at T
A
= +25°C.) (Note 1)
Source 1.0
Maximum COM Current I
COM
Sink 0.4
mA
REFIN Input Resistance
MΩ
UNBUFFERED EXTERNAL REFERENCE (REFIN = GND, V
REFP
, V
REFN
, and V
COM
are applied externally)
COM Input Voltage V
COM
V
DD
/ 2
V
REFP Input Voltage V
REFP
- V
COM
V
REFN Input Voltage V
REFN
- V
COM
V
Differential Reference Input
Voltage
V
REF
V
REF
= V
REFP
- V
REFN
V
REFP Sink Current I
REFP
V
REFP
= 2.162V 1.1 mA
REFN Source Current I
REFN
V
REFN
= 1.138V 1.1 mA
COM Sink Current I
COM
0.3 mA
REFP, REFN Capacitance 13 pF
COM Capacitance 6pF
CLOCK INPUTS (CLKP, CLKN)
Single-Ended Input High
Threshold
V
IH
CLKTYP = GND, CLKN = GND
V
Single-Ended Input Low
Threshold
V
IL
CLKTYP = GND, CLKN = GND
V
Differential Input Voltage Swing CLKTYP = high 1.4
Differential Input Common-Mode
Voltage
CLKTYP = high
V
DCE = OV
DD
20
Minimum Clock Duty Cycle
DCE = GND 45
%
DCE = OV
DD
80
Maximum Clock Duty Cycle
DCE = GND 65
%
Input Resistance R
CLK
Figure 4 5 kΩ
Input Capacitance C
CLK
2pF
DIGITAL INPUTS (CLKTYP, G/T, PD)
Input High Threshold V
IH
0.8 x
V
Input Low Threshold V
IL
0.2 x
V
VIH = OV
DD
±5
Input Leakage Current
V
IL
= 0 ±5
µA
Input Capacitance C
DIN
5pF
SYMBOL
MIN TYP MAX
>50
1.65
0.512
-0.512
1.024
0.8 x
V
DD
VDD / 2
0.2 x
V
DD
OV
DD
OV
DD

MAX1211
65Msps, 12-Bit, IF Sampling ADC
_______________________________________________________________________________________ 5
ELECTRICAL CHARACTERISTICS (continued)
(VDD= 3.3V, OVDD= 2.0V, GND = 0, REFIN = REFOUT (internal reference), C
REFOUT
= 0.1µF, CL≈ 5pF at digital outputs, VIN= -
0.5dBFS, CLKTYP = high, DCE = high, PD = low, G/T = low, f
CLK
= 65MHz (50% duty cycle), C
REFP
= C
REFN
= 0.1µF, 1µF in parallel with
10µF between REFP and REFN, C
COM
= 0.1µF in parallel with 2.2µF to GND, TA= -40°C to +85°C, unless otherwise noted. Typical values
are at T
A
= +25°C.) (Note 1)
DIGITAL OUTPUTS (D0–D11, DAV, DOR)
D0–D11, DOR, I
SINK
= 200µA 0.2
Output-Voltage Low V
OL
DAV, I
SINK
= 600µA 0.2
V
D0–D11, DOR, I
SOURCE
= 200µA
Output-Voltage High V
OH
DAV, I
SOURCE
= 600µA
V
Tri-State Leakage Current I
LEAK
(Note 4) ±5 µA
D11–D0, DOR Tri-State Output
Capacitance
C
OUT
(Note 4) 3 pF
DAV Tri-State Output
Capacitance
C
DAV
(Note 4) 6 pF
POWER REQUIREMENTS
Analog Supply Voltage V
DD
3.0 3.3 3.6 V
Digital Output Supply Voltage OV
DD
1.7 2.0
V
Normal operating mode,
f
IN
= 175MHz at -0.5dBFS,
CLKTYP = GND, single-ended clock
95
Normal operating mode,
f
IN
= 175MHz at -0.5dBFS,
CLKTYP = OV
DD
, differential clock
103 115
Analog Supply Current I
VDD
Power-down mode; clock idle,
PD = OV
DD
mA
Normal operating mode,
f
IN
= 175MHz at -0.5dBFS,
CLKTYP = GND, single-ended clock
314
Normal operating mode,
f
IN
= 175MHz at -0.5dBFS,
CLKTYP = OV
DD
, differential clock
340 379
Analog Power Dissipation P
DISS
Power-down mode, clock idle,
PD = OV
DD
mW
Normal operating mode,
f
IN
= 175MHz at -0.5dBFS,
OV
DD
= 2.0V, CL ≈ 5pF
9.2 mA
Digital Output Supply Current I
OVDD
Power-down mode; clock idle,
PD = OV
DD
6µA
SYMBOL
MIN TYP MAX
OV
DD
- 0.2
OV
DD
- 0.2
V
+ 0.3V
DD
0.045
0.15

MAX1211
65Msps, 12-Bit, IF Sampling ADC
6 _______________________________________________________________________________________
ELECTRICAL CHARACTERISTICS (continued)
(VDD= 3.3V, OVDD= 2.0V, GND = 0, REFIN = REFOUT (internal reference), C
REFOUT
= 0.1µF, CL≈ 5pF at digital outputs, VIN= -
0.5dBFS, CLKTYP = high, DCE = high, PD = low, G/T = low, f
CLK
= 65MHz (50% duty cycle), C
REFP
= C
REFN
= 0.1µF, 1µF in parallel with
10µF between REFP and REFN, C
COM
= 0.1µF in parallel with 2.2µF to GND, TA= -40°C to +85°C, unless otherwise noted. Typical values
are at T
A
= +25°C.) (Note 1)
TIMING CHARACTERISTICS (Figure 5)
Clock Pulse-Width High t
CH
7.7 ns
Clock Pulse-Width Low t
CL
7.7 ns
Data Valid Delay t
DAV
CL = 5pF (Note 5) 6.4 ns
Data Setup Time Before Rising
Edge of DAV
t
SETUP
CL = 5pF (Notes 3, 5) 8.5 ns
Data Hold Time After Rising Edge
of DAV
t
HOLD
CL = 5pF (Notes 3, 5) 6.3 ns
Wake-Up Time from Power-Down
t
WAKE
V
REFIN
= 2.048V 10 ms
Note 1: Specifications ≥+25°C guaranteed by production test, <+25°C guaranteed by design and characterization.
Note 2: Specifications guaranteed by design and characterization. Devices tested for performance during production test.
Note 3: Guaranteed by design and characterization.
Note 4: During power-down, D11–D0, DOR, and DAV are high impedance.
Note 5: Digital outputs settle to V
IH
or VIL.
SYMBOL
MIN TYP MAX

MAX1211
65Msps, 12-Bit, IF Sampling ADC
_______________________________________________________________________________________ 7
Typical Operating Characteristics
(VDD= 3.3V, OVDD= 2.0V, GND = 0, REFIN = REFOUT (internal reference), C
REFOUT
= 0.1µF, CL≈ 5pF at digital outputs, differential
input at -0.5dBFS, DCE = high, CLKTYP = high, PD = low, G/T = low, f
CLK
≈ 65MHz (50% duty cycle), C
REFP
= C
REFN
= 0.1µF to GND,
1µF in parallel with 10µF between REFP and REFN, C
COM
= 0.1µF in parallel with 2.2µF to GND, TA= +25°C, unless otherwise noted.)
-110
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
0
048
12
20 28
SINGLE-TONE FFT PLOT
(8192-POINT DATA RECORD)
MAX1211 toc01
FREQUENCY (MHz)
AMPLITUDE (dBFS)
HD3
16
24 32
f
CLK
= 65.0002432MHz
f
IN
= 20.0031266MHz
A
IN
= -0.473dBFS
SNR = 68.481dBc
SINAD = 68.45dBc
THD = 89.888dBc
SFDR = 89.939dBc
HD2
-110
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
0
048
12
20 28
SINGLE-TONE FFT PLOT
(8192-POINT DATA RECORD)
MAX1211 toc02
FREQUENCY (MHz)
AMPLITUDE (dBFS)
HD3
16
24 32
HD2
f
CLK
= 65.0002432MHz
f
IN
= 32.1271954MHz
A
IN
= -0.529dBFS
SNR = 68.286dBc
SINAD = 68.218dBc
THD = -86.307dBc
SFDR = 89.518dBc
SINGLE-TONE FFT PLOT
(8192-POINT DATA RECORD)
MAX1211 toc03
FREQUENCY (MHz)
AMPLITUDE (dBFS)
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
0
-110
0
f
CLK
= 65.000HMz
f
IN
= 70.00671387MHz
A
IN
= -0.494dBFS
SNR = 68.33dBc
SINAD = 68.27dBc
THD = -86.91dBc
SFDR = 89.50dBc
HD2
HD3
048
12
20 28
16
24 32
SINGLE-TONE FFT PLOT
(8192-POINT DATA RECORD)
MAX1211 toc04
FREQUENCY (MHz)
AMPLITUDE (dBFS)
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
0
-110
0
f
CLK
= 65.000HMz
f
IN
= 174.9969482MHz
A
IN
= -0.519BFS
SNR = 67.36dBc
SINAD = 67.01dBc
THD = -78.09dBc
SFDR = 79.15dBc
HD2
HD3
48
12
20 28
16
24 32
48
12
20 28
16
24 32

65Msps, 12-Bit, IF Sampling ADC
8 _______________________________________________________________________________________
Typical Operating Characteristics (continued)
(VDD= 3.3V, OVDD= 2.0V, GND = 0, REFIN = REFOUT (internal reference), C
REFOUT
= 0.1µF, CL≈ 5pF at digital outputs, differential
input at -0.5dBFS, DCE = high, CLKTYP = high, PD = low, G/T = low, f
CLK
≈ 65MHz (50% duty cycle), C
REFP
= C
REFN
= 0.1µF to GND,
1µF in parallel with 10µF between REFP and REFN, C
COM
= 0.1µF in parallel with 2.2µF to GND, TA= +25°C, unless otherwise noted.)
-0.5
-0.3
-0.4
-0.1
-0.2
0.1
0
0.2
0.4
0.3
0.5
0 1024 1536512 2048 2560 3072 3584 4096
DIFFERENTIAL NONLINEARITY
MAX1211 toc08
DIGITAL OUTPUT CODE
DNL (LSB)
-1.0
-0.6
-0.8
-0.2
-0.4
0.2
0
0.4
0.8
0.6
1.0
0 1024 1536512 2048 2560 3072 3584 4096
INTEGRAL NONLINEARITY
MAX1211 toc07
DIGITAL OUTPUT CODE
INL (LSB)
TWO-TONE FFT PLOT
(16,384-POINT DATA RECORD)
MAX1211 toc05
FREQUENCY (MHz)
AMPLITUDE (dBFS)
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
0
-110
0
f
CLK
= 65.00352Msps
f
IN1
= 68.4988875MHz
f
IN2
= 71.49832MHz
SNR = 63.37dBc
SFDR
TT
= 87.36dBc
IM3 = -88.91dBc
f
IN2
f
IN1
2 x f
IN1
- f
IN2
48
12
20 28
16
24
32
A
IN1
= -7.04dBFS
A
IN2
= -6.98dBFS
SINAD = 63.56dBc
IMD = -85.20dBc
TWO-TONE FFT PLOT
(16,384-POINT DATA RECORD)
MAX1211 toc06
FREQUENCY (MHz)
AMPLITUDE (dBFS)
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
0
-110
0
f
CLK
= 65.00352Msps
f
IN1
= 172.5029325MHz
f
IN2
= 177.50196MHz
SNR = 61.24dBc
SFDR
TT
= 78.13dBc
IM3 = -81.20dBc
f
IN2
f
IN1
2 x f
IN1
- f
IN2
f
IN2
- f
IN1
f
IN1
+ f
IN2
2 x f
IN1
+ f
IN2
3 x f
IN1
+ f
IN2
48
12
20 28
16
24 32
A
IN1
= -7.03dBFS
A
IN2
= -7.02dBFS
SINAD = 61.21dBc
IMD = -78.14dBc

MAX1211
65Msps, 12-Bit, IF Sampling ADC
_______________________________________________________________________________________ 9
Typical Operating Characteristics (continued)
(VDD= 3.3V, OVDD= 2.0V, GND = 0, REFIN = REFOUT (internal reference), C
REFOUT
= 0.1µF, CL≈ 5pF at digital outputs, differential
input at -0.5dBFS, DCE = high, CLKTYP = high, PD = low, G/T = low, f
CLK
≈ 65MHz (50% duty cycle), C
REFP
= C
REFN
= 0.1µF to GND,
1µF in parallel with 10µF between REFP and REFN, C
COM
= 0.1µF in parallel with 2.2µF to GND, TA= +25°C, unless otherwise noted.)
65.0
66.0
65.5
67.0
66.5
68.0
67.5
68.5
69.5
69.0
70.0
30 40 45 5035 55 60 65 70
SIGNAL-TO-NOISE RATIO
vs. SAMPLING RATE
MAX1211 toc09
f
CLK
(MHz)
SNR (dB)
fIN ≈ 32.1MHz
DIFFERENTIAL CLOCK
SINGLE-ENDED CLOCK
65.0
66.0
65.5
67.0
66.5
68.0
67.5
68.5
69.5
69.0
70.0
30 40 45 5035 55 60 65 70
SIGNAL-TO-NOISE + DISTORTION
vs. SAMPLING RATE
MAX1211 toc10
f
CLK
(MHz)
SINAD (dB)
fIN ≈ 32.1MHz
DIFFERENTIAL CLOCK
SINGLE-ENDED CLOCK
-100
-95
-90
-85
-80
-75
-70
30 4035 45 50 55 60 65 70
TOTAL HARMONIC DISTORTION
vs. SAMPLING RATE
MAX1211 toc11
f
CLK
(MHz)
THD (dBc)
fIN ≈ 32.1MHz
DIFFERENTIAL CLOCK
SINGLE-ENDED CLOCK
70
75
80
85
90
95
100
30 4035 45 50 55 60 65 70
SPURIOUS-FREE DYNAMIC RANGE
vs. SAMPLING RATE
MAX1211 toc12
f
CLK
(MHz)
SFDR (dBc)
fIN ≈ 32.1MHz
DIFFERENTIAL CLOCK
SINGLE-ENDED CLOCK