General Description
The MAX1209 is a 3.3V, 12-bit, 80Msps analog-to-digital
converter (ADC) featuring a fully differential wideband
track-and-hold (T/H) input amplifier, driving a low-noise
internal quantizer. The analog input stage accepts single-ended or differential signals. The MAX1209 is optimized for low power, small size, and high dynamic
performance. Excellent dynamic performance is maintained from baseband to input frequencies of 175MHz
and beyond, making the MAX1209 ideal for intermediatefrequency (IF) sampling applications.
Powered from a single 3.0V to 3.6V supply, the
MAX1209 consumes only 366mW while delivering a
typical signal-to-noise (SNR) performance of 66.5dB at
an input frequency of 175MHz. In addition to low operating power, the MAX1209 features a 3µW power-down
mode to conserve power during idle periods.
A flexible reference structure allows the MAX1209 to use
the internal 2.048V bandgap reference or accept an
externally applied reference. The reference structure
allows the full-scale analog input range to be adjusted
from ±0.35V to ±1.15V. The MAX1209 provides a common-mode reference to simplify design and reduce external component count in differential analog input circuits.
The MAX1209 supports both a single-ended and differential input clock drive. Wide variations in the clock
duty cycle are compensated with the ADC’s internal
duty-cycle equalizer (DCE).
ADC conversion results are available through a 12-bit,
parallel, CMOS-compatible output bus. The digital output format is pin selectable to be either two’s complement or Gray code. A data-valid indicator eliminates
external components that are normally required for reliable digital interfacing. A separate digital power input
accepts a wide 1.7V to 3.6V supply, allowing the
MAX1209 to interface with various logic levels.
The MAX1209 is available in a 6mm x 6mm x 0.8mm,
40-pin thin QFN package with exposed paddle (EP),
and is specified for the extended industrial (-40°C to
+85°C) temperature range.
See the Pin-Compatible Versions table for a complete
family of 14-bit and 12-bit high-speed ADCs.
Applications
IF Communication Receivers
Cellular, Point-to-Point Microwave, HFC, WLAN
Ultrasound and Medical Imaging
Portable Instrumentation
Low-Power Data Acquisition
Features
♦ Direct IF Sampling Up to 400MHz
♦ Excellent Dynamic Performance
68.0dB/66.5dB SNR at fIN= 70MHz/175MHz
85.1dBc/85.5dBc SFDR at f
IN
= 70MHz/175MHz
♦ 3.3V Low-Power Operation
366mW (Single-Ended Clock Mode)
393mW (Differential Clock Mode)
3µW (Power-Down Mode)
♦ Differential or Single-Ended Clock
♦ Fully Differential or Single-Ended Analog Input
♦ Adjustable Full-Scale Analog Input Range: ±0.35V
to ±1.15V
♦ Common-Mode Reference
♦ CMOS-Compatible Outputs in Two’s Complement
or Gray Code
♦ Data-Valid Indicator Simplifies Digital Design
♦ Data Out-of-Range Indicator
♦ Miniature, 40-Pin Thin QFN Package with Exposed
Paddle
♦ Evaluation Kit Available (Order MAX1211EVKIT)
MAX1209
12-Bit, 80Msps, 3.3V IF-Sampling ADC
________________________________________________________________ Maxim Integrated Products 1
Ordering Information
19-1001; Rev 0; 8/04
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
EVALUATION KIT
AVAILABLE
Pin Configuration appears at end of data sheet.
PART
MAX1209ETL
PART
MAX12553 65 14 IF/Baseband
MAX1209 80 12 IF
MAX1211 65 12 IF
MAX1208 80 12 Baseband
MAX1207 65 12 Baseband
MAX1206 40 12 Baseband
TEMP
RANGE
-40° C to
+85°C
SAMPLING
RATE (Msps)
PIN-PACKAGE
40 Thin QFN
(6mm x 6mm x 0.8mm)
RESOLUTION
(BITS)
PKG
CODE
T4066-3
TARGET
APPLICATION
MAX1209
12-Bit, 80Msps, 3.3V IF-Sampling ADC
2 _______________________________________________________________________________________
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS
(V
DD
= 3.3V, OV
DD
= 2.0V, GND = 0, REFIN = REFOUT (internal reference), V
IN
= -0.5dBFS, CLKTYP = high, DCE = high, PD = low,
G/T = low, f
CLK
= 80MHz (50% duty cycle), TA = -40°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.) (Note 1)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
VDDto GND...........................................................-0.3V to +3.6V
OV
DD
to GND........-0.3V to the lower of (VDD+ 0.3V) and +3.6V
INP, INN to GND ...-0.3V to the lower of (V
DD
+ 0.3V) and +3.6V
REFIN, REFOUT, REFP, REFN, COM
to GND................-0.3V to the lower of (V
DD
+ 0.3V) and +3.6V
CLKP, CLKN, CLKTYP, G/T , DCE,
PD to GND ........-0.3V to the lower of (V
DD
+ 0.3V) and +3.6V
D11 Through D0, I.C. DAV, DOR to GND ...-0.3V to (OV
DD
+ 0.3V)
Continuous Power Dissipation (TA= +70°C)
40-Pin Thin QFN 6mm x 6mm x 0.8mm
(derated 26.3mW/°C above +70°C)........................2105.3mW
Operating Temperature Range ...........................-40°C to +85°C
Junction Temperature......................................................+150°C
Storage Temperature Range .............................-65°C to +150°C
Lead Temperature (soldering 10s) ..................................+300°C
DC ACCURACY (Note 2)
Resolution 12 Bits
Integral Nonlinearity INL fIN = 3MHz ±0.6 LSB
Differential Nonlinearity DNL
Offset Error V
Gain Error V
ANALOG INPUT (INP, INN)
Differential Input Voltage Range V
Common-Mode Input Voltage V
Input Capacitance
(Figure 3)
CONVERSION RATE
Maximum Clock Frequency f
Minimum Clock Frequency 5 MHz
Data Latency Figure 6 8.5
DYNAMIC CHARACTERISTICS (differential inputs, Note 2)
Small-Signal Noise Floor SSNF Input at less than -35dBFS -68.8 dBFS
Signal-to-Noise and Distortion SINAD
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
f
= 3MHz, no missing codes over
IN
temperature
= 2.048V ±0.17 ± 0.91 %FS
REFIN
= 2.048V ±0.56 ±5.3 %FS
REFIN
DIFF
C
PAR
C
SAMPLE
CLK
Differential or single-ended inputs ± 1.024 V
Fixed capacitance to ground 2
Switched capacitance 1.9
fIN = 70MHz at -0.5dBFS 68.0
fIN = 100MHz at -0.5dBFS 67.7 Signal-to-Noise Ratio SNR
= 175MHz at -0.5dBFS (Note 6) 64.5 66.5
f
IN
fIN = 70MHz at -0.5dBFS 67.8
fIN = 100MHz at -0.5dBFS 67.6
= 175MHz at -0.5dBFS (Note 6) 64.3 66.4
f
IN
-0.77 ±0.35 LSB
/ 2 V
DD
80 MHz
pF
Clock
cycles
dB
dB
MAX1209
12-Bit, 80Msps, 3.3V IF-Sampling ADC
_______________________________________________________________________________________ 3
ELECTRICAL CHARACTERISTICS (continued)
(V
DD
= 3.3V, OV
DD
= 2.0V, GND = 0, REFIN = REFOUT (internal reference), V
IN
= -0.5dBFS, CLKTYP = high, DCE = high, PD = low,
G/T = low, f
CLK
= 80MHz (50% duty cycle), TA = -40°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.) (Note 1)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
Spurious-Free Dynamic Range SFDR
Third Harmonic HD3
Intermodulation Distortion IMD
Third-Order Intermodulation IM3
Two-Tone Spurious-Free
Dynamic Range
Full-Power Bandwidth FPBW Input at -0.5dBFS, -3dB roll-off 700 MHz
Aperture Delay t
Aperture Jitter t
Output Noise n
Overdrive Recovery Time ±10% beyond full scale 1
fIN = 70MHz at -0.5dBFS 85.1
fIN = 100MHz at -0.5dBFS 86.2
= 175MHz at -0.5dBFS (Note 6) 74.6 85.5
f
IN
dBc
fIN = 70MHz at -0.5dBFS -81.2
fIN = 100MHz at -0.5dBFS -82.3 Total Harmonic Distortion THD
f
= 175MHz at -0.5dBFS -82.7 -73.9
IN
dBc
fIN = 70MHz at -0.5dBFS -86.5
fIN = 100MHz at -0.5dBFS -89.6 Second Harmonic HD2
= 175MHz at -0.5dBFS -89
f
IN
dBc
fIN = 70MHz at -0.5dBFS -85.1
dBc
dBc
dBc
dBc
SFDR
AD
AJ
OUT
fIN = 100MHz at -0.5dBFS -86.5
= 175MHz at -0.5dBFS -88.6
f
IN
f
= 68.5MHz at -7dBFS,
TT
IN1
= 71.5MHz at -7dBFS
f
IN2
f
= 172.5MHz at -7dBFS,
IN1
= 177.5MHz at -7dBFS
f
IN2
f
= 68.5MHz at -7dBFS,
IN1
f
= 71.5MHz at -7dBFS
IN2
f
= 172.5MHz at -7dBFS,
IN1
f
= 177.5MHz at -7dBFS
IN2
f
= 68.5MHz at -7dBFS,
IN1
f
= 71.5MHz at -7dBFS
IN2
f
= 172.5MHz at -7dBFS,
IN1
f
= 177.5MHz at -7dBFS
IN2
-82.4
-74.2
-86.4
-86.1
85.1
74.2
Figure 4 0.9 ns
Figure 4 <0.2 ps
INP = INN = COM 0.52 LSB
Clock
cycles
RMS
RMS
MAX1209
12-Bit, 80Msps, 3.3V IF-Sampling ADC
4 _______________________________________________________________________________________
ELECTRICAL CHARACTERISTICS (continued)
(V
DD
= 3.3V, OV
DD
= 2.0V, GND = 0, REFIN = REFOUT (internal reference), V
IN
= -0.5dBFS, CLKTYP = high, DCE = high, PD = low,
G/T = low, f
CLK
= 80MHz (50% duty cycle), TA = -40°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.) (Note 1)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
INTERNAL REFERENCE (REFIN = REFOUT; V
REFOUT Output Voltage V
COM Output Voltage V
Differential Reference Output
Voltage
REFOUT Load Regulation 35 mV/mA
REFOUT Temperature Coefficient TC
REFOUT Short-Circuit Current
BUF F ERED EXTERNAL REF ERENCE (REF IN d ri ven extern al ly; V
REFIN Input Voltage V
REFP Output Voltage V
REFN Output Voltage V
COM Output Voltage V
Differential Reference Output
Voltage
Differential Reference
Temperature Coefficient
REFIN Input Resistance >50 MΩ
UNBUFFERED EXTERNAL REFERENCE (REFIN = GND; V
COM Input Voltage V
REFP Input Voltage V
REFN Input Voltage V
Differential Reference Input
Voltage
REFP Sink Current I
REFN Source Current I
COM Sink Current I
REFP, REFN Capacitance 13 pF
COM Capacitance 6p F
CLOCK INPUTS (CLKP, CLKN)
Single-Ended Input High
Threshold
Single-Ended Input Low
Threshold
Differential Input Voltage Swing CLKTYP = high 1.4 V
Differential Input Common-Mode
Voltage
, V
REFOUT
COM
V
REF
REF
REFIN
REFP
REFN
COM
V
REF
REFP
V
DD
V
REF
, and V
REFN
/ 2 1.65 V
= V
REFP
- V
Short to VDD—sinking 0.24
Short to GND—sourcing 2.1
R EF IN
(V
/ 2) + (V
DD
(V
DD
V
/ 2 1.60 1.65 1.70 V
DD
V
= V
REF
/ 2) - (V
REFP
REFIN
REFIN
- V
are generated internally)
COM
1.984 2.048 2.070 V
REFN
1.024 V
+50 ppm/°C
= 2.048V, V
R EF P
, V
R EF N
, an d V
are g en erated in tern ally)
C OM
2.048 V
/ 4) 2.162 V
/ 4) 1.138 V
REFN
0.971 1.024 1.069 V
mA
±25 ppm/°C
, V
COM
V
REF
REFP
REFN
COM
V
IH
V
REFN
, and V
REFP
V
/ 2 1.65 V
DD
- V
REFP
COM
- V
REFN
V
REF
V
REFP
V
REFN
COM
= V
REFP
- V
REFN
= 2.162V 1.1 mA
= 1.138V 1.1 mA
CLKTYP = GND, CLKN = GND
CLKTYP = GND, CLKN = GND
IL
CLKTYP = high V
are applied externally)
COM
0.8 x
V
DD
0.512 V
-0.512 V
1.024 V
0.3 mA
0.2 x
V
DD
/ 2 V
DD
V
V
P-P
MAX1209
12-Bit, 80Msps, 3.3V IF-Sampling ADC
_______________________________________________________________________________________ 5
ELECTRICAL CHARACTERISTICS (continued)
(V
DD
= 3.3V, OV
DD
= 2.0V, GND = 0, REFIN = REFOUT (internal reference), V
IN
= -0.5dBFS, CLKTYP = high, DCE = high, PD = low,
G/T = low, f
CLK
= 80MHz (50% duty cycle), TA = -40°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.) (Note 1)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
Input Resistance R
Input Capacitance C
DIGITAL INPUTS (CLKTYP, G/T, PD)
Input High Threshold V
Input Low Threshold V
Input Leakage Current
Input Capacitance C
DIGITAL OUTPUTS (D11–D0, DAV, DOR)
Output Voltage Low V
Output Voltage High V
Tri-State Leakage Current I
D11–D0, DOR Tri-State Output
Capacitance
DAV Tri-State Output
Capacitance
POWER REQUIREMENTS
Analog Supply Voltage V
Digital Output Supply Voltage OV
Analog Supply Current I
CLK
CLK
DIN
OH
LEAK
C
OUT
C
DAV
DD
Figure 5 5 kΩ
IH
IL
OL
VIH = OV
V
D11–D0, DOR, I
DAV, I
D11–D0, DOR, I
DAV, I
DD
= 0 ±5
IL
SINK
= 600µA 0.2
SINK
SOURCE
= 600µA
SOURCE
(Note 3) ±5 µA
(Note 3) 3 pF
(Note 3) 6 pF
DD
Normal operating mode,
f
= 175MHz at -0.5dBFS, CLKTYP = GND,
IN
single-ended clock
VDD
Normal operating mode,
= 175MHz at -0.5dBFS,
f
IN
CLKTYP = OV
differential clock
DD,
Power-down mode clock idle, PD = OV
2p F
0.8 x
OV
DD
0.2 x
OV
± 5
5p F
= 200µA 0.2
OV
-
= 200µA
0.2
OV
DD
DD
-
0.2
3.0 3.3 3.6 V
V
1.7 2.0
DD
0.3V
111
119 132
DD
0.001
DD
+
V
V
µA
V
V
V
mA
MAX1209
12-Bit, 80Msps, 3.3V IF-Sampling ADC
6 _______________________________________________________________________________________
Note 1: Specifications ≥ +25°C guaranteed by production test, <+25°C guaranteed by design and characterization.
Note 2: See definitions in the Parameter Definitions section.
Note 3: During power-down, D11–D0, DOR, and DAV are high impedance.
Note 4: Guaranteed by design and characterization.
Note 5: Digital outputs settle to V
IH
or VIL.
Note 6: Due to test equipment jitter limitations at 175MHz, 0.15% of the spectrum on each side of the fundamental is excluded from
the spectral analysis.
ELECTRICAL CHARACTERISTICS (continued)
(V
DD
= 3.3V, OV
DD
= 2.0V, GND = 0, REFIN = REFOUT (internal reference), V
IN
= -0.5dBFS, CLKTYP = high, DCE = high, PD = low,
G/T = low, f
CLK
= 80MHz (50% duty cycle), TA = -40°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.) (Note 1)
Analog Power Dissipation P
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
Digital Output Supply Current I
TIMING CHARACTERISTICS (Figure 6)
Clock Pulse Width High t
Clock Pulse Width Low t
Data-Valid Delay t
Data Setup Time Before Rising
Edge of DAV
Data Hold Time After Rising Edge
of DAV
Wake-Up Time from Power-Down t
Normal operating mode,
f
= 175MHz at -0.5dBFS, CLKTYP = GND,
IN
single-ended clock
DISS
OVDD
CH
CL
DAV
t
SETUP
t
HOLD
WAKE
Normal operating mode,
= 175MHz at -0.5dBFS,
f
IN
CLKTYP = OV
Power-down mode clock idle, PD = OV
Normal operating mode,
f
= 175MHz at -0.5dBFS, OVDD = 2.0V,
IN
≈ 5pF
C
L
Power-down mode clock idle, PD = OV
CL = 5pF (Note 5) 6.4 ns
CL = 5pF (Notes 4, 5) 7.7 ns
CL = 5pF (Notes 4, 5) 4.2 ns
V
= 2.048V 10 ms
REFIN
, differential clock
DD
DD
DD
366
mW
393 436
0.003
9.2 mA
0.9 µA
6.25 ns
6.25 ns
MAX1209
12-Bit, 80Msps, 3.3V IF-Sampling ADC
_______________________________________________________________________________________ 7
Typical Operating Characteristics
(V
DD
= 3.3V, OV
DD
= 2.0V, GND = 0, REFIN = REFOUT (internal reference), V
IN
= -0.5dBFS, CLKTYP = high, DCE = high, PD = low,
G/T = low, f
CLK
= 80MHz (50% duty cycle), TA = +25°C, unless otherwise noted.)
SINGLE-TONE FFT PLOT
(8192-POINT DATA RECORD)
0
-10
-20
-30
-40
-50
-60
-70
AMPLITUDE (dBFS)
-80
-90
-100
-110
0 4 8 12162024 28323640
f
= 80.00352MHz SINAD = 67.872dB
CLK
f
= 69.99331395MHz THD = -82.119dBc
IN
A
= -0.506dBFS SFDR = 85.522dBc
IN
SNR = 68.039dB
HD2
FREQUENCY (MHz)
TWO-TONE FFT PLOT
(16,384-POINT DATA RECORD)
0
-10
-20
-30
-40
-50
f
- f
IN2
-60
-70
AMPLITUDE (dBFS)
-80
-90
-100
-110
IN1
0 4 8 12162024 28323640
f
= 80MHz A
CLK
f
= 172.4853516MHz SFDRTT = 74.205dBc
IN1
A
= -6.976dBFS IMD = -74.108dBc
IN1
f
= 177.4853516MHz IM3 = -85.923dBc
IN2
f
IN1
f
IN2
FREQUENCY (MHz)
IN2
HD3
f
IN2
+ f
IN1
= -7.017dBFS
HD4
MAX1209 toc01
MAX1209 toc04
SINGLE-TONE FFT PLOT
(4096-POINT DATA RECORD)
0
-10
-20
-30
-40
-50
-60
-70
AMPLITUDE (dBFS)
-80
-90
-100
-110
0 4 8 12162024 28323640
f
= 80.00352MHz SINAD = 66.010dB
CLK
f
= 175.078125MHz THD = -82.976dBc
IN
A
= -0.500dBFS SFDR = 84.718dBc
IN
SNR = 66.097dB
INTEGRAL NONLINEARITY
1.0
0.8
0.6
0.4
0.2
0
INL (LSB)
-0.2
-0.4
-0.6
-0.8
-1.0
0 1024 1536 512 2048 2650 3072 3584 4096
HD4 HD2 HD3
FREQUENCY (MHz)
DIGITAL OUTPUT CODE
TWO-TONE FFT PLOT
(16,384-POINT DATA RECORD)
0
MAX1209 toc02
-10
-20
-30
-40
-50
-60
-70
AMPLITUDE (dBFS)
-80
-90
-100
-110
0 4 8 12162024 28323640
f
CLK
f
= 68.50098MHz SFDRTT = 85.065dBc
IN1
A
IN1
f
= 71.499MHz IM3 = -86.378dBc
IN2
f
IN1
f
IN2
f
+ 2 x f
IN1
IN2
2 x f
= -7.046dBFS
IN2
IN1
f
+ f
IN2
IN1
FREQUENCY (MHz)
= 80MHz A
= -7.049dBFS IMD = -82.255dBc
+ f
IN2
DIFFERENTIAL NONLINEARITY
1.0
0.8
MAX1209 toc05
0.6
0.4
0.2
0
DNL (LSB)
-0.2
-0.4
-0.6
-0.8
-1.0
0 1024 1536 512 2048 2650 3072 3584 4096
DIGITAL OUTPUT CODE
MAX1209 toc03
MAX1209 toc06
MAX1209
12-Bit, 80Msps, 3.3V IF-Sampling ADC
8 _______________________________________________________________________________________
Typical Operating Characteristics (continued)
(V
DD
= 3.3V, OV
DD
= 2.0V, GND = 0, REFIN = REFOUT (internal reference), V
IN
= -0.5dBFS, CLKTYP = high, DCE = high, PD = low,
G/T = low, f
CLK
= 80MHz (50% duty cycle), TA = +25°C, unless otherwise noted.)
SNR, SINAD (dB)
70
fIN ≈ 70MHz
69
68
67
66
65
64
63
62
0 100
SNR, SINAD vs. SAMPLING RATE
70
fIN ≈ 175MHz
69
68
67
66
65
SNR, SINAD (dB)
64
63
62
04 0 20 60 80 100
SNR, SINAD
vs. SAMPLING RATE
f
(MHz)
CLK
80 60 20 40
SNR
SINAD
MAX1209 toc07
100
fIN ≈ 70MHz
95
90
85
80
75
SFDR, -THD (dBc)
70
65
60
0 100
SFDR, -THD
vs. SAMPLING RATE
f
(MHz)
CLK
SFDR, -THD vs. SAMPLING RATE
100
fIN ≈ 175MHz
95
MAX1209 toc10
90
85
80
75
SFDR, -THD (dBc)
70
SNR
SINAD
f
(MHz )
CLK
65
60
04 0 20 60 80 100
f
(MHz )
CLK
450
MAX1209 toc08
400
350
300
POWEER DISSIPATION (mW)
250
200
500
MAX1209 toc11
450
400
350
POWER DISSIPATION (mW)
300
250
80 60 20 40
SFDR
-THD
SFDR
-THD
POWER DISSIPATION
vs. SAMPLING RATE
DIFFERENTIAL CLOCK
≈ 70MHz
f
IN
≈ 5pF
C
L
ANALOG + DIGITAL POWER
ANALOG POWER
CLK
80 60 20 40
(MHz)
0 120 100
f
POWER DISSIPATION
vs. SAMPLING RATE
DIFFERENTIAL CLOCK
≈ 175MHz
f
IN
≈ 5pF
C
L
ANALOG + DIGITAL POWER
ANALOG POWER
04 0 20 60 80 100
f
(MHz )
CLK
MAX1209 toc09
MAX1209 toc12
vs. ANALOG INPUT FREQUENCY
SNR, SINAD
70
f
≈ 80MHz
CLK
69
68
67
66
65
SNR, SINAD (dB)
64
63
62
0 50 100 150 200
ANALOG INPUT FREQUENCY (MHz)
SNR
SINAD
MAX1209 toc13
vs. ANALOG INPUT FREQUENCY
95
f
CLK
90
85
80
SFDR, -THD (dBc)
75
70
0 50 100 150 200
SFDR, -THD
≈ 80MHz
ANALOG INPUT FREQUENCY (MHz)
SFDR
-THD
500
MAX1209 toc14
450
400
350
POWER DISSIPATION (mW)
300
POWER DISSIPATION
vs. ANALOG INPUT FREQUENCY
DIFFERENTIAL CLOCK
≈ 80MHz
f
CLK
≈ 5pF
C
L
0 50 100 150 200
ANALOG INPUT FREQUENCY (MHz)
ANALOG + DIGITAL POWER
ANALOG POWER
MAX1209 toc15
MAX1209
12-Bit, 80Msps, 3.3V IF-Sampling ADC
_______________________________________________________________________________________ 9
Typical Operating Characteristics (continued)
(V
DD
= 3.3V, OV
DD
= 2.0V, GND = 0, REFIN = REFOUT (internal reference), V
IN
= -0.5dBFS, CLKTYP = high, DCE = high, PD = low,
G/T = low, f
CLK
= 80MHz (50% duty cycle), TA = +25°C, unless otherwise noted.)
SFDR, -THD
vs. OUTPUT-DRIVER POWER-INPUT VOLTAGE
MAX1209 toc23
OVDD (V)
SFDR, -THD (dBc)
3.4 3.0 2.6 2.2 1.8
65
70
75
80
85
90
95
100
60
1.4 3.8
f
CLK
= 80.03584MHz
f
IN
= 32.11399MHz
SFDR
-THD
POWER DISSIPATION
vs. OUTPUT-DRIVER POWER-INPUT VOLTAGE
MAX1209 toc24
OVDD (V)
SFDR, -THD (dBc)
3.4 3.0 2.6 2.2 1.8
250
225
300
350
400
450
500
550
200
1.4 3.8
DIFFERENTIAL CLOCK
f
CLK
= 80.03584MHz
f
IN
= 32.11399MHz
C
L
≈ 5pF
ANALOG + DIGITAL POWER
ANALOG POWER
SNR, SINAD
vs. ANALOG INPUT AMPLITUDE
70
f
= 79.95392MHz
CLK
65
= 175.00168MHz
f
IN
60
55
50
45
SNR, SINAD (dB)
40
35
30
25
-40 -30 -35 -25 -15 -5 -20 -10 0
ANALOG INPUT AMPLITUDE (dBFS)
SNR, SINAD
vs. ANALOG POWER-INPUT VOLTAGE
70
f
= 80.03584MHz
CLK
69
= 32.11399MHz
f
IN
68
67
66
65
64
SNR, SINAD (dB)
63
62
61
60
2.6 3.6
VDD (V)
vs. ANALOG INPUT AMPLITUDE
SFDR, -THD
470
450
MAX1209 toc17
430
410
390
POWER DISSIPATION (mW)
370
350
-40 -30 -35 -25 -15 -5 -20 -10 0
SNR
SINAD
MAX1209 toc16
90
f
= 79.95392MHz
CLK
85
= 175.00168MHz
f
IN
80
75
70
65
60
SFDR, -THD (dBc)
55
50
45
40
-40 -30 -35 -25 -15 -5 -20 -10 0
ANALOG INPUT AMPLITUDE (dBFS)
SFDR
-THD
SFDR, -THD
vs. ANALOG POWER-INPUT VOLTAGE
100
f
= 80.03584MHz
CLK
= 32.11399MHz
f
95
MAX1209 toc19
SNR
SINAD
3.4 3.2 3.0 2.8
IN
90
85
80
75
SFDR, -THD (dBc)
70
65
60
2.6 3.6
VDD (V)
3.4 3.2 3.0 2.8
SFDR
-THD
MAX1209 toc20
vs. ANALOG POWER-INPUT VOLTAGE
550
DIFFERENTIAL CLOCK
f
CLK
500
f
IN
C
L
450
400
350
300
POWER DISSIPATION (mW)
250
200
2.6 3.6
POWER DISSIPATION
vs. ANALOG INPUT AMPLITUDE
DIFFERENTIAL CLOCK
= 79.95392MHz
f
CLK
= 175.0016MHz
f
IN
≈ 5pF
C
L
ANALOG + DIGITAL POWER
ANALOG POWER
ANALOG INPUT AMPLITUDE (dBFS)
POWER DISSIPATION
= 80.03584MHz
= 32.11399MHz
≈
5pF
ANALOG + DIGITAL POWER
ANALOG POWER
VDD (V)
MAX1209 toc18
MAX1209 toc21
3.4 3.2 3.0 2.8
vs. OUTPUT-DRIVER POWER-INPUT VOLTAGE
SNR, SINAD
70
f
= 80.03584MHz
CLK
69
= 32.11399MHz
f
IN
68
67
66
65
64
SNR, SINAD (dB)
63
62
61
60
1.4 3.8
SNR
SINAD
OVDD (V)
MAX1209 toc22
3.4 3.0 2.6 2.2 1.8