Rainbow Electronics MAX1198 User Manual

General Description

The MAX1198 is a 3.3V, dual, 8-bit analog-to-digital con­verter (ADC) featuring fully differential wideband track­and-hold (T/H) inputs, driving two ADCs. The MAX1198
is optimized for low power, small size, and high-dynamic
performance for applications in imaging, instrumenta­tion, and digital communications. This ADC operates
from a single 2.7V to 3.6V supply, consuming only
264mW, while delivering a typical signal-to-noise and
distortion (SINAD) of 48.1dB at an input frequency of
50MHz and a sampling rate of 100Msps. The T/H-driven
input stages incorporate 400MHz (-3dB) input ampli­fiers. The converters may also be operated with single­ended inputs. In addition to low operating power, the
MAX1198 features a 3.2mA sleep mode, as well as a

0.15µA power-down mode to conserve power during
idle periods.

An internal 2.048V precision bandgap reference sets
the full-scale range of the ADC. A flexible reference
structure allows the use of this internal or an externally
applied reference, if desired, for applications requiring
increased accuracy or a different input voltage range.

The MAX1198 features parallel, CMOS-compatible three­state outputs. The digital output format can be set to two’s
complement or straight offset binary through a single con­trol pin. The device provides for a separate output power
supply of 1.7V to 3.6V for flexible interfacing with various
logic families. The MAX1198 is available in a 7mm x 7mm,
48-pin TQFP package, and is specified for the extended
industrial (-40°C to +85°C) temperature range.

Pin-compatible lower speed versions of the MAX1198
are also available. Refer to the MAX1195 data sheet for
40Msps and the MAX1197 data sheet for 60Msps. In
addition to these speed grades, this family includes a
multiplexed output version (MAX1196, 40Msps), for
which digital data is presented time interleaved and on
a single, parallel 8-bit output port.

For a 10-bit, pin-compatible upgrade, refer to the
MAX1180 data sheet. With the N.C. pins of the
MAX1198 internally pulled down to ground, this ADC
becomes a drop-in replacement for the MAX1180.

Applications

Features

♦ Single 2.7V to 3.6V Operation

♦ Excellent Dynamic Performance

48.1dB/47.6dB SINAD at f

IN

= 50MHz/200MHz

66dBc/61.5dBc SFDR at fIN= 50MHz/200MHz

♦ -72dB Interchannel Crosstalk at fIN= 50MHz

♦ Low Power

264mW (Normal Operation)

10.6mW (Sleep Mode)

0.5µW (Shutdown Mode)

♦ 0.05dB Gain and ±0.1° Phase Matching
♦ Wide ±1V

P-P

Differential Analog Input Voltage

Range

♦ 400MHz -3dB Input Bandwidth

♦ On-Chip 2.048V Precision Bandgap Reference

♦ User-Selectable Output Format—Two’s

Complement or Offset Binary

♦ Pin-Compatible 8-Bit and 10-Bit Upgrades

Available

MAX1198

Dual, 8-Bit, 100Msps, 3.3V, Low-Power ADC

with Internal Reference and Parallel Outputs

________________________________________________________________ Maxim Integrated Products 1

Pin Configuration

Ordering Information

19-2412; Rev 0; 4/02

For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.

Functional Diagram and Pin Compatible Upgrades table
appear at end of data sheet.

*EP = Exposed paddle

Baseband I/Q Sampling

Multichannel IF Sampling
Ultrasound and Medical

Imaging
Battery-Powered

Instrumentation

WLAN, WWAN, WLL,
MMDS Modems

Set-Top Boxes

VSAT Terminals

PART TEMP RANGE PIN-PACKAGE

MAX1198ECM -40°C to +85°C 48 TQFP-EP*

REFN

REFP

REFIN

REFOUT

D7A

D6A

D5A

D4A

D3A

D2A

D1A

D0A

COM

V
GND
INA+
INA-

V
GND
INB­INB+
GND

V

CLK

4847464544434241403938

1

2

DD

3

4

5

6

DD

7

8

9

10

11

DD

12

1314151617181920212223

GND

MAX1198

DD

DD

V

V

GND

TQFP-EP

OE

PD

T/B

SLEEP

D7B

D6B

D5B

37

24

D4B

36

N.C.
N.C.

35

OGND

34

OV

33

DD

OV

32

DD

OGND

31

N.C.

30

N.C.

29

D0B

28

D1B

27

D2B

26

D3B

25

MAX1198

Dual, 8-Bit, 100Msps, 3.3V, Low-Power ADC
with Internal Reference and Parallel Outputs

2 _______________________________________________________________________________________

ABSOLUTE MAXIMUM RATINGS

ELECTRICAL CHARACTERISTICS

(VDD= 3.3V, OVDD= 2.5V, 0.1µF and 2.2µF capacitors from REFP, REFN, and COM to GND; REFOUT connected to REFIN through a
10kΩ resistor, V

IN

= 2V

P-P

(differential with respect to COM), CL= 10pF at digital outputs, f

CLK

= 100MHz, TA= T

MIN

to T

MAX

, unless

otherwise noted. ≥+25°C guaranteed by production test, <+25°C guaranteed by design and characterization. Typical values are at
T

A

= +25°C.)

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.

VDD, OVDDto GND ...............................................-0.3V to +3.6V

OGND to GND.......................................................-0.3V to +0.3V

INA+, INA-, INB+, INB- to GND ...............................-0.3V to V

DD

REFIN, REFOUT, REFP, REFN,

COM, CLK to GND .................................-0.3V to (V

DD

+ 0.3V)

OE, PD, SLEEP, T/B, D7A–D0A,

D7B–D0B to OGND .............................-0.3V to (OV

DD

+ 0.3V)

Continuous Power Dissipation (T

A

= +70°C)

48-Pin TQFP (derate 12.5mW/°C above +70°C).........1000mW

Operating Temperature Range ...........................-40°C to +85°C

Junction Temperature......................................................+150°C

Storage Temperature Range .............................-60°C to +150°C

Lead Temperature (soldering, 10s) .................................+300°C

DC ACCURACY

Resolution 8 Bits

PARAMETER SYMBOL CONDITIONS MIN T YP MAX UNITS

Integral Nonlinearity INL fIN = 7.5MHz (Note 1) ±0.3 ±1 LSB

f

= 7.5MHz, no missing codes guaranteed

Differential Nonlinearity DNL

Offset Error ±4%FS
Gain Error ±4%FS
Gain Temperature Coefficient ±100 ppm/°C

ANALOG INPUT

Differential Input Voltage Range V

Common-Mode Input Voltage
Range

Input Resistance R

Input Capacitance C

CONVERSION RATE

Maximum Clock Frequency f

Data Latency 5

DYNAMIC CHARACTERISTICS (f

Signal-to-Noise Ratio SNR

DIFF

V

CM

IN

IN

CLK

= 100MHz, 4096-point FFT)

CLK

IN

(Note 1)

Differential or single-ended inputs ±1.0 V

Switched capacitor load 57 kΩ

100 MHz

f

= 7.5MHz at -1dB FS 48.5

INA or B

f

= 20MHz at -1dB FS 47.0 48.3

INA or B

f

= 50MHz at -1dB FS 48.3

INA or B

f

= 115.1MHz at -1dB FS 48.1

INA or B

±0.2 ±1 LSB

V

/ 2

D D

±0.2

5pF

Clock

Cycles

dB

V

MAX1198

Dual, 8-Bit, 100Msps, 3.3V, Low-Power ADC

with Internal Reference and Parallel Outputs

_______________________________________________________________________________________ 3

ELECTRICAL CHARACTERISTICS (continued)

(VDD= 3.3V, OVDD= 2.5V, 0.1µF and 2.2µF capacitors from REFP, REFN, and COM to GND; REFOUT connected to REFIN through a
10kΩ resistor, V

IN

= 2V

P-P

(differential with respect to COM), CL= 10pF at digital outputs, f

CLK

= 100MHz, TA= T

MIN

to T

MAX

, unless

otherwise noted. ≥+25°C guaranteed by production test, <+25°C guaranteed by design and characterization. Typical values are at
T

A

= +25°C.)

Signal-to-Noise and Distortion SINAD

Spurious-Free Dynamic Range SFDR

Third-Harmonic Distortion HD3

Intermodulation Distortion
(First Five Odd-Order IMDs)

Third-Order Intermodulation
Distortion

Total Harmonic Distortion
(First Four Harmonics)

Small-Signal Bandwidth Input at -20dB FS, differential inputs 500 MHz

Full-Power Bandwidth FPBW Input at -1dB FS, differential inputs 400 MHz

Gain Flatness
(12MHz Spacing)

Aperture Delay t

Aperture Jitter t
Overdrive Recovery Time For 1.5 × full-scale input 2 ns
IN T ER N A L REF ER EN C E ( RE FIN = RE FOU T thr oug h 10kΩ r esi stor ; RE FP , RE FN , and C OM l evel s ar e g ener ated i nter nal l y. )

Reference Output Voltage V

Positive Reference Output
Voltage

Negative Reference Output
Voltage

Common-Mode Level V

PARAMETER SYMBOL CONDITIONS MIN T YP MAX UNITS

f

= 7.5MHz at -1dB FS 48.3

INA or B

f

= 20MHz at -1dB FS 46.5 48.2

IMD

INA or B

f

= 50MHz at -1dB FS 48.1

INA or B

f

= 115.1MHz at -1dB FS 48

INA or B

f

= 7.5MHz at -1dB FS 67

INA or B

f

= 20MHz at -1dB FS 60 67

INA or B

f

= 50MHz at -1dB FS 66

INA or B

f

= 115.1MHz at -1dB FS 65

INA or B

f

= 7.5MHz at -1dB FS - 67

INA or B

f

= 20MHz at -1dB FS - 67

INA or B

f

= 50MHz at -1dB FS - 67

INA or B

f

= 115.1MHz at -1dB FS - 66

INA or B

f

IN1(A or B)

f

IN2(A or B)

= 1.989MHz at -7dB FS
= 2.038MHz at -7dB FS

- 69.5 dBc

dB

dBc

dBc

(Note 2)

IM3

f

IN1(A or B)

f

IN2(A or B)

= 1.989MHz at -7dB FS
= 2.038MHz at -7dB FS

- 80 dBc

(Note 2)

f

= 7.5MHz at -1dB FS - 66

INA or B

f

= 20MHz at -1dB FS - 67 - 57

THD

INA or B

f

= 50MHz at -1dB FS - 64

INA or B

f

= 115.1MHz at -1dB FS - 58

INA or B

f

IN1(A or B)

f

IN2(A or B)

= 106MHz at -1dB FS
= 118MHz at -1dB FS

dBc

0.05 dB

(Note 3)

AD

AJ

REFOUT

V

REFP

V

REFN

COM

1dB SNR degradation at Nyquist 2 ps

(Note 4)

(Note 5) 2.162 V

(Note 5) 1.138 V

(Note 5)

1ns

RMS

2.048
± 3%

V

D D

±0.1

/ 2

V

V

MAX1198

Dual, 8-Bit, 100Msps, 3.3V, Low-Power ADC
with Internal Reference and Parallel Outputs

4 _______________________________________________________________________________________

ELECTRICAL CHARACTERISTICS (continued)

(VDD= 3.3V, OVDD= 2.5V, 0.1µF and 2.2µF capacitors from REFP, REFN, and COM to GND; REFOUT connected to REFIN through a
10kΩ resistor, V

IN

= 2V

P-P

(differential with respect to COM), CL= 10pF at digital outputs, f

CLK

= 100MHz, TA= T

MIN

to T

MAX

, unless

otherwise noted. ≥+25°C guaranteed by production test, <+25°C guaranteed by design and characterization. Typical values are at
T

A

= +25°C.)

Differential Reference Output
Voltage Range

Reference Temperature
Coefficient

BUFFERED EXTERNAL REFERENCE (V

Positive Reference Output
Voltage

Negative Reference Output
Voltage

Common-Mode Level V

Differential Reference Output
Voltage Range

REFIN Resistance R

Maximum REFP, COM Source
Current

Maximum REFP, COM Sink
Current

Maximum REFN Source Current I

Maximum REFN Sink Current I

U N B U F F ER ED EXT ER N A L R EF ER EN C E ( V

REFP, REFN Input Resistance

REFP, REFN, COM Input
Capacitance

Differential Reference Input
Voltage Range

COM Input Voltage Range V

REFP Input Voltage V

REFN Input Voltage V

DIGITAL INPUTS (CLK, PD, OE, SLEEP, T/B)

Input High Threshold V

PARAMETER SYMBOL CONDITIONS MIN T YP MAX UNITS

∆V

REF

TC

REF

REFIN

V

REFP

V

REFN

COM

∆V

REF

REFIN

I

SOURCE

I

SINK

SOURCE

SINK

R

REFP

R

REFN

C

IN

∆V

REF

COM

REFP

REFN

IH

∆V

REF

= V

REFP

- V

REFN

= 2.048V)

(Note 5) 2.162 V

(Note 5) 1.138 V

(Note 5)

∆V

= V

REF

= AGN D , r efer ence vol tag e ap p l i ed to RE FP , RE FN , and C OM )

RE F IN

,

Measured between REFP, COM, REFN,

REFP

- V

REFN

and COM

∆V

= V

REF

CLK

PD, OE, SLEEP, T/B

REFP

- V

REFN

0.8 ×

V

0.8 ×

OV

1.024
± 3%

±100 ppm/°C

V

/ 2

D D

± 0.1

1.024
± 2%

> 50 MΩ

5mA

- 250 µA

250 µA

- 5mA

4kΩ

15 pF

1.024

±10%

V

/ 2

D D

±5%

V

+

C OM

∆V

/ 2

RE F

V

-

C OM

∆V

/ 2

RE F

DD

DD

V

V

V

V

V

V

V

V

MAX1198

Dual, 8-Bit, 100Msps, 3.3V, Low-Power ADC

with Internal Reference and Parallel Outputs

_______________________________________________________________________________________ 5

ELECTRICAL CHARACTERISTICS (continued)

(VDD= 3.3V, OVDD= 2.5V, 0.1µF and 2.2µF capacitors from REFP, REFN, and COM to GND; REFOUT connected to REFIN through a
10kΩ resistor, V

IN

= 2V

P-P

(differential with respect to COM), CL= 10pF at digital outputs, f

CLK

= 100MHz, TA= T

MIN

to T

MAX

, unless

otherwise noted. ≥+25°C guaranteed by production test, <+25°C guaranteed by design and characterization. Typical values are at
T

A

= +25°C.)

Input Low Threshold V

Input Hysteresis V

Input Leakage

Input Capacitance C

DIGITAL OUTPUTS ( D7A–D0A, D7B–D0B)

Output Voltage Low V

Output Voltage High V

Three-State Leakage Current I

Three-State Output Capacitance C

POWER REQUIREMENTS

Analog Supply Voltage Range V

Output Supply Voltage Range OV

Analog Supply Current I

Output Supply Current I

Analog Power Dissipation PDISS

Power-Supply Rejection PSRR

TIMING CHARACTERISTICS

CLK Rise to Output Data Valid
Time

OE Fall to Output Enable Time t
OE Rise to Output Disable Time t

CLK Pulse Width High t

CLK Pulse Width Low t

PARAMETER SYMBOL CONDITIONS MIN T YP MAX UNITS

0.2 ×

V

DD

0.2 ×

OV

±20

DD

V

µA

5pF

V

±10 µA

5pF

mA

210

µA

mW

IL

HYST

I

IH

I

IL

IN

OL

OH

LEAK

OUT

DD

DD

VDD

OVDD

CLK

PD, OE, SLEEP, T/B

0.15 V

VIH = VDD = OV

DD

VIL = 0 ±20

I

= -200µA 0.2 V

SINK

OV

-

I

SOURCE

OE = OV
OE = OV

= 200µA

DD

DD

DD

0.2

2.7 3.3 3.6 V

CL = 15pF 1.7 2.5 3.6 V

Operating, f
applied to both channels

= 20MHz at -1dB FS

INA & B

80 95

Sleep mode 3.2
Shutdown, clock idle, PD = OE = OV

Operating, f

= 20MHz at -1dB FS

INA & B

applied to both channels (Note 6)

DD

0.15 20 µA

11.5 mA

Sleep mode 2
Shutdown, clock idle, PD = OE = OV

Operating, f

= 20MHz at -1dB FS

INA & B

applied to both channels

DD

264 314

Sleep mode 10.6

0.5 66 µW

mV/V

5ns

5ns

t

DO

ENABLE

DISABLE

CH

CL

Shutdown, clock idle, PD = OE = OV

DD

Offset, VDD ±5% ±3

Gain, V

±5% ±3

DD

CL = 20pF (Notes 1, 7) 6 8.25 ns

Clock period: 10ns (Note 7) 5 ± 0.5 ns

Clock period: 10ns (Note 7) 5 ± 0.5 ns

MAX1198

Dual, 8-Bit, 100Msps, 3.3V, Low-Power ADC
with Internal Reference and Parallel Outputs

6 _______________________________________________________________________________________

Note 1: Guaranteed by design. Not subject to production testing.
Note 2: Intermodulation distortion is the total power of the intermodulation products relative to the total input power.
Note 3: Analog attenuation is defined as the amount of attenuation of the fundamental bin from a converted FFT between two

applied input signals with the same magnitude (peak-to-peak) at f

IN1

and f

IN2

.

Note 4: REFIN and REFOUT should be bypassed to GND with a 0.1µF (min) and 2.2µF (typ) capacitor.
Note 5: REFP, REFN, and COM should be bypassed to GND with a 0.1µF (min) and 2.2µF (typ) capacitor.
Note 6: Typical analog output current at f

INA & B

= 20MHz. For digital output currents vs. analog input frequency,

see Typical Operating Characteristics.

Note 7: See Figure 3 for detailed system timing diagrams. Clock to data valid timing is measured from 50% of the clock

level to 50% of the data output level.

Note 8: Crosstalk rejection is tested by applying a test tone to one channel and holding the other channel at DC level.

Crosstalk is measured by calculating the power ratio of the fundamental of each channel’s FFT.

Note 9: Amplitude matching is measured by applying the same signal to each channel and comparing the magnitude of the funda-

mental of the calculated FFT.

Note 10: Phase matching is measured by applying the same signal to each channel and comparing the phase of the fundamental

of the calculated FFT. The data from both ADC channels must be captured simultaneously during this test.

Note 11: SINAD settles to within 0.5dB of its typical value in unbuffered external reference mode.

ELECTRICAL CHARACTERISTICS (continued)

(VDD= 3.3V, OVDD= 2.5V, 0.1µF and 2.2µF capacitors from REFP, REFN, and COM to GND; REFOUT connected to REFIN through a
10kΩ resistor, V

IN

= 2V

P-P

(differential with respect to COM), CL= 10pF at digital outputs, f

CLK

= 100MHz, TA= T

MIN

to T

MAX

, unless

otherwise noted. ≥+25°C guaranteed by production test, <+25°C guaranteed by design and characterization. Typical values are at
T

A

= +25°C.)

Wake-Up Time t

CHANNEL-TO-CHANNEL MATCHING

Crosstalk f

Gain Matching f

Phase Matching f

PARAMETER SYMBOL CONDITIONS MIN T YP MAX UNITS

WAKE

Wake up from sleep mode 1

Wake up from shutdown mode (Note 11) 20

= 20MHz at -1dB FS (Note 8) - 72 dB

INA or B

= 20MHz at -1dB FS (Note 9) 0.05 dB

INA or B

= 20MHz at -1dB FS (Note 10) ± 0.1 Degrees

INA or B

µs

MAX1198

Dual, 8-Bit, 100Msps, 3.3V, Low-Power ADC

with Internal Reference and Parallel Outputs

_______________________________________________________________________________________ 7

Typical Operating Characteristics

(VDD= 3.3V, OVDD= 2.5V, V

REFIN

= 2.048V, differential input at -1dB FS, f

CLK

= 100MHz, CL≈ 10pF, TA= +25°C, unless otherwise

noted.)

FFT PLOT CHA (DIFFERENTIAL INPUT,

FFT PLOT CHA (DIFFERENTIAL INPUT,

8192-POINT DATA RECORD)

MAX1198 toc01

0

-10

-20

-30

-40

-50

AMPLITUDE (dB)

-60

-70

-80

-90
050

TWO-TONE IMD PLOT (DIFFERENTIAL INPUT,

0

-10

-20

-30

-40

-50

AMPLITUDE (dB)

-60

-70

-80

-90

f

INA

f

INB

050

ANALOG INPUT FREQUENCY (MHz)

f

= 100.050607MHz

CLK

= 19.8708908MHz

f

INA

= 7.5355498MHz

f

INB

AIN = -1dB FS
COHERENT SAMPLING

HD3

HD2

454030 3510 15 20 255

TWO-TONE IMD PLOT (DIFFERENTIAL INPUT,

8192-POINT DATA RECORD)

MAX1198 toc04

AMPLITUDE (dB)

0

f

CLK

-10

f

IN1

f

IN2

-20
AIN = -7dB FS

COHERENT SAMPLING

-30

-40

-50

-60

-70

-80

-90

0

-10

-20

-30

-40

-50

AMPLITUDE (dB)

-60

-70

-80

-90

f

= 100.007936MHz

CLK

= 1.989904MHz

f

IN1

= 2.038736MHz

f

IN2

AIN = -7dB FS
COHERENT SAMPLING

f

IN1

ANALOG INPUT FREQUENCY (MHz)

f

IN2

4.54.03.0 3.51.0 1.5 2.0 2.50.50 5.0

8192-POINT DATA RECORD)

f

= 100.050607MHz

CLK

= 49.7443997MHz

f

INA

= 19.8708908MHz

f

INB

AIN = -1dB FS
COHERENT SAMPLING

f

HD2

= 100.007936MHz
= 10.022768MHz
= 10.047184MHz

INB

ANALOG INPUT FREQUENCY (MHz)

8192-POINT DATA RECORD)

f

IN1

ANALOG INPUT FREQUENCY (MHz)

f

IN2

FFT PLOT CHA (DIFFERENTIAL INPUT,

8192-POINT DATA RECORD)

0

-10

MAX1198 toc02

-20
f

INA

f

INA

HD3

454030 3510 15 20 255

-30

-40

-50

AMPLITUDE (dB)

f

INB

-60

-70

-80

-90

050

ANALOG INPUT FREQUENCY (MHz)

f

= 100.050607MHz

CLK

= 114.9629350MHz

f

INA

= 99.5010126MHz

f

INB

AIN = -1dB FS
COHERENT SAMPLING

HD3

HD2

454030 3510 15 20 255

SIGNAL-TO-NOISE RATIO

vs. ANALOG INPUT FREQUENCY

50

MAX1198 toc05

12111098713

48

46

SNR (dB)

44

42

40

0200

ANALOG INPUT FREQUENCY (MHz)

CHB

CHA

1601208040

MAX1198 toc03

MAX1198 toc06

SIGNAL-TO-NOISE + DISTORTION

vs. ANALOG INPUT FREQUENCY

50

48

46

SNR (dB)

44

42

40

0200

CHA

MAX1198 toc07

CHB

THD (dBc)

1601208040

ANALOG INPUT FREQUENCY (MHz)

TOTAL HARMONIC DISTORTION
vs. ANALOG INPUT FREQUENCY

-40

-48

-56

-64

-72

-80

ANALOG INPUT FREQUENCY (MHz)

CHA

CHB

SPURIOUS-FREE DYNAMIC RANGE

vs. ANALOG INPUT FREQUENCY

80

MAX1198 toc08

16012080400200

72

64

SFDR (dBc)

56

48

40

CHA

CHB

ANALOG INPUT FREQUENCY (MHz)

MAX1198 toc09

16012080400200