Rainbow Electronics MAX1195 User Manual

General Description
The MAX1195 is a 3V, dual, 8-bit analog-to-digital con­verter (ADC) featuring fully differential wideband track­and-hold (T/H) inputs, driving two ADCs. The MAX1195 is optimized for low-power, small size, and high-dynamic performance for applications in imaging, instrumentation and digital communications. This ADC operates from a single 2.7V to 3.6V supply, consuming only 87mW while delivering a typical signal-to-noise and distortion (SINAD) of 48.5dB at an input frequency of 20MHz and a sam­pling rate of 40Msps. The T/H-driven input stages incor­porate 400MHz (-3dB) input amplifiers. The converters may also be operated with single-ended inputs. In addi­tion to low operating power, the MAX1195 features a 3mA sleep mode as well as a 0.1µA power-down mode to conserve power during idle periods.
An internal 2.048V precision bandgap reference sets the full-scale range of the ADC. A flexible reference structure allows the use of this internal or an externally applied reference, if desired, for applications requiring increased accuracy or a different input voltage range.
The MAX1195 features parallel, CMOS-compatible three­state outputs. The digital output format can be set to two’s complement or straight offset binary through a single con­trol pin. The device provides for a separate output power supply of 1.7V to 3.6V for flexible interfacing with various logic families. The MAX1195 is available in a 7mm x 7mm, 48-pin TQFP package, and is specified for the extended industrial (-40°C to +85°C) temperature range.
Pin-compatible higher speed versions of the MAX1195 are also available. Refer to the MAX1197 data sheet for 60Msps and the MAX1198 data sheet for 100Msps. In addition to these speed grades, this family will include a multiplexed output version (MAX1196, 40Msps), for which digital data is presented time interleaved and on a single, parallel 8-bit output port.
For a 10-bit, pin-compatible upgrade, refer to the MAX1183 data sheet. With the N.C. pins of the MAX1195 internally pulled down to ground, this ADC becomes a drop-in replacement for the MAX1183.
Applications
Features
Single 2.7V to 3.6V Operation
Excellent Dynamic Performance
48.5dB/46.7dB SINAD at f
IN
= 20MHz/200MHz
68.7dBc/55.7dBc SFDR at fIN= 20MHz/200MHz
-72dB Interchannel Crosstalk at fIN= 20MHz
Low Power
87mW (Normal Operation) 9mW (Sleep Mode)
0.3µW (Shutdown Mode)
0.05dB Gain and ±0.05° Phase MatchingWide ±1V
P-P
Differential Analog Input Voltage
Range
400MHz -3dB Input Bandwidth
On-Chip 2.048V Precision Bandgap Reference
User-Selectable Output Format—Two’s
Complement or Offset Binary
Pin-Compatible 8-Bit and 10-Bit Upgrades
Available
MAX1195
Dual, 8-Bit, 40Msps, 3V, Low-Power ADC with
Internal Reference and Parallel Outputs
________________________________________________________________ Maxim Integrated Products 1
Pin Configuration
Ordering Information
19-2410; Rev 0; 4/02
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
Functional Diagram and Pin Compatible Upgrades table appear at end of data sheet.
*EP = Exposed paddle
Baseband I/Q Sampling Multichannel IF Sampling Ultrasound and Medical
Imaging Battery-Powered
Instrumentation
WLAN, WWAN, WLL, MMDS Modems
Set-Top Boxes VSAT Terminals
PART TEMP RANGE PIN-PACKAGE
MAX1195ECM -40°C to +85°C 48 TQFP-EP*
REFN
REFP
REFIN
REFOUT
D7A
D6A
D5A
D4A
D3A
D2A
D1A
D0A
COM
V GND INA+ INA-
V GND INB­INB+ GND
V
CLK
4847464544434241403938
1
2
DD
3
4
5
6
DD
7
8
9
10
11
DD
12
1314151617181920212223
GND
MAX1195
DD
DD
V
V
GND
TQFP-EP
OE
PD
T/B
SLEEP
D7B
D6B
D5B
37
24
D4B
36
N.C. N.C.
35
OGND
34
OV
33
DD
OV
32
DD
OGND
31
N.C.
30
N.C.
29
D0B
28
D1B
27
D2B
26
D3B
25
MAX1195
Dual, 8-Bit, 40Msps, 3V, Low-Power ADC with Internal Reference and Parallel Outputs
2 _______________________________________________________________________________________
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS
(VDD= OVDD= 3V, 0.1µF and 2.2µF capacitors from REFP, REFN, and COM to GND; REFOUT connected to REFIN through a 10k resistor, V
IN
= 2V
P-P
(differential with respect to COM), CL= 10pF at digital outputs, f
CLK
= 40MHz, TA= T
MIN
to T
MAX
, unless
otherwise noted. +25°C guaranteed by production test, <+25°C guaranteed by design and characerization. Typical values are at T
A
= +25°C.)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
VDD, OVDDto GND ...............................................-0.3V to +3.6V
OGND to GND.......................................................-0.3V to +0.3V
INA+, INA-, INB+, INB- to GND ...............................-0.3V to V
DD
REFIN, REFOUT, REFP, REFN,
COM, CLK to GND .................................-0.3V to (V
DD
+ 0.3V)
OE, PD, SLEEP, T/B, D7A–D0A,
D7B–D0B to OGND .............................-0.3V to (OV
DD
+ 0.3V)
Continuous Power Dissipation (T
A
= +70°C)
48-Pin TQFP (derate 12.5mW/°C above +70°C).........1000mW
Operating Temperature Range ...........................-40°C to +85°C
Junction Temperature......................................................+150°C
Storage Temperature Range .............................-60°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
DC ACCURACY
Resolution 8 Bits
PARAMETER SYMBOL CONDITIONS MIN T YP MAX UNITS
Integral Nonlinearity INL fIN = 7.51MHz (Note 1) ±0.3 ±1 LSB
f
= 7.51MHz, no missing codes
Differential Nonlinearity DNL
Offset Error ±4%FS Gain Error ±4%FS Gain Temperature Coefficient ±100 ppm/°C
ANALOG INPUT
Differential Input Voltage Range V
Common-Mode Input Voltage Range
Input Resistance R
Input Capacitance C
CONVERSION RATE
Maximum Clock Frequency f
Data Latency 5
DYNAMIC CHARACTERISTICS (f
Signal-to-Noise Ratio SNR
DIFF
V
CM
IN
IN
CLK
= 40MHz, 4096-point FFT)
CLK
IN
guaranteed (Note 1)
Differential or single-ended inputs ±1.0 V
Switched capacitor load 140 k
f
= 1MHz at -1dB FS 48.7
INA or B
f
= 7.5MHz at -1dB FS 48.7
INA or B
f
= 20MHz at -1dB FS 47.5 48.6
INA or B
f
= 115.1MHz at -1dB FS 48.0
INA or B
±0.15 ±1 LSB
V
/ 2
D D
±0.2
5pF
40 MHz
Clock
Cycles
dB
V
MAX1195
Dual, 8-Bit, 40Msps, 3V, Low-Power ADC with
Internal Reference and Parallel Outputs
_______________________________________________________________________________________ 3
ELECTRICAL CHARACTERISTICS (continued)
(VDD= OVDD= 3V, 0.1µF and 2.2µF capacitors from REFP, REFN, and COM to GND; REFOUT connected to REFIN through a 10k resistor, V
IN
= 2V
P-P
(differential with respect to COM), CL= 10pF at digital outputs, f
CLK
= 40MHz, TA= T
MIN
to T
MAX
, unless
otherwise noted. +25°C guaranteed by production test, <+25°C guaranteed by design and characerization. Typical values are at T
A
= +25°C.)
Signal-to-Noise and Distortion
Spurious-Free Dynamic Range
Third-Harmonic Distortion
Intermodulation Distortion (First Five Odd-Order IMDs)
Third-Order Intermodulation Distortion
Total Harmonic Distortion (First Four Harmonics)
Small-Signal Bandwidth Input at -20dB FS, differential inputs 500 MHz
Full-Power Bandwidth FPBW Input at -1dB FS, differential inputs 400 MHz
Gain Flatness (12MHz Spacing)
Aperture Delay t
Aperture Jitter t Overdrive Recovery Time For 1.5 × full-scale input 2 ns IN T ER N A L REF ER EN C E ( RE FIN = RE FOU T thr oug h 10k r esi stor ; RE FP , RE FN , and C OM l evel s ar e g ener ated i nter nal l y. )
Reference Output Voltage V
Positive Reference Output Voltage
Negative Reference Output Voltage
PARAMETER SYMBOL CONDITIONS MIN T YP MAX UNITS
f
= 1MHz at -1dB FS 48.6
INA or B
f
= 7.5MHz at -1dB FS 48.5
SINAD
SFDR
HD3
IMD
INA or B
f
= 20MHz at -1dB FS 47 48.5
INA or B
f
= 115.1MHz at -1dB FS 47.8
INA or B
f
= 1MHz at -1dB FS 73
INA or B
f
= 7.5MHz at -1dB FS 69
INA or B
f
= 20MHz at -1dB FS 60 68.7
INA or B
= 115.1MHz at -1dB FS 63
f
INA or B
f
= 1MHz at -1dB FS - 75
INA or B
f
= 7.5MHz at -1dB FS - 73
INA or B
f
= 20MHz at -1dB FS - 70
INA or B
= 115.1MHz at -1dB FS - 63
f
INA or B
f
IN1(A or B)
f
IN2(A or B)
= 1.997MHz at -7dB FS = 2.046MHz at -7dB FS
dB
dBc
dBc
- 69.5 dBc
(Note 2)
IM3
f
IN1(A or B)
f
IN2(A or B)
= 1.997MHz at -7dB FS = 2.046 MHz at -7dB FS
- 71.7 dBc
(Note 2)
f
= 1MHz at -1dB FS - 70
INA or B
f
= 7.5MHz at -1dB FS - 69
THD
INA or B
f
= 20MHz at -1dB FS - 69 -57
INA or B
= 115.1MHz at -1dB FS - 62
f
INA or B
f
IN1(A or B)
f
IN2(A or B)
= 106 MHz at -1dB FS = 118 MHz at -1dB FS
0.05 dB
dBc
(Note 3)
AD
AJ
REFOUT
V
REFP
V
REFN
(Note 1) 1 ns
1dB SNR degradation at Nyquist 2 ps
(Note 4)
2.048 ± 3%
(Note 5) 2.012 V
(Note 5) 0.988 V
RMS
V
MAX1195
Dual, 8-Bit, 40Msps, 3V, Low-Power ADC with Internal Reference and Parallel Outputs
4 _______________________________________________________________________________________
ELECTRICAL CHARACTERISTICS (continued)
(VDD= OVDD= 3V, 0.1µF and 2.2µF capacitors from REFP, REFN, and COM to GND; REFOUT connected to REFIN through a 10k resistor, V
IN
= 2V
P-P
(differential with respect to COM), CL= 10pF at digital outputs, f
CLK
= 40MHz, TA= T
MIN
to T
MAX
, unless
otherwise noted. +25°C guaranteed by production test, <+25°C guaranteed by design and characerization. Typical values are at T
A
= +25°C.)
Common-Mode Level V
Differential Reference Output Voltage Range
Reference Temperature Coefficient
BUFFERED EXTERNAL REFERENCE (V
Positive Reference Output Voltage
Negative Reference Output Voltage
Common-Mode Level V
Differential Reference Output Voltage Range
REFIN Resistance R
Maximum REFP, COM Source Current
Maximum REFP, COM Sink Current
Maximum REFN Source Current I
Maximum REFN Sink Current I
U N B U F F ER ED EXT ER N A L R EF ER EN C E ( V
REFP, REFN Input Resistance
REFP, REFN, COM Input Capacitance
Differential Reference Input Voltage Range
COM Input Voltage Range V
REFP Input Voltage V
REFN Input Voltage V
PARAMETER SYMBOL CONDITIONS MIN T YP MAX UNITS
V
/ 2
COM
V
REF
TC
REF
REFIN
V
REFP
V
REFN
COM
V
REF
REFIN
I
SOURCE
I
SINK
SOURCE
SINK
R
REFP
R
REFN
C
IN
V
REF
COM
REFP
REFN
(Note 5)
V
REF
= V
REFP
- V
REFN
= 2.048V)
(Note 5) 2.012 V
(Note 5) 0.988 V
(Note 5)
V
= V
REF
= AGN D , r efer ence vol tag e ap p l i ed to RE FP , RE FN , and C OM )
RE F IN
,
Measured between REFP, COM, REFN,
REFP
- V
REFN
and COM
V
REF
= V
REFP
- V
REFN
D D
±0.1
1.024
± 3%
±100 ppm/°C
V
/ 2
D D
± 0.1
1.024
± 2%
> 50 M
5mA
- 250 µA
250 µA
- 5mA
4k
15 pF
1.024 ±10%
V
/ 2
D D
±5%
V
+
C OM
/ 2
V
RE F
V
C OM
/ 2
V
RE F
V
V
V
V
V
V
V
V
MAX1195
Dual, 8-Bit, 40Msps, 3V, Low-Power ADC with
Internal Reference and Parallel Outputs
_______________________________________________________________________________________ 5
ELECTRICAL CHARACTERISTICS (continued)
(VDD= OVDD= 3V, 0.1µF and 2.2µF capacitors from REFP, REFN, and COM to GND; REFOUT connected to REFIN through a 10k resistor, V
IN
= 2V
P-P
(differential with respect to COM), CL= 10pF at digital outputs, f
CLK
= 40MHz, TA= T
MIN
to T
MAX
, unless
otherwise noted. +25°C guaranteed by production test, <+25°C guaranteed by design and characerization. Typical values are at T
A
= +25°C.)
DIGITAL INPUTS (CLK, PD, OE, SLEEP, T/B)
Input High Threshold V
Input Low Threshold V
Input Hysteresis V
Input Leakage
Input Capacitance C
DIGITAL OUTPUTS ( D7A–D0A, D7BD0B)
Output Voltage Low V
Output Voltage High V
Three-State Leakage Current I
Three-State Output Capacitance C
POWER REQUIREMENTS
Analog Supply Voltage Range V
Output Supply Voltage Range OV
Analog Supply Current I
Output Supply Current I
Analog Power Dissipation PDISS
Power-Supply Rejection
PARAMETER SYMBOL CONDITIONS MIN T YP MAX UNITS
0.8 ×
V
DD
0.8 ×
OV
DD
0.2 ×
V
DD
0.2 ×
OV
DD
0.15 V
±20
5pF
OV
DD
- 0.2
±10 µA
5pF
2.7 3 3.6 V
29 36
0.1 20 µA
8mA
310
87 108
µA
mA
µA
mW
IH
IL
HYST
I
IH
I
IL
IN
OL
OH
LEAK
OUT
DD
DD
VDD
OVDD
CLK
PD, OE, SLEEP, T/B
CLK
PD, OE, SLEEP, T/B
VIH = VDD = OV
DD
VIL = 0 ±20
I
= -200µA 0.2 V
SINK
I
OE = OV OE = OV
SOURCE
= 200µA
DD
DD
CL = 15pF 1.7 3 3.6 V
Operating, f
INA & B
= 20MHz at
-1dB FS applied to both channels
Sleep mode 3 Shutdown, clock idle, PD = OE = OV
Operating, f
INA & B
= 20MHz at
DD
-1dB FS applied to both channels (Note 6)
Sleep mode 3 Shutdown, clock idle, PD = OE = OV
Operating, f
INA & B
= 20MHz at
DD
-1dB FS applied to both channels
Sleep mode 9
PSRR
Shutdown, clock idle, PD = OE = OV
DD
Offset, VDD ±5% ±3
Gain, V
±5% ±3
DD
0.3 60 µW
mV/V
V
V
V
MAX1195
Dual, 8-Bit, 40Msps, 3V, Low-Power ADC with Internal Reference and Parallel Outputs
6 _______________________________________________________________________________________
Note 1: Guaranteed by design. Not subject to production testing. Note 2: Intermodulation distortion is the total power of the intermodulation products relative to the total input power. Note 3: Analog attenuation is defined as the amount of attenuation of the fundamental bin from a converted FFT between two
applied input signals with the same magnitude (peak-to-peak) at f
IN1
and f
IN2
.
Note 4: REFIN and REFOUT should be bypassed to GND with a 0.1µF (min) and 2.2µF (typ) capacitor. Note 5: REFP, REFN, and COM should be bypassed to GND with a 0.1µF (min) and 2.2µF (typ) capacitor. Note 6: Typical analog output current at f
INA&B
= 20MHz. For digital output currents vs. analog input frequency,
see Typical Operating Characteristics.
Note 7: See Figure 3 for detailed system timing diagrams. Clock to data valid timing is measured from 50% of the clock
level to 50% of the data output level.
Note 8: Crosstalk rejection is tested by applying a test tone to one channel and holding the other channel at DC level.
Crosstalk is measured by calculating the power ratio of the fundamental of each channels FFT.
Note 9: Amplitude matching is measured by applying the same signal to each channel and comparing the magnitude of the funda-
mental of the calculated FFT.
Note 10: Phase matching is measured by applying the same signal to each channel and comparing the phase of the fundamental
of the calculated FFT. The data from both ADC channels must be captured simultaneously during this test.
Note 11: SINAD settles to within 0.5dB of its typical value in unbuffered external reference mode.
ELECTRICAL CHARACTERISTICS (continued)
(VDD= OVDD= 3V, 0.1µF and 2.2µF capacitors from REFP, REFN, and COM to GND; REFOUT connected to REFIN through a 10k resistor, V
IN
= 2V
P-P
(differential with respect to COM), CL= 10pF at digital outputs, f
CLK
= 40MHz, TA= T
MIN
to T
MAX
, unless
otherwise noted. +25°C guaranteed by production test, <+25°C guaranteed by design and characerization. Typical values are at T
A
= +25°C.)
TIMING CHARACTERISTICS
CLK Rise to Output Data Valid Time
OE Fall to Output Enable Time t OE Rise to Output Disable Time t
CLK Pulse Width High t
CLK Pulse Width Low t
Wake-Up Time t
CHANNEL-TO-CHANNEL MATCHING
Crosstalk f
Gain Matching f
Phase Matching f
PARAMETER SYMBOL CONDITIONS MIN T YP MAX UNITS
t
DO
ENABLE
DISABLE
CH
CL
WAKE
CL = 20pF (Notes 1, 7) 6 9 ns
Clock period: 25ns (Note 7)
Clock period: 25ns (Note 7)
Wake up from sleep mode 1
Wake up from shutdown mode (Note 11) 20
= 20MHz at -1dB FS (Note 8) - 72 dB
INA or B
= 20MHz at -1dB FS (Note 9) 0.05 dB
INA or B
= 20MHz at -1dB FS (Note 10) ± 0.05 Degrees
INA or B
5ns
5ns
12.5 ± 1.5
12.5 ± 1.5
ns
ns
µs
MAX1195
Dual, 8-Bit, 40Msps, 3V, Low-Power ADC with
Internal Reference and Parallel Outputs
_______________________________________________________________________________________ 7
Typical Operating Characteristics
(VDD= 3V, OVDD= 3V, V
REFIN
= 2.048V, differential input at -1dB FS, f
CLK
= 40MHz, CL≈ 10pF TA= +25°C, unless otherwise
noted.)
FFT PLOT CHA (DIFFERENTIAL INPUT,
FFT PLOT CHA (DIFFERENTIAL INPUT,
8192-POINT DATA RECORD)
0
-10
-20
-30
-40
-50
AMPLITUDE (dB)
-60
-70
-80
-90
f
INA
HD2
HD3
020
ANALOG INPUT FREQUENCY (MHz)
f
= 40.056789MHz
CLK
= 1.0317361MHz
f
INA
= 7.4861992MHz
f
INB
AIN = -1dB FS COHERENT SAMPLING
f
INB
MAX1195 toc01
181612 144 6 8 102
TWO-TONE IMD PLOT (DIFFERENTIAL INPUT,
0
-10
-20
-30
-40
-50
AMPLITUDE (dB)
-60
-70
-80
-90 020
TWO-TONE IMD PLOT (DIFFERENTIAL INPUT,
8192-POINT DATA RECORD)
0
-10
-20
-30
-40
-50
AMPLITUDE (dB)
-60
-70
-80
-90
05.0 ANALOG INPUT FREQUENCY (MHz)
f
IN1
f
= 40.001536MHz
CLK
= 1.997147MHz
f
IN1
= 2.045977MHz
f
IN2
AIN = -7dB FS COHERENT SAMPLING
f
IN2
4.54.03.0 3.51.0 1.5 2.0 2.50.5
MAX1195 toc04
SIGNAL-TO-NOISE + DISTORTION
vs. ANALOG INPUT FREQUENCY
50
0
f
= 40.001536MHz
CLK
-10
= 10.024799MHz
f
IN1
= 9.956437MHz
f
IN2
-20 AIN = -7dB FS
COHERENT SAMPLING
-30
-40
-50
AMPLITUDE (dB)
-60
-70
-80
-90
515
TOTAL HARMONIC DISTORTION vs. ANALOG INPUT FREQUENCY
-40
8192-POINT DATA RECORD)
f
= 40.056789MHz
CLK
= 7.4861992MHz
f
INA
= 19.9159303MHz
f
INB
f
INA
ANALOG INPUT FREQUENCY (MHz)
8192-POINT DATA RECORD)
ANALOG INPUT FREQUENCY (MHz)
AIN = -1dB FS COHERENT SAMPLING
HD2
f
IN1
HD3
f
IN2
FFT PLOT CHA (DIFFERENTIAL INPUT,
8192-POINT DATA RECORD)
0
-10
MAX1195 toc02
-20 f
-30
-40
-50
AMPLITUDE (dB)
f
INB
181612 144 6 8 102
-60
-70
-80
-90
INA
020
ANALOG INPUT FREQUENCY (MHz)
f
= 40.056789MHz
CLK
= 115.0665837MHz
f
INA
= 99.9512724MHz
f
INB
AIN = -1dB FS COHERENT SAMPLING
HD3
HD2
f
181612 144 6 8 102
INB
SIGNAL-TO-NOISE RATIO
vs. ANALOG INPUT FREQUENCY
50
MAX1195 toc05
49
48
SNR (dB)
47
46
45
141311 127 8 9 106
0 200
ANALOG INPUT FREQUENCY (MHz)
CHA
CHB
1601208040
SPURIOUS-FREE DYNAMIC RANGE
vs. ANALOG INPUT FREQUENCY
90
MAX1195 toc03
MAX1195 toc06
49
48
SINAD (dB)
47
46
45
0 200
ANALOG INPUT FREQUENCY (MHz)
CHB
CHA
MAX1195 toc07
-50
CHB
-60
THD (dBc)
-70
-80
-90
1601208040
0 200
ANALOG INPUT FREQUENCY (MHz)
CHA
1601208040
MAX1195 toc08
80
70
SFDR (dBc)
60
50
40
CHB
CHA
0 200
ANALOG INPUT FREQUENCY (MHz)
1601208040
MAX1195 toc09
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