General Description
The MAX1181 is a +3V, dual 10-bit, analog-to-digital
converter (ADC) featuring fully-differential wideband
track-and-hold (T/H) inputs, driving two pipelined, ninestage ADCs. The MAX1181 is optimized for low-power,
high-dynamic performance applications in imaging,
instrumentation, and digital communication applications. The MAX1181 operates from a single +2.7V to
+3.6V supply, consuming only 246mW, while delivering
a typical signal-to-noise ratio (SNR) of 59dB at an input
frequency of 20MHz and a sampling rate of 80Msps.
The T/H driven input stages incorporate 400MHz (-3dB)
input amplifiers. The converters may also be operated
with single-ended inputs. In addition to low operating
power, the MAX1181 features a 2.8mA sleep mode, as
well as a 1µA power-down mode to conserve power
during idle periods.
An internal +2.048V precision bandgap reference sets
the full-scale range of the ADC. A flexible reference
structure allows the use of the internal or external
reference, if desired for applications requiring
increased accuracy or a different input voltage range.
The MAX1181 features parallel, CMOS-compatible
three-state outputs. The digital output format is set to
two’s complement or straight offset binary through a
single control pin. The device provides for a separate
output power supply of +1.7V to +3.6V for flexible interfacing. The MAX1181 is available in a 7mm ✕ 7mm, 48pin TQFP package, and is specified for the extended
industrial (-40°C to +85°C) temperature range.
Pin-compatible higher and lower speed versions of the
MAX1181 are also available. Please refer to the
MAX1180 datasheet for 105Msps, the MAX1182
datasheet for 65Msps, the MAX1183 datasheet for
40Msps, and the MAX1184 datasheet for 20Msps. In
addition to these speed grades, this family includes a
20Msps multiplexed output version (MAX1185), for
which digital data is presented time-interleaved on a
single, parallel 10-bit output port.
Applications
High Resolution Imaging
I/Q Channel Digitization
Multichannel IF Undersampling
Instrumentation
Video Application
Features
♦ Single +3V Operation
♦ Excellent Dynamic Performance:
59dB SNR at fIN= 20MHz
73dB SFDR at fIN= 20MHz
♦ Low Power:
82mA (Normal Operation)
2.8mA (Sleep Mode)
1µA (Shutdown Mode)
♦ 0.02dB Gain and 0.25° Phase Matching (typ)
♦ Wide ±1Vp-p Differential Analog Input Voltage
Range
♦ 400MHz, -3dB Input Bandwidth
♦ On-Chip +2.048V Precision Bandgap Reference
♦ User-Selectable Output Format—Two’s
Complement or Offset Binary
♦ 48-Pin TQFP Package with Exposed Pad for
Improved Thermal Dissipation
♦ Evaluation Kit Available
MAX1181
Dual 10-Bit, 80Msps, +3V, Low-Power ADC with
Internal Reference and Parallel Outputs
________________________________________________________________ Maxim Integrated Products 1
Pin Configuration
Ordering Information
19-2093; Rev 0; 7/01
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
Functional Diagram appears at end of data sheet.
PART TEMP. RANGE PIN-PACKAGE
MAX1181ECM -40° C to +85° C 48 TQFP-EP
REFN
REFP
REFIN
REFOUT
D9A
D8A
D7A
D6A
D5A
D4A
D3A
D2A
COM
V
GND
INA+
INA-
V
GND
INBINB+
GND
V
CLK
4847464544434241403938
1
2
DD
3
4
5
6
DD
7
8
9
10
11
DD
12
1314151617181920212223
DD
V
GND
MAX1181
DD
T/B
V
GND
48 TQFP-EP
SLEEP
OE
PD
D9B
D8B
D7B
37
24
D6B
36
D1A
D0A
35
OGND
34
OV
33
DD
OV
32
DD
OGND
31
D0B
30
D1B
29
D2B
28
D3B
27
D4B
26
D5B
25
ELECTRICAL CHARACTERISTICS
(VDD= +3V, OVDD= +2.5V; 0.1µF and 1.0µF capacitors from REFP, REFN, and COM to GND; REFOUT connected to REFIN through
a 10kΩ resistor, V
IN
= 2V
p-p
(differential w.r.t. COM), CL= 10pF at digital outputs (Note 5), f
CLK
= 83.333MHz (50% duty cycle), TA=
T
MIN
to T
MAX
, unless otherwise noted. Typical values are at TA= +25° C.)
MAX1181
Dual 10-Bit, 80Msps, +3V, Low-Power ADC with
Internal Reference and Parallel Outputs
2 _______________________________________________________________________________________
ABSOLUTE MAXIMUM RATINGS
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
VDD, OVDDto GND ...............................................-0.3V to +3.6V
OGND to GND.......................................................-0.3V to +0.3V
INA+, INA-, INB+, INB- to GND ...............................-0.3V to V
DD
REFIN, REFOUT, REFP, REFN, CLK,
COM to GND ............................................-0.3V to (V
DD
+ 0.3V)
OE , PD, SLEEP, T/B, D9A–D0A,
D9B–D0B to OGND ................................-0.3V to (OV
DD
+ 0.3V)
Continuous Power Dissipation (T
A
= +70° C)
48-Pin TQFP (derate 12.5mW/° C above +70° C).........1000mW
Operating Temperature Range ...........................-40°C to +85°C
Junction Temperature......................................................+150°C
Storage Temperature Range .............................-60°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
DC ACCURACY
Resolution 10 Bits
Integral Nonlinearity INL fIN = 7.47MHz ±0.6 ±2.2 LSB
Differential Nonlinearity DNL fIN = 7.47MHz, no missing codes guaranteed ±0.4 ± 1.0 LSB
Offset Error < ± 1 ± 1.7 % FS
Gain Error 0 ± 2 % FS
ANALOG INPUT
Differential Input Voltage Range V
Common-Mode Input Voltage
Range
Input Resistance R
Input Capacitance C
CONVERSION RATE
Maximum Clock Frequency f
Data Latency 5
DYNAMIC CHARACTERISTICS (f
Signal-to-Noise Ratio SNR
Signal-to-Noise And Distortion
th
(up to 5
Spurious-Free Dynamic
Range
Third-Harmonic Distortion HD3
harmonic)
DIFF
V
CLK
= 83.333MHz, 4096-point FFT)
CLK
SINAD
SFDR
Differential or single-ended inputs ±1.0 V
CM
Switched capacitor load 25 kΩ
IN
IN
f
= 7.47MHz, TA = +25° C 56.5 59.5
INA or B
f
= 20MHz, TA = +25° C5 6 5 9
INA or B
= 39.9MHz (Note 1) 59
f
INA or B
f
= 7.47MHz, TA = +25° C5 6 5 9
INA or B
f
= 20MHz, TA = +25° C 55.3 58.5
INA or B
f
= 39.9MHz (Note 1) 58.5
INA or B
f
= 7.47MHz, TA = +25° C6 5 7 5
INA or B
f
= 20MHz, TA = +25° C6 4 7 3
INA or B
fINA or B
f
f
f
= 39.9MHz, (Note 1) 71
= 7.47MHz -76
INA or B
= 20MHz -76
INA or B
= 39.9MHz (Note 1) -75
INA or B
VDD/2
± 0.5
5p F
80 MHz
V
Clock
Cycles
dB
dB
dBc
dBc
MAX1181
Dual 10-Bit, 80Msps, +3V, Low-Power ADC with
Internal Reference and Parallel Outputs
_______________________________________________________________________________________ 3
ELECTRICAL CHARACTERISTICS (continued)
(VDD= +3V, OVDD= +2.5V; 0.1µF and 1.0µF capacitors from REFP, REFN, and COM to GND; REFOUT connected to REFIN through
a 10kΩ resistor, V
IN
= 2V
p-p
(differential w.r.t. COM), CL= 10pF at digital outputs (Note 5), f
CLK
= 83.333MHz (50% duty cycle), TA=
T
MIN
to T
MAX
, unless otherwise noted. Typical values are at TA= +25° C.)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
Intermodulation Distortion
(first five odd-order IMDs)
Total Harmonic Distortion
(first five harmonics)
Small-Signal Bandwidth Input at -20dB FS, differential inputs 500 MHz
Full-Power Bandwidth FPBW Input at -0.5dB FS, differential inputs 400 MHz
Aperture Delay t
Aperture Jitter t
Overdrive Recovery Time For 1.5 x full-scale input 2 ns
Differential Gain ± 1%
Differential Phase ± 0.25 degrees
Output Noise INA+ = INA- = INB+ = INB- = COM 0.2 LSB
INTERNAL REFERENCE
Reference Output Voltage REFOUT
Reference Temperature
Coefficient
Load Regulation 1.25 mV/mA
BUFFERED EXTERNAL REFERENCE (V
REFIN Input Voltage V
Positive Reference Output
Voltage
Negative Reference Output
Voltage
Differential Reference Output
Voltage Range
REFIN Resistance R
Maximum REFP, COM Source
Current
Maximum REFP, COM Sink
Current
Maximum REFN Source Current I
Maximum REFN Sink Current I
UNBUFFERED EXTERNAL REFERENCE (V
REFP, REFN Input Resistance
= 38.1546MHz at -6.5dB FS
f
INA or B
= 41.9532MHz at -6.5dB FS
IMD
f
INA or B
(Note 2)
f
= 7.47MHz, TA = +25°C
INA or B
f
THD
AD
AJ
TC
REF
REFIN
V
REFP
V
REFN
∆ V
REF
REFIN
I
SOURCE
I
SINK
SOURCE
SINK
R
REFP
R
REFN
REFIN
=+2.048V)
REFIN
= 20MHz, TA = +25°C -70 -63
INA or B
= 39.9MHz (Note 1) -70
f
INA or B
∆ V
REF
= V
REFP
- V
REFN
= AGND, reference voltage applied to REFP, REFN and COM )
Measured between REFP and COM and
REFN and COM
-73.5 dBc
-73 -64
1n s
2p s
2.048
± 3%
60 ppm/°C
2.048 V
2.012 V
0.988 V
0.98 1.024 1.07 V
>50 MΩ
>5 mA
250 µA
250 µA
>5 mA
4kΩ
dBc
RMS
RMS
V
MAX1181
Dual 10-Bit, 80Msps, +3V, Low-Power ADC with
Internal Reference and Parallel Outputs
4 _______________________________________________________________________________________
ELECTRICAL CHARACTERISTICS (continued)
(VDD= +3V, OVDD= +2.5V; 0.1µF and 1.0µF capacitors from REFP, REFN, and COM to GND; REFOUT connected to REFIN through
a 10kΩ resistor, V
IN
= 2V
p-p
(differential w.r.t. COM), CL= 10pF at digital outputs (Note 5), f
CLK
= 83.333MHz (50% duty cycle), TA=
T
MIN
to T
MAX
, unless otherwise noted. Typical values are at TA= +25° C.)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
Differential Reference Input
Voltage
COM Input Voltage V
REFP Input Voltage V
REFN Input Voltage V
DIGITAL INPUTS (CLK, PD, OE , SLEEP, T/B)
Input High Threshold V
Input Low Threshold V
Input Hysteresis V
Input Leakage
Input Capacitance C
DIGITAL OUTPUTS (D9A–D0A, D9B–D0B)
Output Voltage Low V
Output Voltage High V
Three-State Leakage Current I
Three-State Output Capacitance C
POWER REQUIREMENTS
Analog Supply Voltage Range V
Output Supply Voltage Range OV
Analog Supply Current I
Output Supply Current I
∆ V
REFN
REF
COM
REFP
REF
= V
REFP
- V
REFN
∆ V
CLK
IH
PD, OE , SLEEP, T/B
CLK
IL
PD, OE , SLEEP, T/B
HYST
I
I
LEAK
OUT
VDD
V
IH
IL
IN
OL
OH
= OV
IH
VIL = 0 ±5
I
SINK
I
SOURCE
OE = OV
OE = OV
DD
DD
Operating, f
or V
DD
(CLK) ±5
DD
= 200µA 0.2 V
= 200µA
DD
DD
= 20MHz at -0.5dB FS 82 97
INA or B
Sleep mode 2.8
Shutdown, clock idle, PD = OE = OV
Operating, CL = 15pF , f
-0.5dB FS
OVDD
Sleep mode 100 µA
Shutdown, clock idle, PD = OE = OV
INA or B
DD
= 20MHz at
DD
1.024
± 10%
VDD/2
± 10%
V
COM
+ ∆ V
V
- ∆ V
REF
COM
REF
/2
/2
0.8 x
V
DD
0.8 x
OV
DD
0.2 x
V
DD
0.2 x
OV
DD
0.1 V
5p F
OV
DD
- 0.2
± 10 µA
5p F
2.7 3.0 3.6 V
1.7 2.5 3.6 V
11 5µ A
13 mA
21 0µ A
V
V
V
V
V
V
µA
V
mA
MAX1181
Dual 10-Bit, 80Msps, +3V, Low-Power ADC with
Internal Reference and Parallel Outputs
_______________________________________________________________________________________ 5
Typical Operating Characteristics
(VDD= +3V, OVDD= +2.5V, internal reference, differential input at -0.5dB FS, f
CLK
= 80.0005678MHz, CL≈ 10pF. TA= +25° C,
unless otherwise noted.)
ELECTRICAL CHARACTERISTICS (continued)
(VDD= +3V, OVDD= +2.5V; 0.1µF and 1.0µF capacitors from REFP, REFN, and COM to GND; REFOUT connected to REFIN through
a 10kΩ resistor, V
IN
= 2V
p-p
(differential w.r.t. COM), CL= 10pF at digital outputs (Note 5), f
CLK
= 83.333MHz (50% duty cycle), TA=
T
MIN
to T
MAX
, unless otherwise noted. Typical values are at TA= +25° C.)
Note 1: SNR, SINAD, THD, SFDR, and HD3 are based on an analog input voltage of -0.5dB FS, referenced to a +1.024V full-scale
input voltage range.
Note 2: Intermodulation distortion is the total power of the intermodulation products relative to the individual carrier. This number is
6dB or better, if referenced to the two-tone envelope.
Note 3: Digital outputs settle to V
IH
, VIL. Parameter guaranteed by design.
Note 4: With REFIN driven externally, REFP, COM, and REFN are left floating while powered down.
Note 5: Equivalent dynamic performance is obtainable over full OV
DD
range with reduced CL.
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
Power Supply Rejection PSRR
TIMING CHARACTERISTICS
CLK Rise to Output Data Valid t
Output Enable Time t
Output Disable Time t
CLK Pulse Width High t
CLK Pulse Width Low t
Wake-Up Time t
CHANNEL-TO-CHANNEL MATCHING
Crosstalk f
Gain Matching f
Phase Matching f
Operating, f
= 20MHz at -0.5dB FS 246 291 mW
INA or B
Sleep mode 8.4 Power Dissipation PDISS
Shutdown, clock idle, PD = OE = OV
Offset ± 0.2 mV/V
Gain ± 0.1 %/V
DO
ENABLE
DISABLE
CH
WAKE
Figure 3 (Note 3) 5 8 ns
Figure 4 10 ns
Figure 4 1.5 ns
Figure 3 clock period: 12ns 6 ± 1n s
Figure 3 clock period: 12ns 6 ± 1n s
CL
Wakeup from sleep mode (Note 4) 0.28
Wakeup from shutdown (Note 4) 1.5
= 20MHz at -0.5dB FS -70 dB
INA or B
= 20MHz at -0.5dB FS 0.02 ±0.2 dB
INA or B
= 20MHz at -0.5dB FS 0.25 degrees
INA or B
DD
34 5
µW
µs
FFT PLOT CHA (8192-POINT RECORD,
DIFFERENTIAL INPUT)
0
CHA
-10
-20
-30
-40
-50
-60
AMPLITUDE (dB)
-70
-80
-90
-100
01 0 1 5 5 2025303540
ANALOG INPUT FREQUENCY (MHz)
f
= 6.0449MHz
INA
= 7.5099MHz
f
INB
= 80.000568MHz
f
CLK
AINA = -0.46dB FS
MAX1181 toc01
FFT PLOT CHB (8192-POINT RECORD,
DIFFERENTIAL INPUT)
0
f
CHB
-10
-20
-30
-40
-50
-60
AMPLITUDE (dB)
-70
-80
-90
-100
01 0 1 5 5 2025303540
ANALOG INPUT FREQUENCY (MHz)
= 6.0449MHz
INA
= 7.5099MHz
f
INB
= 80.000568MHz
f
CLK
AINB = -0.52dB FS
FFT PLOT CHA (8192-POINT RECORD,
DIFFERENTIAL INPUT)
MAX1181 toc02
0
CHA
-10
-20
-30
-40
-50
-60
AMPLITUDE (dB)
-70
-80
-90
-100
01 0 1 5 5 2025303540
ANALOG INPUT FREQUENCY (MHz)
f
INA
f
INB
f
CLK
AINA = -0.52 dB FS
= 19.9123MHz
= 24.9123MHz
= 80.000568MHz
MAX1181 toc03
MAX1181
Dual 10-Bit, 80Msps, +3V, Low-Power ADC with
Internal Reference and Parallel Outputs
6 _______________________________________________________________________________________
Typical Operating Characteristics (continued)
(VDD= +3V, OVDD= +2.5V, internal reference, differential input at -0.5dB FS, f
CLK
= 80.0005678MHz, CL≈ 10pF. TA= +25° C,
unless otherwise noted.)
FFT PLOT CHB (8192-POINT RECORD,
DIFFERENTIAL INPUT)
0
f
= 19.9123MHz
INA
-10
-20
-30
-40
-50
-60
AMPLITUDE (dB)
-70
-80
-90
-100
= 24.9123MHz
f
INB
= 80.000568MHz
f
CLK
AINB = -0.53 dB FS
01 0 1 5 5 2025303540
ANALOG INPUT FREQUENCY (MHz)
CHB
MAX1181 toc04
FFT PLOT CHA (8192-POINT RECORD,
DIFFERENTIAL INPUT)
0
f
= 40.4202MHz
INA
-10
-20
-30
-40
-50
-60
AMPLITUDE (dB)
-70
-80
-90
-100
= 47.0413MHz
f
INB
= 80.000568MHz
f
CLK
AINA = -0.52dB FS
01 0 1 5 5 2025303540
ANALOG INPUT FREQUENCY (MHz)
FFT PLOT CHB (8192-POINT RECORD,
DIFFERENTIAL INPUT)
0
f
= 40.4202MHz
CHA
MAX1181 toc05
INA
-10
-20
-30
-40
-50
-60
AMPLITUDE (dB)
-70
-80
-90
-100
= 47.0413MHz
f
INB
= 80.000568MHz
f
CLK
AINB = -0.53dB FS
01 0 1 5 5 2025303540
ANALOG INPUT FREQUENCY (MHz)
CHB
MAX1181 toc06
TWO-TONE IMD PLOT (8192-POINT RECORD,
COHERENT SAMPLING)
0
f
= 38.1545676MHz
IN1
-10
= 41.9631884MHz
f
IN2
-20
-30
-40
-50
-60
AMPLITUDE (dB)
-70
-80
-90
-100
= 80.0005678MHz
f
CLK
AIN = 6.5dB FS
TWO-TONE ENVELOPE =
-0.52dB FS
2nd ORDER IMD
01 0 1 5 5 2025303540
ANALOG INPUT FREQUENCY (MHz)
f
IN1
f
TOTAL HARMONIC DISTORTION vs.
ANALOG INPUT FREQUENCY
-65
-68
-71
THD (dB)
-74
-77
CHB
CHA
SIGNAL-TO-NOISE RATIO vs.
ANALOG INPUT FREQUENCY
61
60
MAX1181 toc07
IN2
59
58
SNR (dB)
57
56
55
CHB
10
ANALOG INPUT FREQUENCY (MHz)
CHA
MAX1181 toc08
SINAD (dB)
100
SIGNAL-TO-NOISE + DISTORTION
vs. ANALOG INPUT FREQUENCY
61
60
59
58
57
10
ANALOG INPUT FREQUENCY (MHz)
CHB
MAX1181 toc09
CHA
100
FULL-POWER INPUT BANDWIDTH vs.
MAX1181 toc10
SPURIOUS-FREE DYNAMIC RANGE vs.
ANALOG INPUT FREQUENCY
87
83
79
75
SFDR (dB)
71
67
CHA
CHB
MAX1181 toc11
-2
GAIN (dB)
-4
-6
ANALOG INPUT FREQUENCY
(SINGLE-ENDED)
6
4
2
0
MAX1181 toc12
-80
10
ANALOG INPUT FREQUENCY (MHz)
100
63
10
ANALOG INPUT FREQUENCY (MHz)
100
-8
1 10 100 1000
ANALOG INPUT FREQUENCY (MHz)