Rainbow Electronics MAX117 User Manual

19-1081; Rev 1; 8/96
+3V, 400ksps, 4/8-Channel,
8-Bit ADCs with 1µA Power-Down
_______________General Description
The MAX113/MAX117 are microprocessor-compatible, 8-bit, 4-channel and 8-channel analog-to-digital con­verters (ADCs). They operate from a single +3V supply and use a half-flash technique to achieve a 1.8µs con­version time (400ksps). A power-down pin (PWRDN) reduces current consumption to 1µA typical. The devices return from power-down mode to normal oper­ating mode in less than 900ns, allowing large supply­current reductions in burst-mode applications. (In burst mode, the ADC wakes up from a low-power state at specified intervals to sample the analog input signals.) Both converters include a track/hold, enabling the ADC to digitize fast analog signals.
____________________________Features
+3.0V to +3.6V Single-Supply Operation 4 (MAX113) or 8 (MAX117) Analog Input ChannelsLow Power: 1.5mA (operating mode)
1µA (power-down mode)
Total Unadjusted Error 1LSBFast Conversion Time: 1.8µs per ChannelNo External Clock RequiredInternal Track/HoldRatiometric Reference InputsInternally Connected 8th Channel Monitors
Reference Voltage (MAX117)
Microprocessor (µP) interfaces are simplified because the ADC can appear as a memory location or I/O port without external interface logic. The data outputs use latched, three-state buffer circuitry for direct connection to an 8-bit parallel µP data bus or system input port. The MAX113/MAX117 input/reference configuration enables ratiometric operation.
The 4-channel MAX113 is available in a 24-pin DIP or SSOP. The 8-channel MAX117 is available in a 28-pin DIP or SSOP. For +5V applications, refer to the MAX114/MAX118 data sheet.
________________________Applications
Battery-Powered Systems Portable Equipment System-Health Monitoring Remote Data Acquisition Communications Systems
______________Ordering Information
PART
MAX113CNG
MAX113CAG MAX113C/D 0°C to +70°C MAX113ENG MAX113EAG MAX113MRG -55°C to +125°C
Ordering Information continued at end of data sheet.
*Dice are specified at T **Contact factory for availability.
Pin Configuration appears at end of data sheet.
TEMP. RANGE
0°C to +70°C 0°C to +70°C
-40°C to +85°C 24 Narrow Plastic DIP
-40°C to +85°C
= +25°C, DC parameters only.
A
PIN-PACKAGE
24 Narrow Plastic DIP 24 SSOP Dice*
24 SSOP 24 Narrow CERDIP**
_________________________________________________________Functional Diagram
MAX113/MAX117
REF+
D7 D6 D5 D4
D3 D2 D1 D0
Maxim Integrated Products
1
MODE
4-BIT
FLASH
ADC
(4MSBs)
4-BIT
DAC
4-BIT
FLASH
ADC
(4LSBs)
TIMING AND
CONTROL
RD
INT
CS
WR/RDY
*IN8
*IN7 *IN6
*IN5
IN4 IN3 IN2
IN1
*MAX117 ONLY
________________________________________________________________
MUX
ADDRESS
LATCH 
DECODE
A0
Σ
A1 A2 REF-
REF+
16
PWRDN
THREE-
STATE OUTPUT DRIVERS
MAX113/MAX117
For free samples & the latest literature: http://www.maxim-ic.com, or phone 1-800-998-8800
+3V, 400ksps, 4/8-Channel, 8-Bit ADCs with 1µA Power-Down
ABSOLUTE MAXIMUM RATINGS
VDDto GND..............................................................-0.3V to +7V
Digital Input Voltage to GND......................-0.3V to (V
Digital Output Voltage to GND...................-0.3V to (V
REF+ to GND..............................................-0.3V to (V
REF- to GND...............................................-0.3V to (V
IN_ to GND.................................................-0.3V to (V
Continuous Power Dissipation (T
24 Narrow Plastic DIP
(derate 13.33mW/°C above +70°C)................................1.08W
24 SSOP (derate 8.00mW/°C above +70°C).................640mW
24 Narrow CERDIP (derate 12.50mW/°C above +70°C) .....1W
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
= +70°C)
A
DD DD DD DD DD
+ 0.3V) + 0.3V) + 0.3V) + 0.3V) + 0.3V)
28 Wide Plastic DIP
(derate 14.29mW/°C above +70°C)................................1.14W
28 SSOP (derate 9.52mW/°C above +70°C).................762mW
28 Wide CERDIP (derate 16.67mW/°C above +70°C)....1.33W
Operating Temperature Ranges
MAX113C_G/MAX117C_I ....................................0°C to +70°C
MAX113E_G/MAX117E_I..................................-40°C to +85°C
MAX113MRG/MAX117MJI..............................-55°C to +125°C
Storage Temperature Range.............................-65°C to +150°C
Lead Temperature (soldering, 10sec).............................+300°C
MAX113/MAX117
ELECTRICAL CHARACTERISTICS
(VDD= +3V to +3.6V, REF+ = 3V, REF- = GND, Read Mode (MODE = GND), TA= T
CONDITIONS
ACCURACY (Note 1)
No-missing-codes guaranteed
DYNAMIC PERFORMANCE
Signal-to-Noise Plus Distortion Ratio
Spurious-Free Dynamic Range
ANALOG INPUT
REFERENCE INPUT
Reference Resistance REF+ Input Voltage Range REF- Input Voltage Range
SINAD
THDTotal Harmonic Distortion
SFDR
VIN_Input Voltage Range
REF
MAX11_C/E, f MAX11_M, f MAX11_C/E, f MAX11_M, f MAX11_C/E, f MAX11_M, f V
= 3Vp-p
IN_
GND < V
IN_
SAMPLE
SAMPLE
SAMPLE
< V
= 400kHz, fIN= 30.273kHz
SAMPLE
= 340kHz, fIN= 30.725kHz
= 400kHz, fIN= 30.273kHz
SAMPLE
= 340kHz, fIN= 30.725kHz
= 400kHz, fIN= 30.273kHz
SAMPLE
= 340kHz, fIN= 30.725kHz
DD
MIN
to T
, unless otherwise noted.)
MAX
45 45
50 50
REF-
REF-
V
V
UNITSMIN TYP MAXSYMBOLPARAMETER
LSB±1TUETotal Unadjusted Error LSB±1DNLDifferential Nonlinearity LSB±1Zero-Code Error LSB±1Full-Scale Error LSB±1/4Channel-to-Channel Mismatch
-50
-50
MHz0.3Input Full-Power Bandwidth V/µs0.28 0.5Input Slew Rate, Tracking
REF+
DD
REF+
Bits8NResolution
dB
dB
dB
VV µA±3IIN_Input Leakage Current pF32CIN_Input Capacitance
k124R
VV
VGND V
2 _______________________________________________________________________________________
+3V, 400ksps, 4/8-Channel,
8-Bit ADCs with 1µA Power-Down
ELECTRICAL CHARACTERISTICS (continued)
(VDD= +3V to +3.6V, REF+ = 3V, REF- = GND, Read Mode (MODE = GND), TA= T
CONDITIONS
LOGIC INPUTS
Input High Voltage
Input Low Voltage
Input High Current
Input Low Current Input Capacitance (Note 2)
LOGIC OUTPUTS
Output Low Voltage
Output High Voltage
Three-State Capacitance (Note 2)
POWER REQUIREMENTS
Supply Voltage
VDDSupply Current
V
V
V
INH
INL
I
INH
INL
OL
OH
LKG
OUT
DD
I
DD
IN
CS, WR, RD, PWRDN, A0, A1, A2 MODE CS, WR, RD, PWRDN, A0, A1, A2 MODE
CS, RD, PWRDN, A0, A1, A2 WR
MODE
CS, WR, RD, PWRDN, MODE, A0, A1, A2 CS, WR, RD, PWRDN, MODE, A0, A1, A2
I
= 20µA, INT, D0–D7
SINK
I
= 400µA, INT, D0–D7
SINK
RDY, I I
SOURCE
I
SOURCE
D0–D7, RDY, digital outputs = 0V to V D0–D7, RDY
VDD= 3.6V, CS = RD = 0V, PWRDN = V
VDD= 3.0V, CS = RD = 0V,
PWRDN = V CS = RD = VDD, PWRDN = 0V (Note 3)
VDD= 3.0V to 3.6V, V
= 1mA 0.4
SINK
= 20µA, INT, D0–D7 = 400µA, INT, D0–D7
MAX11_C
DD
DD
REF
MAX11_E/M MAX11_C MAX11_E/M
= 3.0V
MIN
DD
to T
, unless otherwise noted.)
MAX
2
2.4
VDD- 0.1 VDD- 0.4
0.66
0.8 ±1 ±3
15 100
0.1
±3Three-State Current
58
2.5 5
2.5 6
1.5 3
1.5 3.5
MAX113/MAX117
UNITSMIN TYP MAXSYMBOLPARAMETER
V
V
µA
µA±1I pF58C
V0.4V
V µAI pFC
V3.0 3.6V
mA
µA110Power-Down VDDCurrent
LSB±1/16 ±1/4PSRPower-Supply Rejection
Note 1: Accuracy measurements performed at V Note 2: Guaranteed by design. Note 3: Power-down current increases if logic inputs are not driven to GND or V
_______________________________________________________________________________________ 3
= +3.0V. Operation over supply range is guaranteed by power-supply rejection test.
DD
DD
.
+3V, 400ksps, 4/8-Channel, 8-Bit ADCs with 1µA Power-Down
TIMING CHARACTERISTICS
(VDD= +3V, TA= +25°C, unless otherwise noted.) (Note 4)
TA= +25°C
PARAMETER SYMBOL
Conversion Time (WR-RD Mode)
Conversion Time (RD Mode)
Power-Up Time t CS to RD, WR
Setup Time CS to RD, WR
Hold Time
MAX113/MAX117
CS to RDY Delay Data Access Time
(RD Mode) RD to INT Delay
(RD Mode) Data Hold Time t Minimum
Acquisition Time WR Pulse Width Delay Between WR
and RD Pulses RD Pulse Width
(WR-RD Mode) Data Access Time
(WR-RD Mode)
RD to INT Delay WR to INT Delay RD Pulse Width
(WR-RD Mode) Data Access Time
(WR-RD Mode) WR to INT Delay Data Access Time
After INT Multiplexer Address
Hold Time
t
CWR
t
CRD
UP
t
CSS
t
CSH
t
RDY
t
ACC0
t
INTH
DH
t
ACQ
t
WR
t
RD
t
READ1
t
ACC1
t
RI
t
INTL
t
READ2
t
ACC2
t
IHWR
t
ID
t
AH
tRD< t (Note 5)
CL= 50pF,
= 5.1kto V
R
L
CL= 100pF (Note 5)
CL= 50pF (Note 6)
tRD< t t
ACC1
tRD< t (Note 5)
CL= 50pF tRD> t
t
ACC2
tRD> t (Note 5)
Pipelined mode, CL= 50pF Pipelined mode, CL= 100pF
, CL= 100pF
INTL
DD
, determined by
INTL
, CL= 100pF
INTL
, determined by
INTL
, CL= 100pF
INTL
ALL GRADES
0 ns
0 ns
100 ns
t
CRD
100
100 160 ns
100 ns
450 ns(Note 7) 600
0.6 10 µs
0.8 µs
400 ns
400 ns 300 ns
0.7 1.45 µs
180 ns
180 ns 180 ns 100 ns
50 ns
TA= T
MIN MAX
1.8 µs
2.0 µs
0.9 µs 0
0
+
t
CRD
120
130 170 130
MIN
+
to T
MAX
MAX117M
MIN MAXMIN TYP MAX
0
0
t
CRD
2.42.06
2.62.4
1.41.2
140
150 180 150
UNITSCONDITIONS MAX117C/E
+
ns
700
0.8 100.66 10
500 340
1.6
220 200 130
1.0
600
600 400
1.8
250
250 240 150
70
0.9
500
220
60
Note 4: Input control signals are specified with t
delays get shorter at higher supply voltages. See the Conversion Time vs. Supply Voltage graph in the
Characteristics
to extrapolate timing delays at other power-supply voltages.
= tf= 5ns, 10% to 90% of 3V, and timed from a voltage level of 1.3V. Timing
r
Typical Operating
Note 5: See Figure 1 for load circuit. Parameter defined as the time required for the output to cross 0.66V or 2.0V. Note 6: See Figure 2 for load circuit. Parameter defined as the time required for the data lines to change 0.5V. Note 7: Also defined as the Minimum Address-Valid to Convert-Start Time.
4 _______________________________________________________________________________________
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