Rainbow Electronics MAX1122 User Manual
General Description
The MAX1122 is a monolithic 10-bit, 170Msps analogto-digital converter (ADC) optimized for outstanding
dynamic performance at high IF frequencies up to
500MHz. The product operates with conversion rates of
up to 170Msps while consuming only 460mW.
At 170Msps and an input frequency of 100MHz, the
MAX1122 achieves a spurious-free dynamic range
(SFDR) of 72dBc. Its excellent signal-to-noise ratio
(SNR) of 57.5dB at 10MHz remains flat (within 1dB) for
input tones up to 500MHz. This makes the MAX1122
ideal for wideband applications such as digital predistortion in cellular base-station transceiver systems.
The MAX1122 requires a single 1.8V supply. The analog input is designed for either differential or singleended operation and can be AC- or DC-coupled. The
ADC also features a selectable on-chip divide-by-2
clock circuit, which allows the user to apply clock frequencies as high as 340MHz. This helps to reduce the
phase noise of the input clock source. A differential
LVDS sampling clock is recommended for best performance. The converter’s digital outputs are LVDS compatible, and the data format can be selected to be
either two’s complement or offset binary.
The MAX1122 is available in a 68-pin QFN with
exposed paddle (EP) and is specified over the industrial (-40°C to +85°C) temperature range.
For pin-compatible, higher speed versions of the
MAX1122, refer to the MAX1123 (210Msps) and the
MAX1124 (250Msps) data sheets. For a higher speed,
pin-compatible 8-bit version of the MAX1122, refer to
the MAX1121 data sheet.
Applications
Wireless and Wired Broadband Communication
Cable-Head End Systems
Digital Predistortion Receivers
Communications Test Equipment
Radar and Satellite Subsystems Antenna Array
Processing
Features
♦ 170Msps Conversion Rate
♦ SNR = 57.1dB/56.5dB at fIN= 100MHz/500MHz
♦ SFDR = 72dBc/63.5dBc at f
IN
= 100MHz/500MHz
♦ NPR = 53.7dB at f
NOTCH
= 28.8MHz
♦ Single 1.8V Supply
♦ 460mW Power Dissipation at 170Msps
♦ On-Chip Track-and-Hold and Internal Reference
♦ On-Chip Selectable Divide-by-2 Clock Input
♦ LVDS Digital Outputs with Data Clock Output
♦ Evaluation Kit Available (Order MAX1124EVKIT)
MAX1122
1.8V, 10-Bit, 170Msps Analog-to-Digital Converter
with LVDS Outputs for Wideband Applications
________________________________________________________________ Maxim Integrated Products 1
5859606162 5455565763
38
39
40
41
42
43
44
45
46
47
AV
CC
AGND
AV
CC
TOP VIEW
AVCCOGND
OVCCORP
ORN
D9P
D9N
D8P
D8N
5253
D7P
D7N
AGND
AGND
AV
CC
CLKN
CLKP
AV
CC
AGND
OV
CC
OGND
N.C.
OV
CC
N.C.
N.C.
N.C.
D4P
D4N
OGND
OV
CC
DCLKP
DCLKN
OV
CC
D3P
D3N
D2P
35
36
37
D2N
D1P
D1N
AGND
INN
INP
AGND
AV
CC
AGND
AGND
AV
CC
AV
CC
AV
CC
AGND
REFADJ
REFIO
AGND
48 D5N
AV
CC
64
AGND
656667
AGND
AGND
AV
CC
68
T/B
2322212019 2726252418 2928 323130
D0N
D0P
3433
49
50
D6N
D5P
51 D6P
11
10
9
8
7
6
5
4
3
2
16
15
14
13
12
1
CLKDIV 17
MAX1122
EP
Pin Configuration
Ordering Information
19-3027; Rev 1; 2/04
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
PART TEMP RANGE PIN-PACKAGE
MAX1122EGK -40°C to +85°C 68 QFN-EP*
*EP = Exposed paddle.
MAX1122
1.8V, 10-Bit, 170Msps Analog-to-Digital Converter
with LVDS Outputs for Wideband Applications
2 _______________________________________________________________________________________
ABSOLUTE MAXIMUM RATINGS
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
AVCCto AGND ......................................................-0.3V to +2.1V
OV
CC
to OGND .....................................................-0.3V to +2.1V
AV
CC
to OVCC.......................................................-0.3V to +2.1V
AGND to OGND ....................................................-0.3V to +0.3V
Analog Inputs to AGND ...........................-0.3V to (AV
CC
+ 0.3V)
Digital Inputs to AGND.............................-0.3V to (AV
CC
+ 0.3V)
REF, REFADJ to AGND............................-0.3V to (AV
CC
+ 0.3V)
Digital Outputs to OGND.........................-0.3V to (OV
CC
+ 0.3V)
ESD on All Pins (Human Body Model).............................±2000V
Continuous Power Dissipation (TA= +70°C)
68-Pin QFN (derate 41.7mW/°C above +70°C) .........3333mW
Operating Temperature Range ...........................-40°C to +85°C
Junction Temperature......................................................+150°C
Storage Temperature Range .............................-60°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
Maximum Current into Any Pin............................................50mA
ELECTRICAL CHARACTERISTICS
(AVCC= OVCC= 1.8V, AGND = OGND = 0, f
SAMPLE
= 170MHz, differential sine-wave clock input drive, 0.1µF capacitor on REFIO,
internal reference, digital output pins differential R
L
= 100Ω ±1%, CL= 5pF, TA= T
MIN
to T
MAX
, unless otherwise noted. ≥25°C guar-
anteed by production test, <25°C guaranteed by design and characterization. Typical values are at T
A
= +25°C.)
PARAMETER
CONDITIONS
UNITS
DC ACCURACY
Resolution 10 Bits
Integral Nonlinearity INL (Note 1)
LSB
Differential Nonlinearity DNL No missing codes (Note 1)
LSB
TA ≥ +25°C -25
Transfer Curve Offset V
OS
(Note 1)
(Note 2) -37
LSB
Offset Temperature
Drift
µV/°C
ANALOG INPUTS (INP, INN)
Full-Scale Input Voltage Range V
FS
(Note 1)
mV
P-P
Full-Scale Range Temperature
Drift
ppm/°C
Common-Mode Input Range V
CM
1.38
±0.18
V
Input Capacitance C
IN
3pF
Differential Input Resistance R
IN
4.3
kΩ
Full-Power Analog Bandwidth FPBW Figure 8
MHz
REFERENCE (REFIO, REFADJ)
Reference Output Voltage V
REFIO
V
Reference Temperature Drift 90
ppm/°C
REFADJ Input High Voltage
Used to disable the internal reference
AV
CC
-
0.3
V
SAMPLING CHARACTERISTICS
Maximum Sampling Rate
MHz
Minimum Sampling Rate
20
MHz
SYMBOL
MIN TYP MAX
-1.5 ±0.4 +1.5
-1.0 ±0.3 +1.5
+25
+37
±20
V
REFADJ
f
SAMPLE
f
SAMPLE
1100 1250 1375
130
3.00
600
1.18 1.24 1.30
170
6.25
MAX1122
1.8V, 10-Bit, 170Msps Analog-to-Digital Converter
with LVDS Outputs for Wideband Applications
_______________________________________________________________________________________ 3
ELECTRICAL CHARACTERISTICS (continued)
(AVCC= OVCC= 1.8V, AGND = OGND = 0, f
SAMPLE
= 170MHz, differential sine-wave clock input drive, 0.1µF capacitor on REFIO,
internal reference, digital output pins differential R
L
= 100Ω ±1%, CL= 5pF, TA= T
MIN
to T
MAX
, unless otherwise noted. ≥25°C guar-
anteed by production test, <25°C guaranteed by design and characterization. Typical values are at T
A
= +25°C.)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Clock Duty Cycle Set by clock management circuit
%
Aperture Delay t
AD
ps
Aperture Jitter t
AJ
0.2
ps
RMS
CLOCK INPUTS (CLKP, CLKN)
(Note 2)
mV
P-P
Clock Input Common-Mode
Voltage Range
1.15
V
Clock Differential Input
Resistance
R
CLK
kΩ
Clock Differential Input
Capacitance
C
CLK
5pF
DYNAMIC CHARACTERISTICS (at -0.5dBFS)
fIN = 10MHz, TA ≥ +25°C
fIN = 100MHz, TA ≥ +25°C
fIN = 180MHz
Signal-to-Noise Ratio SNR
f
IN
= 500MHz
dB
fIN = 10MHz, TA ≥ +25°C56
fIN = 100MHz, TA ≥ +25°C5557
fIN = 180MHz
Signal-to-Noise
and Distortion
SINAD
f
IN
= 500MHz
dB
fIN = 10MHz, TA ≥ +25°C6577
fIN = 100MHz, TA ≥ +25°C6472
fIN = 180MHz 67
Spurious-Free
Dynamic Range
SFDR
f
IN
= 500MHz
dBc
fIN = 10MHz -77
fIN = 100MHz -72
fIN = 180MHz -67
Worst Harmonics
(HD2 or HD3)
f
IN
= 500MHz
dBc
IMD
100
f
IN1
= 99MHz at -7dBFS,
f
IN2
= 101MHz at -7dBFS
Two-Tone Intermodulation
Distortion
IMD
500
f
IN1
= 499MHz at -7dBFS,
f
IN2
= 503MHz at -7dBFS
dBc
LVDS DIGITAL OUTPUTS (D0P/N–D9P/N, DCLKP/N)
Differential Output Voltage |VOD|
mV
Differential Clock Input Amplitude
40 to 60
350
200 500
±0.25
11 ±
25%
56.5 57.5
55.5 57.1
57.1
250 400
56.5
57.4
56.7
55.3
63.5
-63.5
-79
-60
MAX1122
1.8V, 10-Bit, 170Msps Analog-to-Digital Converter
with LVDS Outputs for Wideband Applications
4 _______________________________________________________________________________________
ELECTRICAL CHARACTERISTICS (continued)
(AVCC= OVCC= 1.8V, AGND = OGND = 0, f
SAMPLE
= 170MHz, differential sine-wave clock input drive, 0.1µF capacitor on REFIO,
internal reference, digital output pins differential R
L
= 100Ω ±1%, CL= 5pF, TA= T
MIN
to T
MAX
, unless otherwise noted. ≥25°C guar-
anteed by production test, <25°C guaranteed by design and characterization. Typical values are at T
A
= +25°C.)
PARAMETER
CONDITIONS
UNITS
Output Offset Voltage OV
OS
V
LVCMOS DIGITAL INPUTS (CLKDIV, T/B)
Digital Input Voltage Low V
IL
0.2 x
V
Digital Input Voltage High V
IH
0.8 x
V
TIMING CHARACTERISTICS
CLK to Data Propagation Delay t
PDL
Figure 4 1.5 ns
t
CPDL
Figure 4
ns
t
CPDL
-
t
ADL
Figure 4 (Note 2)
ns
LVDS Output Rise-Time t
RISE
20% to 80%, CL = 5pF
ps
LVDS Output Fall-Time t
FALL
20% to 80%, CL = 5pF
ps
Output Data Pipeline Delay
8
Clock
cycles
POWER REQUIREMENTS
Analog Supply Voltage Range AV
CC
1.7 1.8 1.9 V
Digital Supply Voltage Range OV
CC
1.7 1.8 1.9 V
Analog Supply
I
AVCCfIN
= 100MHz
mA
Digital Supply Current I
OVCCfIN
= 100MHz 45 75 mA
Analog Power Dissipation P
DISSfIN
= 100MHz
mW
Offset 1.6
mV/V
Power-Supply Rejection Ratio
(Note 3)
PSRR
Gain 1.9
%FS/V
Note 1: Static linearity and offset parameters are computed from a best-fit straight line through the code transition points. The full-
scale range is defined as 1023 x slope of the line.
Note 2: Parameter guaranteed by design and characterization; T
A
= T
MIN
to T
MAX
.
Note 3: PSRR is measured with both analog and digital supplies connected to the same potential.
SYMBOL
MIN TYP MAX
1.125 1.310
CLK to DCLK Propagation Delay
Data Valid to DCLK Rising Edge
AV
CC
AV
CC
3.43
1.67 1.93 2.35
460
460
t
LATENCY
210 275
460 630
MAX1122
1.8V, 10-Bit, 170Msps Analog-to-Digital Converter
with LVDS Outputs for Wideband Applications
_______________________________________________________________________________________ 5
-100
-80
-90
-60
-70
-40
-50
-30
-10
-20
0
020304010 50 60 70 80 90
FFT PLOT (8192-POINT DATA RECORD,
COHERENT SAMPLING)
MAX1122 toc01
ANALOG INPUT FREQUENCY (MHz)
AMPLITUDE (dB)
f
SAMPLE
= 170.0057MHz
f
IN
= 11.5177MHz
A
IN
= -0.5065dBFS
SNR = 57.7dB
SFDR = 77.7dBc
HD2 = -77.7dBc
HD3 = -86.3dBc
HD2
HD3
-100
-80
-90
-60
-70
-40
-50
-30
-10
-20
0
020304010 50 60 70 80 90
FFT PLOT (8192-POINT DATA RECORD,
COHERENT SAMPLING)
MAX1122 toc02
ANALOG INPUT FREQUENCY (MHz)
AMPLITUDE (dB)
f
SAMPLE
= 170.0057MHz
f
IN
= 60.0374MHz
A
IN
= -0.4795dBFS
SNR = 57.5dB
SFDR = 77.7dBc
HD2 = -79.8dBc
HD3 = -77.7dBc
HD2
HD3
-100
-80
-90
-60
-70
-40
-50
-30
-10
-20
0
020304010 50 60 70 80 90
FFT PLOT (8192-POINT DATA RECORD,
COHERENT SAMPLING)
MAX1122 toc03
ANALOG INPUT FREQUENCY (MHz)
AMPLITUDE (dB)
f
SAMPLE
= 170.0057MHz
f
IN
= 183.5157MHz
A
IN
= -0.4706dBFS
SNR = 56.7dB
SFDR = 66.8dBc
HD2 = -79.3dBc
HD3 = -66.8dBc
HD2
HD3
-100
-80
-90
-60
-70
-40
-50
-30
-10
-20
0
020304010 50 60 70 80 90
FFT PLOT (8192-POINT DATA RECORD,
COHERENT SAMPLING)
MAX1122 toc04
ANALOG INPUT FREQUENCY (MHz)
AMPLITUDE (dB)
f
SAMPLE
= 170.0057MHz
f
IN
= 500.516MHz
A
IN
= -0.5155dBFS
SNR = 55.9dB
SFDR = 63.5dBc
HD2 = -68.6dBc
HD3 = -63.5dBc
HD3
HD2
SNR vs. ANALOG INPUT FREQUENCY
(f
SAMPLE
= 169.984MHz, AIN = -0.5dBFS)
MAX1122 toc05
f
IN
(MHz)
SNR (dB)
400300200100
54
55
57
56
58
59
53
0500
SFDR vs. ANALOG INPUT FREQUENCY
(f
SAMPLE
= 169.984MHz, AIN = -0.5dBFS)
MAX1122 toc06
f
IN
(MHz)
SFDR (dBc)
400300200100
45
50
65
55
60
35
40
70
75
80
30
0 500
HD2/HD3 vs. ANALOG INPUT FREQUENCY
(f
SAMPLE
= 169.984MHz, AIN = -0.5dBFS)
MAX1122 toc07
f
IN
(MHz)
HD2/HD3 (dBc)
400300200100
-90
-80
-70
-60
-50
-100
0500
HD2
HD3
27
37
32
52
47
42
57
62
-28 -16 -12-24 -20 -8 -4 0
SNR vs. ANALOG INPUT AMPLITUDE
(f
SAMPLE
= 170.0057MHz, fIN = 60.0374MHz)
MAX1122 toc08
ANALOG INPUT AMPLITUDE (dBFS)
SNR (dB)
50
60
55
70
65
75
80
-28 -16 -12-24 -20 -8 -4 0
SFDR vs. ANALOG INPUT AMPLITUDE
(f
SAMPLE
= 170.0057MHz, fIN = 60.0374MHz)
MAX1122 toc09
ANALOG INPUT AMPLITUDE (dBFS)
SFDR (dBc)
Typical Operating Characteristics
(AVCC= OVCC= 1.8V, AGND = OGND = 0, f
SAMPLE
= 170.0057MHz, -0.5dBFS; see TOCs for detailed information on test conditions, differential input drive, differential sine-wave clock input drive, 0.1µF capacitor on REFIO, internal reference, digital output pins
differential RL= 100Ω, TA= +25°C.)
MAX1122
1.8V, 10-Bit, 170Msps Analog-to-Digital Converter
with LVDS Outputs for Wideband Applications
6 _______________________________________________________________________________________
-90
-75
-80
-85
-60
-65
-70
-55
-50
-28 -16 -12-24 -20 -8 -4 0
HD2/HD3 vs. ANALOG INPUT AMPLITUDE
(f
SAMPLE
= 170.0057MHz, fIN = 60.0374MHz)
MAX1122 toc10
ANALOG INPUT AMPLITUDE (dBFS)
HD2/HD3 (dBc)
HD2
HD3
SNR vs. f
SAMPLE
(fIN = 60.0374MHz, AIN = -0.5dBFS)
MAX1122 toc11
f
SAMPLE
(MHz)
SNR (dB)
1401108050
52
51
54
53
56
55
58
57
60
59
50
20 170
SFDR vs. f
SAMPLE
(fIN = 60.0374MHz, AIN = -0.5dBFS)
MAX1122 toc12
f
SAMPLE
(MHz)
SFDR (dBc)
1401108050
50
60
70
80
90
40
20 170
HD2/HD3 vs. f
SAMPLE
(fIN = 60.0374MHz, AIN = -0.5dBFS)
MAX1122 toc13
f
SAMPLE
(MHz)
HD2/HD3 (dBc)
1401108050
-92
-84
-76
-68
-60
-100
20 170
HD2
HD3
-100
-80
-90
-60
-70
-40
-50
-30
-10
-20
0
020304010 50 60 70 80 90
TWO-TONE IMD PLOT (8192-POINT
DATA RECORD, COHERENT SAMPLING)
MAX1122 toc14
ANALOG INPUT FREQUENCY (MHz)
AMPLITUDE (dB)
f
SAMPLE
= 170.0057MHz
f
IN1
= 99.0109MHz
f
IN2
= 101.0031MHz
A
IN1
= A
IN2
= -7dBFS
IMD = -79dBc
2f
IN2
- f
IN1
2f
IN1
-
f
IN2
f
IN2
f
IN1
-0.5
-0.3
-0.4
-0.1
-0.2
0.1
0
0.2
0.4
0.3
0.5
256 3841280 512 640 768 896 1024
INTEGRAL NONLINEARITY
vs. DIGITAL OUTPUT CODE
MAX1122 toc15
DIGITAL OUTPUT CODE
INL (LSB)
-0.5
-0.3
-0.4
-0.1
-0.2
0.1
0
0.2
0.4
0.3
0.5
256 384128 512 640 768 896 1024
DIFFERENTIAL NONLINEARITY
vs. DIGITAL OUTPUT CODE
MAX1122 toc16
DIGITAL OUTPUT CODE
DNL (LSB)
2
0
-2
-4
-6
-8
-10
-12
10 100 1000
GAIN BANDWIDTH PLOT
(f
SAMPLE
= 170.0057MHz, AIN = -0.5dBFS)
MAX1122 toc17
ANALOG INPUT FREQUENCY (MHz)
GAIN (dB)
SNR vs. TEMPERATURE (fIN = 64.9994MHz,
f
SAMPLE
= 169.984MHz, AIN = -0.5dBFS)
MAX1122 toc18
TEMPERATURE (°C)
SNR (dB)
603510-15
52
51
54
53
56
55
58
57
60
59
50
-40 85
Typical Operating Characteristics (continued)
(AVCC= OVCC= 1.8V, AGND = OGND = 0, f
SAMPLE
= 170.0057MHz, -0.5dBFS; see TOCs for detailed information on test conditions, differential input drive, differential sine-wave clock input drive, 0.1µF capacitor on REFIO, internal reference, digital output pins
differential RL= 100Ω, TA= +25°C.)
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