Rainbow Electronics MAX105 User Manual

General Description

The MAX105 is a dual, 6-bit, analog-to-digital converter
(ADC) designed to allow fast and precise digitizing of
in-phase (I) and quadrature (Q) baseband signals. The
MAX105 converts the analog signals of both I and Q
components to digital outputs at 800Msps while achiev­ing a signal-to-noise ratio (SNR) of typically 37dB with
an input frequency of 200MHz, and an integral nonlin­earity (INL) and differential nonlinearity (DNL) of ±0.25
LSB. The MAX105 analog input preamplifiers feature a
400MHz, -0.5dB, and a 1.5GHz, -3dB analog input
bandwidth. Matching channel-to-channel performance
is typically 0.04dB gain, 0.1LSB offset, and 0.2 degrees
phase. Dynamic performance is 36.4dB signal-to-noise
plus distortion (SINAD) with a 200MHz analog input sig­nal and a sampling speed of 800MHz. A fully differen­tial comparator design and encoding circuits reduce
out-of-sequence errors, and ensure excellent
metastable performance of only one error per 10

16

clock

cycles.

In addition, the MAX105 provides LVDS digital outputs
with an internal 6:12 demultiplexer that reduces the out­put data rate to one-half the sample clock rate. Data is
output in two’s complement format. The MAX105 oper­ates from a +5V analog supply and the LVDS output
ports operate at +3.3V. The data converter’s typical
power dissipation is 2.6W. The device is packaged in
an 80-pin, TQFP package with exposed paddle, and is
specified for the extended (-40°C to +85°C) tempera­ture range. For a lower-speed, 400Msps version of the
MAX105, please refer to the MAX107 data sheet.

Applications

VSAT Receivers

WLANs

Test Instrumentation

Communications Systems

Features

♦ Two Matched 6-Bit, 800Msps ADCs

♦ Excellent Dynamic Performance

36.4dB SINAD at f

IN

≈ 200MHz and

f

CLK

≈ 800MHz

♦ Typical INL and DNL: ±0.25LSB

♦ Channel-to-Channel Phase Matching: ±0.2°

♦ Channel-to-Channel Gain Matching: ±0.04dB

♦ 6:12 Demultiplexer reduces the Data Rates to

400MHz

♦ Low Error Rate: 10

16

Metastable States at

800Msps

♦ LVDS Digital Outputs in Two’s Complement

Format

MAX105

Dual, 6-Bit, 800Msps ADC with On-Chip,

Wideband Input Amplifier

________________________________________________________________ Maxim Integrated Products 1

Block Diagram

19-2006; Rev 0; 5/01

Ordering Information

Pin Configuration appears at end of data sheet.

For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.

PART TEMP. RANGE PIN-PACKAGE

MAX105ECS -40°C to +85°C 80-Pin TQFP-EP

I

PRIMARY

PORT

I

AUXILIARY

PORT

I ADC

REF

Q ADC

MAX107

Q

PRIMARY

PORT

Q

AUXILIARY

PORT

MAX105

Dual, 6-Bit, 800Msps ADC with On-Chip,
Wideband Input Amplifier

2 _______________________________________________________________________________________

ABSOLUTE MAXIMUM RATINGS

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.

AVCC, AVCCI, AVCCQ and AVCCR to AGND............-0.3V to +6V

OV

CC

I and OVCCQ to OGND...................................-0.3V to +4V

AGND to OGND ................................................... -0.3V to +0.3V

P0I± to P5I± and A0I± to A5I±

DREADY+, DREADY- to OGNDI .............-0.3V to OV

CC

I+0.3V

P0Q± to P5Q±, A0Q± to A5Q±

DOR+ and DOR- to OGNDQ ................-0.3V to OV

CC

Q+0.3V

REF to AGNDR...........................................-0.3V to AV

CC

R+0.3V

Differential Voltage Between INI+ and INI- ....................-2V, +2V

Differential Voltage Between INQ+ and INQ-.................-2V, +2V

Differential Voltage Between CLK+ and CLK- ...............-2V, +2V

Maximum Current Into Any Pin ...........................................50mA

Continuous Power Dissipation (T

A

= +70°C)

80-Pin TQFP (derate 44mW/°C above +70°C)..................3.5W

Operating Temperature Range

MAX105ECS .....................................................-40°C to +85°C

Junction Temperature......................................................+150°C

Storage Temperature Range .............................-60°C to +150°C

Lead temperature (soldering, 10s) ..................................+300°C

ELECTRICAL CHARACTERISTICS

(AVCC= AVCCI = AVCCQ = AVCCR = +5V, OVCCI = OVCCQ = +3.3V, AGND = AGNDI = AGNDQ = AGNDR = 0, OGNDI = OGNDQ
= 0, f

CLK

= 802.816MHz, CL = 1µF to AGND at REF, RL= 100Ω ±1% applied to digital LVDS outputs, TA= T

MIN

to T

MAX

, unless

otherwise noted. Typical values are at T

A

= +25°C)

DC ACCURACY

Resolution RES 6 Bits
Integral Nonlinearity (Note 1) INL -1 ±0.2 1 LSB

Differential Nonlinearity
(Note 1)

Offset Voltage V
O ffset M atchi ng Betw een AD C s OM (Note 2) -0.5 ±0.1 0.5 LSB

ANALOG INPUTS (INI+, INI-, INQ+, INQ-)

Input Open-Circuit Voltage V

Input Open-Circuit Voltage
Matching

Common Mode Input Voltage
Range (Note 3)

Full-Scale Analog Input
Voltage Range (Note 4)

Input Resistance R

Input Capacitance C

Input Resistance Temperature
Coefficient

Full-Power Analog Input BW FPBW

REFERENCE OUTPUT

Reference Output Resistance R
Reference Output Voltage √REF I

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

DNL No missing codes guaranteed -1 ±0.25 1 LSB

(Note 2) -1 ±0.25 1 LSB

- V

(V

INI+

Signal + Offset w.r.t. AGND 1.85 3.05 V

IN

Referenced to AGNDR 5 Ω

SOURCE

) - (V

IN-

= 500µA 2.45 2.50 2.55 V

AOC

V

V

FSR

TCR

REF

OS

CM

IN

IN

-0.5dB

- V

INQ+

) ±7.5 mV

INQ-

2.4 2.5 2.6 V

0.76 0.8 0.84 V

1.7 2 kΩ

1.5 pF

150 ppm/°C

400 MHz

p-p

MAX105

Dual, 6-Bit, 800Msps ADC with On-Chip,

Wideband Input Amplifier

_______________________________________________________________________________________ 3

ELECTRICAL CHARACTERISTICS (continued)

(AVCC= AVCCI = AVCCQ = AVCCR = +5V, OVCCI = OVCCQ = +3.3V, AGND = AGNDI = AGNDQ = AGNDR = 0, OGNDI = OGNDQ
= 0, f

CLK

= 802.816MHz, CL = 1µF to AGND at REF, RL= 100Ω ±1% applied to digital LVDS outputs, TA= T

MIN

to T

MAX

, unless

otherwise noted. Typical values are at T

A

= +25°C)

p-p

)

CLOCK INPUTS (CLK+, CLK-)

Clock Input Resistance R

Clock Input Resistance
Temperature Coefficient

Minimum Clock Input
Amplitude

LVDS OUTPUTS (P0I± TO P5I±, P0Q± TO P5Q±, A0I± TO A5I±, A0Q± TO A5Q±, DREADY+, DREADY-, DOR+, DOR-)

Differential Output Voltage V
C hang e i n M ag ni tud e of V

Betw een “0” and “1” S tates

Steady-State Common Mode
Output Voltage

Change in Magnitude of V
Between “0” and “1” States

Differential Output Resistance 80 160 Ω

Output Current

DYNAMIC SPECIFICATION

Effective Number of Bits
(Note 8)

Signal-to-Noise Ratio
(Notes 10, 11)

Total Harmonic Distortion
(Note 11)

Spurious-Free Dynamic Range SFDR

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

TCR

CLK

CLK

CLK+ and CLK- to AGND 5 kΩ

150 ppm/°C

500 mV

 247 400 mV

OD



OD

∆V

 ±25 mV

OD

OC

V

OC(SS

∆V

 ±25 mV

OC

1.125 1.375 V

Short output together 2.5

Short to OGNDI = OGNDQ 25

Differential 5.4 5.8

Single-ended 5.75

Differential 5.65

Differential 35 37

Single-ended 36.7

Differential 36.5

Differential -44.5 -41

Single-ended -44.5

Differential -41

Differential 41 45

Single-ended 45

Differential 41.5

ENOB

SNR

THD

f

= 200.018MHz at

IN

-0.5dB FS (Note 9)

= 400.134MHz at

f

IN

-0.5dB FS

f

= 200.018MHz at

IN

-0.5dB FS (Note 9)

= 400.134MHz at

f

IN

-0.5dB FS

f

= 200.018MHz at

IN

-0.5dB FS (Note 9)

= 400.134MHz at

f

IN

-0.5dB FS

= 200.018MHz at

f

IN

-0.5dB FS (Note 9)

f

= 400.134MHz at

IN

-0.5dB FS

mA

Bits

dB

dBc

dB

MAX105

Dual, 6-Bit, 800Msps ADC with On-Chip,
Wideband Input Amplifier

4 _______________________________________________________________________________________

ELECTRICAL CHARACTERISTICS (continued)

(AVCC= AVCCI = AVCCQ = AVCCR = +5V, OVCCI = OVCCQ = +3.3V, AGND = AGNDI = AGNDQ = AGNDR = 0, OGNDI = OGNDQ
= 0, f

CLK

= 802.816MHz, CL = 1µF to AGND at REF, RL= 100Ω ±1% applied to digital LVDS outputs, TA= T

MIN

to T

MAX

, unless

otherwise noted. Typical values are at T

A

= +25°C)

Signal-to-Noise Plus Distortion
Ratio

Two-Tone Intermodulation TTIMD

Crosstalk Between ADCs XTLK

Gain Match Between ADCs GM (Note 12) -0.3 ±0.04 +0.3 dB
Phase Match Between ADCs PM (Note 12) -2 ±0.2 +2 deg

Metastable Error Rate Less than 1 in 10

POWER REQUIREMENTS

Analog Supply Voltage AV

Digital Supply Voltage OV

Analog Supply Current I

Output Supply Current OI

Analog Power Dissipation P

C om m on- M od e Rej ecti on Rati o CMRR V

Power-Supply Rejection Ratio PSRR

TIMING CHARACTERISTICS

Maximum Sample Rate f

Clock Pulse Width Low t

Clock Pulse Width High t

Aperture Delay t

Aperture Jitter t

CLK-to-DREADY Propagation
Delay

DREADY-to-DATA
Propagation Delay

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

SINAD

CC_

CC_

CC

CC

DISS

MAX

PWL

PWH

AD

AJ

t

PD1

t

PD2

f

= 200.018MHz at

IN

-0.5dB FS (Note 9)

f

= 400.134MHz at

IN

-0.5dB FS

f

= 124.1660MHz, f

IN1

at -7dBFS

f

= 200.0180MHz, f

INI

at -0.5dB FS

AV

= AVCCI = AVCCQ = AVCCR5 ±5% V

CC

OV

I = OV

CC

I

= AICCR + AICCI + AICCQ + AI

CC

OI

= OI

CC

Q 3.3 ±10% V

CC

I + OI

CC

Differential 34 36.4

Single-ended 36.1

Differential 35.2

= 126.1260MHz

IN2

= 210.0140MHz

INQ

CC

Q 400 510 mA

CC

-52 dBc

-70 dB

250 320 mA

2.6 W

= V

IN_+

AV

CC

+4.75V to +5.25V (Note 7)

= ±0.1V (Note 6) 40 60 dB

IN_-

= AV

I = AV

CC

CC

Q = AV

CC

R =

40 57 dB

800 Msps

0.56 ns

0.56 ns

100 ps

1.5 ps

(Note 13) 1.5 ns

(Notes 5, 13) 0 120 300 ps

16

dB

Clock

Cycles

RMS

MAX105

Dual, 6-Bit, 800Msps ADC with On-Chip,

Wideband Input Amplifier

_______________________________________________________________________________________ 5

Note 1: NL and DNL is measured using a sine-histogram method.
Note 2: Input offset is the voltage required to cause a transition between codes 0 and -1.
Note 3: Numbers provided are for DC-coupled case. The user has the choice of AC-coupling, in which case, the DC input

voltage level does not matter.

Note 4: The peak-to-peak input voltage required, causing a full-scale digitized output when using a trigonometric curve-fitting

algorithm (e.g. FFT).

Note 5: Guaranteed by design and characterization.
Note 6: Common-mode rejection ratio is defined as the ratio of the change in the offset voltage to the change in the common-

mode voltage expressed in dB.

Note 7: Measured with analog power supplies tied to the same potential.
Note 8: Effective number of bits (ENOB) is computed from a curve-fit referenced to the theoretical full-scale range.
Note 9: The clock and input frequencies are chosen so that there are 2041 cycles in an 8,192-long record.
Note 10: Signal-to-noise-ratio (SNR) is measured both with the other channel idling and converting an out-of-phase signal.

The worst case number is presented. Harmonic distortion components two through five are excluded from the noise.

Note 11: Harmonic distortion components two through five are included in the total harmonic distortion specification.
Note 12: Both I and Q inputs are effectively tied together (e.g. driven by power splitter). Signal amplitude is -0.5dB FS at an input

frequency of f

IN

= 200.0180 MHz.

Note 13: Measured with a differential probe, 1pF capacitance.

ELECTRICAL CHARACTERISTICS (continued)

(AVCC= AVCCI = AVCCQ = AVCCR = +5V, OVCCI = OVCCQ = +3.3V, AGND = AGNDI = AGNDQ = AGNDR = 0, OGNDI = OGNDQ
= 0, f

CLK

= 802.816MHz, CL= 1µF to AGND at REF, RL= 100Ω ±1% applied to digital LVDS outputs, TA= T

MIN

to T

MAX

, unless

otherwise noted. Typical values are at T

A

= +25°C)

DREADY Duty Cycle (Notes 5, 13) 47 53 %

LVDS Output Rise-Time t

LVDS Output Fall-Time t

LVDS Differential Skew t

DREADY Rise-Time t

DREADY Fall-Time t

Primary Port Pipeline Delay t

Auxiliary Port Pipeline Delay t

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

RDATA

FDATA

SKEW1

RDREADY

FDREADY

PDP

PDA

20% to 80% (Notes 5, 13) 200 500 ps

20% to 80% (Notes 5, 13) 200 500 ps

Any differential pair <65 ps

Any tw o LV D S outp ut si g nal s excep t D RE AD Y <100 ps

20% to 80% (Notes 5, 13) 200 500 ps

20% to 80% (Notes 5, 13) 200 500 ps

5

6

Clock

Cycles

Clock

Cycles

MAX105

Dual, 6-Bit, 800Msps ADC with On-Chip,
Wideband Input Amplifier

6 _______________________________________________________________________________________

Typical Operating Characteristics

(AVCC= AVCCI = AVCCQ = AVCCR = +5V, OVCCI = OVCCQ = +3.3V, AGND = AGNDI = AGNDQ = AGNDR = 0, OGNDI = OGNDQ = 0,
f

CLK

= 802.816MHz, differential input at -0.5dB FS, CL = 1µF to AGND at REF, RL= 100Ω ±1% applied to digital LVDS outputs, TA=

T

MIN

to T

MAX

, unless otherwise noted. Typical values are at TA= +25°C)

-100

-70

-80

-90

-50

-60

-10

-20

-30

-40

0

0 20 40 60 80 100 120 140

8192-POINT FFT,

DIFFERENTIAL INPUT

MAX105 toc01

ANALOG INPUT FREQUENCY (MHz)

AMPLITUDE (dB FS)

fIN = 125.146MHz
A

IN

= -0.5dB FS

-100

-70

-80

-90

-60

-50

-40

-30

-20

-10

0

08040 120 160 200

8192-POINT FFT,

DIFFERENTIAL INPUT

MAX105 toc02

ANALOG INPUT FREQUENCY (MHz)

AMPLITUDE (dB FS)

fIN = 124.999MHz
A

IN

= -0.5dB FS

-100

-70

-80

-90

-60

-50

-40

-30

-20

-10

0

0 14070 210 280 350 420

8192-POINT FFT,

DIFFERENTIAL INPUT

MAX105 toc03

ANALOG INPUT FREQUENCY (MHz)

AMPLITUDE (dB FS)

f

IN

= 400.124MHz

A

IN

= -0.5dB FS

-100

-70

-80

-90

-60

-50

-40

-30

-20

-10

0

0 16080 240 320 400

TWO-TONE IMD (8192-POINT RECORD),

DIFFERENTIAL INPUT

MAX105 toc04

ANALOG INPUT FREQUENCY (MHz)

AMPLITUDE (dB FS)

f

N1

= 124.166MHz

f

IN2

= 126.126MHz

A

IN

= -7dB FS

f

IN1

f

IN2

40

0

10M 1G 10G

SINAD vs. ANALOG INPUT FREQUENCY,

DIFFERENTIAL INPUT

10

5

15

20

25

30

35

MAX105 toc06

ANALOG INPUT FREQUENCY (Hz)

AMPLITUDE (dB)

100M

-12dB FS

-6dB FS

-1dB FS

-20

-60
10M 1G 10G

THD vs. ANALOG INPUT FREQUENCY,

DIFFERENTIAL INPUT

-50

-55

-45

-40

-35

-30

-25

MAX105 toc07

ANALOG INPUT FREQUENCY (Hz)

AMPLITUDE (dB)

100M

-12dB FS

-1dB FS

-6dB FS

55

10

10M 10G1G100M

SFDR vs. ANALOG INPUT FREQUENCY,

DIFFERENTIAL INPUT

25

15

45

35

60

30

20

50

40

MAX105 toc08

ANALOG INPUT FREQUENCY (Hz)

AMPLITUDE (dB)

-12dB FS

-1dB FS

-6dB FS

-4
10M 10G1G100M

FULL-POWER INPUT BANDWIDTH

SINGLE-ENDED INPUT

1

-2

-3

0

-1

MAX105 toc09

ANALOG INPUT FREQUENCY (Hz)

GAIN (dB)

SNR vs. ANALOG INPUT FREQUENCY,

40

35

30

25

20

15

AMPLITUDE (dB)

10

5

0

10M 1G 10G

DIFFERENTIAL INPUT

-1dB FS

MAX105 toc05

-6dB FS

-12dB FS

100M

ANALOG INPUT FREQUENCY (Hz)

MAX105

Dual, 6-Bit, 800Msps ADC with On-Chip,

Wideband Input Amplifier

_______________________________________________________________________________________ 7

Typical Operating Characteristics (continued)

(AVCC= AVCCI = AVCCQ = AVCCR = +5V, OVCCI = OVCCQ = +3.3V, AGND = AGNDI = AGNDQ = AGNDR = 0, OGNDI = OGNDQ = 0,
f

CLK

= 802.816MHz, differential input at -0.5dB FS, CL= 1µF to AGND at REF, RL= 100Ω ±1% applied to digital LVDS outputs, TA=

T

MIN

to T

MAX

, unless otherwise noted. Typical values are at TA= +25°C)

SNR (dB)

SFDR (dB)

SNR vs. ANALOG INPUT POWER,

40

36

32

28

24

-10 -8 -7 -6 -5-9 -4 -3 -2 -1 0

DIFFERENTIAL INPUT

f

= 199.8535MHz

IN

ANALOG INPUT POWER (dB FS)

MAX105 toc10

40

36

32

SINAD (dB)

28

24

-10 -8 -7 -6 -5-9 -4 -3 -2 -1 0

SFDR vs. ANALOG INPUT POWER,

DIFFERENTIAL INPUT

50

48

46

44

42

40

f

= 199.8535MHz

IN

MAX105 toc13

45

41

37

SNR (dB)

33

29

SINAD vs. ANALOG INPUT POWER,

DIFFERENTIAL INPUT

f

= 199.8535MHz

IN

ANALOG INPUT POWER (dB FS)

SNR vs. TEMPERATURE

f

= 199.8535MHz

IN

MAX105 toc11

MAX105 toc14

THD vs. ANALOG INPUT POWER,

DIFFERENTIAL INPUT

-34

f

= 199.8535MHz

IN

-38

-42

THD (dB)

-46

-50

-10 -8 -7 -6 -5-9 -4 -3 -2 -1 0
ANALOG INPUT POWER (dB FS)

SINAD vs. TEMPERATURE

42

f

= 199.8535MHz

IN

40

38

SINAD (dB)

36

34

MAX105 toc12

MAX105 toc15

38

-10 -6-7-9 -8 -5 -4 -3 -2 -1 0
ANALOG INPUT POWER (dB FS)

THD vs. TEMPERATURE

-38

f

= 199.8535MHz

IN

-42

-46

THD (dB)

-50

-54

-40 10-15 35 60 85

TEMPERATURE (°C)

MAX toc16

25

-40 10-15 35 60 85

TEMPERATURE (°C)

SFDR vs. TEMPERATURE

55

f

= 199.8535MHz

IN

51

47

SFDR (dB)

43

39

35

-40 10-15 35 60 85

TEMPERATURE (°C)

MAX105 toc17

32

-40 10-15 35 60 85

TEMPERATURE (°C)

SNR vs. CLOCK FREQUENCY,

DIFFERENTIAL INPUT (-1dB FS)

40

f

= 202.346MHz

IN

38

36

34

AMPLITUDE (dB)

32

30

400 600500 700 800 900

CLOCK FREQUENCY (MHz)

MAX105 toc18