Rainbow Electronics MAX1003 User Manual

_______________General Description

The MAX1003 is a dual, 6-bit analog-to-digital converter (ADC) that combines high-speed, low-power operation with a user-selectable input range, an internal reference, and a clock oscillator. The dual parallel ADCs are designed to convert in-phase (I) and quadrature (Q) analog signals into two 6-bit, offset-binary-coded digital outputs at sampling rates up to 90Msps. The ability to directly interface with baseband I and Q signals makes the MAX1003 ideal for use in direct-broadcast satellite, VSAT, and QAM16 demodulation applications.

The MAX1003 input amplifiers feature true differential inputs, a -0.5dB analog bandwidth of 55MHz, and userprogrammable input full-scale ranges of 125mVp-p, 250mVp-p, or 500mVp-p. With an AC-coupled input signal, matching performance between input channels is typically better than 0.1dB gain, 1/4LSB offset, and

0.5° phase. Dynamic performance is 5.85 effective number of bits (ENOB) with a 20MHz analog input signal, or 5.7 ENOB with a 50MHz signal.

The MAX1003 operates with +5V analog and +3.3V digital supplies for easy interfacing to +3.3V-logic-compatible digital signal processors and microprocessors. It comes in a 36-pin SSOP package.

________________________Applications

Direct Broadcast Satellite (DBS) Receivers VSAT Receivers Wide Local Area Networks (WLANs) Cable Television Set-Top Boxes

____________________________Features

♦ Two Matched 6-Bit ADCs ♦ High Sampling Rate: 90Msps per ADC ♦ Low Power Dissipation: 350mW ♦ Excellent Dynamic Performance:

5.85 ENOB with 20MHz Analog Input

5.7 ENOB with 50MHz Analog Input

♦ ±1/4LSB INL and DNL (typ) ♦ Internal Bandgap Voltage Reference ♦ Internal Oscillator with Overdrive Capability ♦ 55MHz (-0.5dB) Bandwidth Input Amplifiers with

True Differential Inputs

♦ User-Selectable Input Full-Scale Range

(125mVp-p, 250mVp-p, or 500mVp-p)

♦ 1/4LSB Channel-to-Channel Offset Matching (typ) ♦ 0.1dB Gain and 0.5° Phase Matching (typ) ♦ Single-Ended or Differential Input Drive ♦ Flexible, 3.3V, CMOS-Compatible Digital Outputs

MAX1003

Low-Power, 90Msps, Dual 6-Bit ADC

________________________________________________________________

Maxim Integrated Products

MAX1003

DATA

BUFFER

CLOCK DRIVER

DI0–DI5

DCLK

TNK+ TNK-

DQ0–DQ5

INPUT

AMP

IIN+

IIN-

GAIN

QIN+

QIN-

CLOCK

OUT

DATA

BUFFER

ADC

VREF

BANDGAP

REFERENCE

OFFSET

CORREC-

TION Q

OFFSET

CORREC-

TION I

INPUT

AMP

QOCC+ QOCC-

IOCC+ IOCC-

_________________________________________________________Functional Diagram

19-1236; Rev 0; 6/97

PART

MAX1003CAX 0°C to +70°C

TEMP. RANGE PIN-PACKAGE

36 SSOP

EVALUATION KIT

AVAILABLE

______________Ordering Information

Pin Configuration appears at end of data sheet.

For free samples & the latest literature: http://www.maxim-ic.com, or phone 1-800-998-8800

MAX1003

Low-Power, 90Msps, Dual 6-Bit ADC

2 _______________________________________________________________________________________

ABSOLUTE MAXIMUM RATINGS

DC ELECTRICAL CHARACTERISTICS

(VCC= +5V ±5%, V

CCO

= 3.3V ±300mV, TA= T

MIN

to T

MAX

, unless otherwise noted.)

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

VCCto GND ............................................................-0.3V to 6.5V

CCO

to OGND........................................................-0.3V to 6.5V

GND to OGND ........................................................-0.3V to 0.3V

Digital and Clock Output Pins to OGND...-0.3V to V

CCO

(10sec)

All Other Pins to GND...............................................-0.3V to V

Continuous Power Dissipation (TA= +70°C)

SSOP (derate 11.8mW/°C above +70°C) ...................941mW

Operating Temperature Range...............................0°C to +70°C

Storage Temperature Range.............................-65°C to +150°C

Lead Temperature (soldering, <10sec)...........................+300°C

CONDITIONS

LSB-0.5 ±0.25 0.5INLIntegral Nonlinearity

Bits6RESResolution

UNITSMIN TYP MAXSYMBOLPARAMETER

GAIN = open (mid gain)

GAIN = VCC(high gain)

No missing codes over temperature

237.5 250 262.5V

FSM

118.75 125 131.25V

FSH

LSB-0.5 ±0.25 0.5DNLDifferential Nonlinearity

Other analog input driven with external source (Note 2)

Guaranteed by design

V1.75 2.75V

GAIN = GND (low gain)

Common-Mode Voltage Range

pF3 5C

Input Capacitance

kΩ13 20 29R

Input Resistance

V2.25 2.35 2.45V

AOC

Input Open-Circuit Voltage

mVp-p

475 500 525V

FSL

Full-Scale Input Range

Other oscillator input tied to VCC+ 0.3V

SOURCE

= 50µA V0.7V

CCO

Digital Outputs Logic-High Voltage

kΩ4.8 8 12.1R

OSC

Oscillator Input Resistance

SINK

= 400µA V0.5V

Digital Outputs Logic-Low Voltage

VCC= 4.75V to 5.25V (Note 3) 20MHz, full-scale I and Q analog inputs,

CL= 15pF (Note 4)

mW350PDPower Dissipation

mA21I

CCO

Digital Outputs Supply Current

dB-75 -40PSRRPower-Supply Rejection Ratio

mA63 104I

Supply Current

DC ACCURACY (Note 1)

INVERTING AND NONINVERTING ANALOG INPUTS

OSCILLATOR INPUTS

DIGITAL OUTPUTS (DI0–DI5, DQ0–DQ5)

POWER SUPPLY

MAX1003

Low-Power, 90Msps, Dual 6-Bit ADC

_______________________________________________________________________________________ 3

AC ELECTRICAL CHARACTERISTICS

(VCC= +5V ±5%, V

CCO

= 3.3V ±300mV, TA= +25°C, unless otherwise noted.)

Note 1: Best-fit straight-line linearity method. Note 2: A typical application will AC couple the analog input to the DC bias level present at the analog inputs (typically 2.35V).

However, it is also possible to DC couple the analog input (using differential or single-ended drive) within this commonmode input range (Figures 4 and 5).

Note 3: PSRR is defined as the change in the mid-gain full-scale range as a function of the variation in V

supply voltage,

expressed in decibels.

Note 4: The current in the V

CCO

supply is a strong function of the capacitive loading on the digital outputs. To minimize supply transients and achieve optimal dynamic performance, reduce the capacitive-loading effects by keeping line lengths on the digital outputs to a minimum.

Note 5: Offset-correction compensation enabled, 0.22µF at Q and I compensation inputs (Figures 2 and 3). Note 6: t

and t

SKEW

are measured from the 1.4V level of the output clock, to the 1.4V level of either the rising or falling edge of a

data bit. t

DCLK

is measured from the 50% level of the clock-overdrive signal on TNK+ to the 1.4V level of DCLK. The capac-

itive load on the outputs is 15pF.

GAIN = GND, open, V

GAIN = open (mid gain), fIN= 50MHz,

-1dB below full scale

GAIN = open (mid gain)

5.7

ENOB

5.6 5.85

Effective Number of Bits

GAIN = open (mid gain)

GAIN = GND (low gain)

Q channel

I channel

CONDITIONS

MHz55BWAnalog Input -0.5dB Bandwidth

Msps90f

MAX

Maximum Sample Rate

-55XTLK

GAIN = VCC(high gain)

Crosstalk Between ADCs

LSB

-0.5 0.5

OFFInput Offset (Note 5)

-0.5 0.5

dB35.5 37SINAD

Signal-to-Noise plus Distortion Ratio

Bits

5.85ENOB

5.8ENOB

(Note 5)

dB-0.2 ±0.1 0.2AM

Amplitude Match Between ADCs

LSB-0.5 ±0.25 0.5OMMOffset Mismatch Between ADCs

(Note 6)

ns1.5t

SKEW

Data Valid Skew

ns3.6t

Clock to Data Propagation Delay

degrees-2 ±0.5 2PM

UNITSMIN TYP MAXSYMBOLPARAMETER

Phase Match Between ADCs

TNK+ to DCLK (Note 6) ns5.3t

DCLK

Input to DCLK Delay

Figure 8 ns7.5t

Aperture Delay

Figure 8

clock cycle

1PDPipeline Delay

TIMING CHARACTERISTICS (Data outputs: RL= 1MΩ, CL= 15pF)

DYNAMIC PERFORMANCE (Gain = open, external 90MHz clock (Figure 7), V

INI

= V

INQ

= 20MHz sine, amplitude -1dB below

full scale, unless otherwise noted.)

MAX1003

Low-Power, 90Msps, Dual 6-Bit ADC

4 _______________________________________________________________________________________

__________________________________________Typical Operating Characteristics

(VCC= +5V ±5%, V

CCO

= 3.3V ±300mV, f

CLK

= 90Msps, GAIN = open (midgain) MAX1003 evaluation kit, TA= +25°C, unless

otherwise noted.)

6.0

5.0 10

100

EFFECTIVE NUMBER OF BITS

vs. ANALOG INPUT FREQUENCY

5.2

MAX1003-01

ANALOG INPUT FREQUENCY (MHz)

EFFECTIVE NUMBER OF BITS

5.4

5.6

5.8

CLK

= 90Msps

-1.0 1 10 100

ANALOG INPUT BANDWIDTH

-0.8

MAX1003-02

ANALOG INPUT FREQUENCY (MHz)

MAGNITUDE (dB)

-0.6

-0.2

-0.4

5.5 1 10 100

EFFECTIVE NUMBER OF BITS

vs. SAMPLING/CLOCK FREQUENCY

5.6

MAX1003-03

CLOCK FREQUENCY (MHz)

EFFECTIVE NUMBER OF BITS

5.7

5.9

5.8

6.0

fIN = 20MHz

-50

1k 100k 1M

OSCILLATOR OPEN-LOOP PHASE NOISE

vs. FREQUENCY OFFSET

-110

-130

-90

-70

MAX1003-04

FREQUENCY OFFSET FROM CARRIER (Hz)

PHASE NOISE (dBc)

10k

0.50

-0.50 0 64

INTEGRAL NONLINEARITY

vs. CODE

-0.25

0.25

MAX1003-06

CODE

INL (LSB)

10 20 30 40 50 60

0.50

-0.50 0 64

DIFFERENTIAL NONLINEARITY

vs. CODE

-0.25

0.25

MAX1003-07

CODE

DNL (LSB)

10 20 30 40 50 60

-60

-40

-20

0 9 18 27 36 45

FFT PLOT

MAX1003-05

FREQUENCY (MHz)

AMPLITUDE (dB)

fIN = 19.9512MHz f

CLK

= 90.000MHz 1024 POINTS AC COUPLED SINGLE ENDED AVERAGED

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Rainbow Electronics MAX1003 User Manual

Specifications and Main Features

Frequently Asked Questions

User Manual