LM96000
Hardware Monitor with Integrated Fan Control
General Description
The LM96000, hardware monitor, has a two wire digital
interface compatible with SMBus 2.0. Using an 8-bit Σ∆
ADC, the LM96000 measures:
– the temperature of two remote diode connected transis-
tors as well as its own die
– the VCCP, 2.5V, 3.3VSBY, 5.0V, and 12V supplies (in-
ternal scaling resistors).
To set fan speed, the LM96000 has three PWM outputs that
are each controlled by one of three temperature zones. High
and low PWM frequency ranges are supported. The
LM96000 includes a digital filter that can be invoked to
smooth temperature readings for better control of fan speed.
The LM96000 has four tachometer inputs to measure fan
speed. Limit and status registers for all measured values are
included.
Features
n 2-wire, SMBus 2.0 compliant, serial digital interface
n 8-bit Σ∆ ADC
n Monitors VCCP, 2.5V, 3.3 VSBY, 5.0V, and 12V
motherboard/processor supplies
n Monitors 2 remote thermal diodes
n Programmable autonomous fan control based on
temperature readings
n Noise filtering of temperature reading for fan control
n 1.0˚C digital temperature sensor resolution
n 3 PWM fan speed control outputs
n Provides high and low PWM frequency ranges
n 4 fan tachometer inputs
n Monitors 5 VID control lines
n 24-pin TSSOP package
n XOR-tree test mode
Key Specifications
n Voltage Measurement Accuracy
n Resolution8-bits, 1˚C
n Temperature Sensor Accuracy
n Temperature Range
— LM96000 Operational0˚C to +85˚C
— Remote Temp Accuracy0˚C to +125˚C
n Power Supply Voltage+3.0V to +3.6V
n Power Supply Current0.53 mA
Applications
n Desktop PC
n Microprocessor based equipment
(e.g. Base-stations, Routers, ATMs, Point of Sales)
November 2004
±
2% FS (max)
±
3˚C (max)
LM96000 Hardware Monitor with Integrated Fan Control
SMBCLK2Digital InputSystem Management Bus Clock. Tied to Open-drain output. 5V
VID05Digital InputVoltage identification signal from the processor. This value is read
VID16Digital InputVoltage identification signal from the processor. This value is read
VID27Digital InputVoltage identification signal from the processor. This value is read
VID38Digital InputVoltage identification signal from the processor. This value is read
VID419Digital InputVoltage identification signal from the processor. This value is read
3.3V4POWER+3.3V pin. Can be powered by +3.3V Standby power if monitoring
GND3GROUNDGround for all analog and digital circuitry.
5V20Analog InputAnalog input for +5V monitoring.
12V21Analog InputAnalog input for +12V monitoring.
2.5V22Analog InputAnalog input for +2.5V monitoring.
VCCP_IN23Analog InputAnalog input for VCCP (processor voltage) monitoring.
System Management Bus Data. Open-drain output. 5V tolerant,
SMBus 2.0 compliant.
tolerant, SMBus 2.0 compliant.
in the VID0–VID4 Status Register.
in the VID0–VID4 Status Register.
in the VID0–VID4 Status Register.
in the VID0–VID4 Status Register.
in the VID0–VID4 Status Register.
in low power states is required. This pin also serves as the analog
input to monitor the 3.3V supply. This pin should be bypassed
with a 0.1µf capacitor in parallel with 100pf. A bulk capacitance of
approximately 10µf needs to be in the near vicinity of the
LM96000.
20084602
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Pin Descriptions (Continued)
SymbolPinTypeName and Function/Connection
Remote1+18Remote Thermal
Remote1−17Remote Thermal
Remote
Remote2+16Remote Thermal
Remote2−15Remote Thermal
TACH111Digital InputInput for monitoring tachometer output of fan 1.
TACH212Digital InputInput for monitoring tachometer output of fan 2.
TACH39Digital InputInput for monitoring tachometer output of fan 3.
Diode Positive
Input
Diode Negative
Input
Diode Positive
Output
Diode Negative
Input
LM96000
Positive input (current source) from the first remote thermal diode.
Serves as the positive input into the A/D. Connected to
THERMDA pin of Pentium processor or the base of a diode
connected MMBT3904 NPN transistor.
Negative input (current sink) from the first remote thermal diode.
Serves as the negative input into the A/D. Connected to
THERMDC pin of Pentium processor or the emmiter of a diode
connected MMBT3904 NPN transistor.
Positive input (current source) from the first remote thermal diode.
Serves as the positive input into the A/D. Connected to
THERMDA pin of Pentium processor or the base of a diode
connected MMBT3904 NPN transistor.
Negative input (current sink) from the first remote thermal diode.
Serves as the negative input into the A/D. Connected to
THERMDC pin of Pentium processor or the emmiter of a diode
connected MMBT3904 NPN transistor.
Fan Tachometer Inputs
Fan Control
TACH4/Address
Select
PWM1/xTest
Out
PWM210Digital Open-Drain
PWM3/Address
Enable
14Digital InputInput for monitoring tachometer output of fan 4. If in Address
24Digital Open-Drain
Output
Output
13Digital Open-Drain
Output
Select Mode, determines the SMBus address of the LM96000.
Fan speed control 1. When in XOR tree test mode, functions as
XOR Tree output.
Fan speed control 2.
Fan speed control 3. Pull to ground at power on to enable
Address Select Mode (Address Select pin controls SMBus
address of the device).
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Absolute Maximum Ratings (Notes 1, 2)
If Military/Aerospace specified devices are required,
LM96000
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Storage Temperature−65˚C to +150˚C
Soldering process must comply with National’s reflow
temperature profile specifications. Refer to
www.national.com/packaging/. (Note 6)
Supply Voltage, V+−0.5V to 6.0V
Voltage on Any Digital Input or
−0.5V to 6.0V
Operating Ratings (Notes 1, 2)
Output Pin
Voltage on 12V Analog Input−0.5V to 16V
Voltage on 5V Analog Input−0.5V to 6.66V
Voltage on Remote1+, Remote2+, −0.5V to (V+ + 0.05V)
±
Current on Remote1−, Remote2−
1mA
Voltage on Other Analog Inputs−0.5V to 6.0V
Input Current on Any Pin (Note 3)
Package Input Current (Note 3)
Package Dissipation at T
= 25˚CSee (Note 5)
A
±
5mA
±
20 mA
ESD Susceptibility (Note 4)
Human Body Model2500V
Machine Model250V
LM96000 Operating Temperature
Range
Remote Diode Temperature Range0˚C ≤ T
Supply Voltage (3.3V nominal)+3.0V to +3.6V
V
Voltage Range
IN
+12V V
IN
+5V V
IN
+3.3V V
IN
VCCP_IN and All Other Inputs −0.05V to (V+ + 0.05V)
VID0–VID4−0.05V to 5.5V
Typical Supply Current0.53 mA
0˚C ≤ T
D
−0.05V to 16V
−0.05V to 6.66V
3.0V to 4.4V
DC Electrical Characteristics
The following specifications apply for V+ = 3.0V to 3.6V, and all analog input source impedance RS=50Ω unless otherwise
specified in conditions. Boldface limits apply for T
the ambient temperature of the LM96000; T
is the junction temperature of the LM96000; TDis the thermal diode junction tem-
J
A=TJ
over T
perature.
SymbolParameterConditionsTypical
POWER SUPPLY CHARACTERISTICS
Supply Current (Note 9)Converting, Interface and
Power-On Reset Threshold Voltage1.6V (min)
TEMPERATURE TO DIGITAL CONVERTER CHARACTERISTICS
Resolution1
Temperature Accuracy (See (Note 10) for Thermal
Diode Processor Type)
Temperature Accuracy using Internal Diode (Note
11)
I
DS
External Diode Current SourceHigh Level188280µA (max)
External Diode Current Ratio16
ANALOG TO DIGITAL CONVERTER CHARACTERISTICS
TUETotal Unadjusted Error(Note 12)
DNLDifferential Non-linearity1LSB
Power Supply Sensitivity
Total Monitoring Cycle Time (Note 13)All Voltage and
MIN
=0˚C to T
=85˚C; all other limits TA=TJ= 25˚C. TAis
MAX
Limits
(Note 7)
(Note 8)
1.83.5mA (max)
Fans Inactive, Peak
Current
Converting, Interface and
0.53mA
Fans Inactive, Average
Current
2.8V (max)
8
=25˚C
T
D
T
=0˚C to 100˚C
D
T
=100˚C to 125˚C
D
±
1
±
1
±
2.5˚C (max)
±
3˚C (max)
±
4˚C (max)
±
3˚C (max)
Low Level11.75µA
±
2%FS (max)
±
1%/V
182200ms (max)
Temperature readings
≤ +85˚C
A
≤ +125˚C
Units
(Limits)
˚C
Bits
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DC Electrical Characteristics (Continued)
The following specifications apply for V+ = 3.0V to 3.6V, and all analog input source impedance RS=50Ω unless otherwise
specified in conditions. Boldface limits apply for T
the ambient temperature of the LM96000; T
is the junction temperature of the LM96000; TDis the thermal diode junction tem-
J
A=TJ
over T
perature.
SymbolParameterConditionsTypical
Input Resistance, all analog inputs210140kΩ (min)
DIGITAL OUTPUT: PWM1, PWM2, PWM3, XTESTOUT
I
OL
V
OL
Logic Low Sink CurrentVOL=0.4V8mA (min)
Logic Low LevelI
SMBUS OPEN-DRAIN OUTPUT: SMBDAT
V
OL
I
OH
Logic Low Output VoltageI
High Level Output CurrentV
SMBUS INPUTS: SMBCLK. SMBDAT
V
V
V
IH
IL
HYST
Logic Input High Voltage2.1V (min)
Logic Input Low Voltage0.8V (max)
Logic Input Hysteresis Voltage300mV
DIGITAL INPUTS: ALL
V
IH
V
IL
V
TH
I
IH
I
IL
C
IN
Logic Input High Voltage2.1V (min)
Logic Input Low Voltage0.8V (max)
Logic Input Threshold Voltage1.5V
Logic High Input CurrentVIN= V+0.00510µA (max)
Logic Low Input CurrentVIN= GND−0.005−10µA (max)
Digital Input Capacitance20pF
MIN
=0˚C to T
=85˚C; all other limits TA=TJ= 25˚C. TAis
MAX
Limits
(Note 7)
(Note 8)
400kΩ (max)
=+8mA0.4V (max)
OUT
=+4mA0.4VV (max)
OUT
= V+0.110µA (max)
OUT
LM96000
Units
(Limits)
AC Electrical Characteristics
The following specifications apply for V+ = 3.0V to 3.6V unless otherwise specified in conditions. Boldface limits apply for T
=TJover T
SymbolParameterConditionsTypical
TACHOMETER ACCURACY
FAN PWM OUTPUT
SPIKE SMOOTHING FILTER
SMBUS TIMING CHARACTERISTICS
f
SMB
MIN
=0˚C to T
=85˚C; all other limits TA=TJ= 25˚C.
MAX
Limits
(Note 7)
Fan Count Accuracy
(Note 8)
±
10% (max)
(Limits)
Fan Full-Scale Count65536(max)
Fan Counter Clock Frequency90kHz
Fan Count Conversion Time0.71.4sec (max)
Frequency Setting Accuracy
±
10% (max)
Frequency Range10
30
Duty-Cycle RangeLow frequency range0to100 % (max)
Duty-Cycle Resolution (8-bits)0.390625%
Spin-Up Time Interval Range100
4000
Spin-Up Time Interval Accuracy
Time Interval Deviation
±
10% (max)
±
10% (max)
Time Interval Range35
0.8
SMBus Operating Frequency10
100
kHz (min)
kHz (max)
A
Units
Hz
kHz
ms ms
sec
sec
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AC Electrical Characteristics (Continued)
The following specifications apply for V+ = 3.0V to 3.6V unless otherwise specified in conditions. Boldface limits apply for T
=TJover T
LM96000
SymbolParameterConditionsTypical
f
BUF
t
HD_STA
t
SU:STA
t
SU:STO
t
HD:DAT
t
SU:DAT
t
TIMEOUT
t
LOW
t
HIGH
t
F
t
R
t
POR
MIN
=0˚C to T
=85˚C; all other limits TA=TJ= 25˚C.
MAX
Limits
(Note 7)
SMBus Free Time Between Stop And
(Note 8)
4.7µs (min)
Start Condition
Hold Time After (Repeated) Start
4.0µs (min)
Condition (after this period, the first
clock is generated)
Repeated Start Condition Setup Time4.7µs (min)
Stop Condition Setup Time4.0µs (min)
Data Output Hold Time300ns (min)
930ns (max)
Data Input Setup Time250ns (min)
Data And Clock Low Time To Reset
Of SMBus Interface Logic(Note 14)
25
35
Clock Low Period4.7µs (min)
Clock High Period4.0
50
Clock/Data Fall Time300ns (max)
Clock/Data Rise Time1000ns (max)
Time from Power-On-Reset to
V+>2.8V500ms (max)
LM96000 Reset and Operational
A
Units
(Limits)
ms (min)
ms (max)
µs (min)
µs (max)
20084603
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics. The guaranteed
specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test
conditions.
Note 2: All voltages are measured with respect to GND, unless otherwise noted.
Note 3: When the input voltage (V
maximum package input current rating limits the number of pins that can safely exceed the power supplies with an input current of 5mAto four. Parasitic components
and/or ESD protection circuitry are shown below for the LM96000’s pins. The nominal breakdown voltage the zener is 6.5V. Care should be taken not to forward bias
the parasitic diode D1 present on pins D+ and D−. Doing so by more that 50 mV may corrupt temperature measurements. SNP stands for snap-back device.
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) at any pin exceeds the power supplies (V
IN
IN
<
GND or V
>
V+ ), the current at that pin should be limited to 5mA. The 20mA
IN
LM96000
Pin
#
Pin
NameCircuitAll Input Circuits
1SMBDATA
2SMBCLK
3GNDB
43.3V
5VID0A
6VID1
7VID2
8VID3
9TACH3
10PWM2
11TACH1
12TACH2
13PWM3/AddEnable
14TACH4/AddSel
15REMOTE2−C
Circuit A
Circuit B
Circuit C
16REMOTE2+D
17REMOTE1−C
18REMOTE1+D
19VID4A
Circuit D
205VE
2112V
222.5V
23VCCP_IN
24PWM1/xTEXTOUTA
Circuit E
Note 4: Human body model, 100pF discharged through a 1.5kΩ resistor. Machine model, 200pF discharged directly into each pin.
Note 5: Thermal resistance junction-to-ambient when attached to a double-sided printed circuit board with 1 oz. foil is 113 ˚C/W.
Note 6: Reflow temperature profiles are different for packages containing lead (Pb) than for those that do not.
Note 7: Typicals are at T
Note 8: Limits are guaranteed to National’s AOQL (Average Outgoing Quality Level).
Note 9: The average current can be calculated from the peak current using the following equation:
Quiescent current will not increase substantially with an SMBus transaction.
Note 10: The accuracy of the LM96000CIMT is guaranteed when using the thermal diode of Intel Pentium 4 90nm processors or any thermal diode with a
non-ideality of 1.011 and series resistance of 3.33Ω. When using a 2N3904 type transistor as a thermal diode the error band will be typically shifted by -?˚C.
Note 11: Local temperature accuracy does not include the effects of self-heating. The rise in temperature due to self-heating is the product of the internal power
dissipation of the LM96000 and the thermal resistance. See (Note 5) for the thermal resistance to be used in the self-heating calculation.
Note 12: TUE , total unadjusted error, includes ADC gain, offset, linearity and reference errors. TUE is defined as the "actual Vin" to achieve a given code transition
minus the "theoretical Vin" for the same code. Therefore, a positive error indicates that the input voltage is greater than the theoretical input voltage for a given code.
If the theoretical input voltage was applied to an LM96000 that has positive error, the LM96000’s reading would be less than the theoretical.
Note 13: This specification is provided only to indicate how often temperature and voltage data is updated. The LM96000 can be read at any time without regard
to conversion state (and will yield last conversion result).
= 25˚C and represent most likely parametric norm.
A
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Note 14: Holding the SMBDAT and/or SMBCLK lines Low for a time interval greater than t
the SMBDAT pin to a high impedance state.
LM96000
Functional Description
will reset the LM96000’s SMBus state machine, therefore setting
TIMEOUT
1.0 SMBUS
The LM96000 is compatible with devices that are compliant to the SMBus 2.0 specification. More information on this bus can be
found at: http://www.smbus.org/. Compatibility of SMBus2.0 to other buses is discussed in the SMBus 2.0 specification.
1.1 Addressing
LM96000 is designed to be used primarily in desktop systems that require only one monitoring device.
If only one LM96000 is used on the motherboard, the designer should be sure that the Address Enable/PWM3 pin is High during
the first SMBus communication addressing the LM96000. Address Enable/PWM3 is an open drain I/O pin that at power-on
defaults to the input state of Address Enable. A maximum of 10k pull-up resistance on Address Enable/PWM3 is required to
assure that the SMBus address of the device will be locked at 010 1110b, which is the default address of the LM96000.
During the first SMBus communication TACH4 and PWM3 can be used to change the SMBus address of the LM96000 to
0101101b or 0101100b. LM96000 address selection procedure:
A10kΩ pull-down resistor to ground on the Address Enable/PWM3 pin is required. Upon power up, the LM96000 will be placed
into Address Enable mode and assign itself an SMBus address according to the state of the Address Select input. The
LM96000 will latch the address during the first valid SMBus transaction in which the first five bits of the targeted address match
those of the LM96000 address, 0 1011b. This feature eliminates the possibility of a glitch on the SMBus interfering with address
selection. When the PWM3/Address Enable pin is not used to change the SMBus address of the LM96000, it will remain in a
high state until the first communication with the LM96000. After the first SMBus transaction is completed PWM3 and TACH4 will
return to normal operation.
00Pulled to ground through a 10 kΩ resistor010 1100b, 2Ch
01Pulled to 3.3V or to GND through a 10 kΩ resistor010 1101b, 2Dh
1XPulled to 3.3V through a 10 kΩ resistor010 1110b, 2Eh
In this way, up to three LM96000 devices can exists on an SMBus at any time. Multiple LM96000 devices can be used to monitor
additional processors and temperature zones. When using the non-default addresses additional circuitry will be required if TACH4
and PWM3 require to function correctly. Such circuitry could consist of GPIO pins from a micro-controller. During the first
communication the micro-controller would drive the Address Enable and Address Select pins to the proper state for the required
address. After the first SMBus communication the micro-controller would drive it’s pins into TRISTATE allowing TACH4 and
PWM3 to operate correctly.
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2.0 FAN REGISTER DEVICE SET-UP
The BIOS will follow the following steps to configure the fan registers on the LM96000. The registers corresponding to each
function are listed. All steps may not be necessary if default values are acceptable. Regardless of all changes made by the BIOS
to the fan limit and parameter registers during configuration, the LM96000 will continue to operate based on default values until
the START bit (bit 0), in the Ready/Lock/Start/Override register (address 40h), is set. Once the fan mode is updated, by setting
the START bit to 1, the LM96000 will operate using the values that were set by the BIOS in the fan control limit and parameter
registers (adress 5Ch through 6Eh).
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Functional Description (Continued)
1. Set limits and parameters (not necessarily in this order):
– [5F-61h] Set PWM frequencies and auto fan control range.
– [62-63h] Set spike smoothing and min/off.
– [5C-5Eh] Set the fan spin-up delays.
– [5C-5Eh] Match each fan with a corresponding thermal zone.
– [67-69h] Set the fan temperature limits.
– [6A-6Ch] Set the temperature absolute limits.
– [64-66h] Set the PWM minimum duty cycle.
– [6D-6Eh] Set the temperature Hysteresis values.
2. [40h] Set bit 0 (START) to update fan control and limit register values and start fan control based on these new values.
3. [40h] Set bit 1 (LOCK) to lock the fan limit and parameter registers (optional).
3.0 AUTO FAN CONTROL OPERATING MODE
The LM96000 includes the circuitry for automatic fan control. In Auto Fan Mode, the LM96000 will automatically adjust the PWM
duty cycle of the PWM outputs. PWM outputs are assigned to a thermal zone based on the fan configuration registers. It is
possible to have more than one PWM output assigned to a thermal zone. For example, PWM outputs 2 and 3, connected to two
chassis fans, may both be controlled by thermal zone 2. At any time, the temperature of a zone exceeds its absolute limit, all PWM
outputs will go to 100% duty cycle to provide maximum cooling to the system.