Rainbow Electronics LM85 User Manual

LM85 Hardware Monitor with Integrated Fan Control

General Description

The LM85, hardware monitor, has a two wire digital interface compatible with SMBus 2.0. Using an 8-bit Σ∆ ADC, the LM85 measures:

– the temperature of two remote diode connected transis-

tors as well as its own die

– the V

nal scaling resistors). To set fan speed, the LM85 has three PWM outputs that are

each controlled by one of three temperature zones. The LM85 includes a digital filter that can be invoked to smooth temperature readings for better control of fan speed. The LM85 has four tachometer inputs to measure fan speed. Limit and status registers for all measured values are included.

, 2.5V, 3.3VSBY, 5.0V, and 12V supplies (inter-

CCP

Features

n 2-wire, SMBus 2.0 compliant, serial digital interface n 8-bit Σ∆ ADC n Monitors V

motherboard/processor supplies

n Monitors 2 remote thermal diodes n Programmable autonomous fan control based on

temperature readings

, 2.5V, 3.3 VSBY, 5.0V, and 12V

CCP

n Noise filtering of temperature reading for fan control n 1.0˚C digital temperature sensor resolution n 3 PWM fan speed control outputs n 4 fan tachometer inputs n Monitors 5 VID control lines n 24-pin QSOP package n XOR-tree test mode

Key Specifications

n Voltage Measurement Accuracy n Resolution 8-bits, 1˚C n Temperature Sensor Accuracy n Temperature Range

— LM85 Operational 0˚C to +85˚C — Remote Temp Accuracy 0˚C to +125˚C

n Power Supply Voltage +3.0V to +3.6V n Power Supply Current 0.53 mA

Applications

n Desktop PC n Microprocessor based equipment

(e.g. Base-stations, Routers, ATMs, Point of Sales)

March 2003

2% FS (max)

3˚C (max)

LM85 Hardware Monitor with Integrated Fan Control

Block Diagram

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Connection Diagram

LM85

24 Pin QSOP

NS Package MQA24

Top View

LM85BIMQ or LM85CIMQ (55 units per rail), or

LM85BIMQX or LM85CIMQX (2500 units per tape and reel)

Information on the differences between the LM85BIMQ and LM85CIMQ can be found in Section 6.0. It is highly recommended that all new designs use the LM85BIMQ.

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Pin Descriptions

Symbol Pin Typ Name and Function/Connection

SMBus

VID Lines

Processor

Power

Inputs

Voltage

SMBDAT 1 Digital I/O

(Open-Drain)

SMBCLK 2 Digital Input System Management Bus Clock. Tied to Open-drain output. 5V

VID0 5 Digital Input Voltage identification signal from the processor. This value is read

VID1 6 Digital Input Voltage identification signal from the processor. This value is read

VID2 7 Digital Input Voltage identification signal from the processor. This value is read

VID3 8 Digital Input Voltage identification signal from the processor. This value is read

VID4 19 Digital Input Voltage identification signal from the processor. This value is read

3.3V 4 POWER +3.3V pin. Can be powered by +3.3V Standby power if monitoring

GND 3 GROUND Ground for all analog and digital circuitry.

5V 20 Analog Input Analog input for +5V monitoring.

12V 21 Analog Input Analog input for +12V monitoring.

2.5V 22 Analog Input Analog input for +2.5V monitoring.

CCP

23 Analog Input Analog input for +V

System Management Bus Data. Open-drain output. 5V tolerant, SMBus 2.0 compliant.

tolerant, SMBus 2.0 compliant.

in the VID0– VID4 Status Register.

in low power states is required. This pin also serves as the analog input to monitor the 3.3V supply. This pin should be bypassed with a 0.1µf capacitor in parallel with 100pf. A bulk capacitance of approximately 10µf needs to be in the near vicinity of the LM85.

(processor voltage) monitoring.

CCP

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Pin Descriptions (Continued)

Symbol Pin Typ Name and Function/Connection

Remote1+ 18 Remote Thermal

Remote1− 17 Remote Thermal

Remote

Fan

Inputs

Tachometer

Fan

Control

Remote2+ 16 Remote Thermal

Remote2− 15 Remote Thermal

TACH1 11 Digital Input Input for monitoring tachometer output of fan 1.

TACH2 12 Digital Input Input for monitoring tachometer output of fan 2.

TACH3 9 Digital Input Input for monitoring tachometer output of fan 3.

TACH4/Address

Select

PWM1/xTest

Out

PWM2 10 Digital Open-Drain

PWM3/Address

Enable

14 Digital Input Input for monitoring tachometer output of fan 4. If in Address

24 Digital Open-Drain

13 Digital Open-Drain

Diode Positive

Input

Diode Negative

Input

Diode Positive

Output

Diode Negative

Input

Output

LM85

Positive input (current source) from the first remote thermal diode. Serves as the positive input into the A/D. Connected to THERMDA pin of Pentium processor or the base of a diode connected MMBT3904 NPN transistor.

Negative input (current sink) from the first remote thermal diode. Serves as the negative input into the A/D. Connected to THERMDC pin of Pentium processor or the emmiter of a diode connected MMBT3904 NPN transistor.

Select Mode, determines the SMBus address of the LM85.

Fan speed control 1. When in XOR tree test mode, functions as XOR Tree output.

Fan speed control 2.

Fan speed control 3. Pull to ground at power on to enable Address Select Mode (Address Select pin controls SMBus address of the device).

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Absolute Maximum Ratings (Notes 1,

LM85

If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/

Machine Model 250V

Soldering Temperature, Infrared,

10 seconds (Note 6)

Storage Temperature −65˚C to +150˚C

Distributors for availability and specifications.

Supply Voltage, V+ −0.5V to 6.0V

Voltage on Any Digital Input or

−0.5V to 6.0V

Output Pin

Voltage on 12V Analog Input −0.5V to 16V

Voltage on 5V Analog Input −0.5V to 6.66V

Voltage on Remote1+, Remote2+, −0.5V to (V+ + 0.05V)

Current on Remote1−, Remote2−

1mA

Voltage on Other Analog Inputs −0.5V to 6.0V

Input Current on Any Pin (Note 3)

Package Input Current (Note 3)

Package Dissipation at T

= 25˚C See (Note 5)

5mA

20 mA

ESD Susceptibility (Note 4)

Operating Ratings (Notes 1, 2)

LM85 Operating Temperature Range 0˚C ≤ T

Remote Diode Temperature Range 0˚C ≤ T

Supply Voltage (3.3V nominal) +3.0V to +3.6V

Voltage Range

+12V V

+5V V

+3.3V V

and All Other Inputs −0.05V to (V+ + 0.05V)

CCP

−0.05V to 6.66V

VID0–VID4 −0.05V to 5.5V

Typical Supply Current 0.53 mA

≤ +85˚C

≤ +125˚C

−0.05V to 16V

3.0V to 4.4V

Human Body Model 2500V

DC Electrical Characteristics

The following specifications apply for V+ = 3.0V to 3.6V, and all analog input source impedance RS=50Ω unless otherwise specified in conditions. Boldface limits apply for T

A=TMIN

to T

Symbol Parameter Conditions Typical

POWER SUPPLY CHARACTERISTICS

Supply Current (Note 9) Converting, Interface and

Power-On Reset Threshold Voltage 1.6 V (min)

TEMPERATURE TO DIGITAL CONVERTER CHARACTERISTICS

Resolution 1

Temperature Accuracy (See (Note 10) for Thermal Diode Processor Type)

Temperature Accuracy using Internal Diode (Note

11)

External Diode Current Source High Level 188 280 µA (max)

External Diode Current Ratio 16

ANALOG TO DIGITAL CONVERTER CHARACTERISTICS

TUE Total Unadjusted Error(Note 12) LM85CIMQ -0.5/+3.5 %FS (max)

LM85BIMQ

DNL Differential Non-linearity 1 LSB

Power Supply Sensitivity

Total Monitoring Cycle Time (Note 13) All Voltage and

; all other limits TA= 25˚C.

MAX

Limits

(Note 7)

(Note 8)

1.8 3.5 mA (max)

Fans Inactive, Peak Current

Converting, Interface and

0.53 mA Fans Inactive, Average Current

2.8 V (max)

At 25˚C

0˚C to 100˚C

100˚C to 125˚C

0˚C to 85˚C

2.5 ˚C (max)

3 ˚C (max)

4 ˚C (max)

3 ˚C (max)

Low Level 11.75 µA

2 %FS

1 %/V

182 200 ms (max)

Temperature readings

235˚C

Units

(Limits)

˚C

Bits

(max)

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DC Electrical Characteristics (Continued)

The following specifications apply for V+ = 3.0V to 3.6V, and all analog input source impedance RS=50Ω unless otherwise specified in conditions. Boldface limits apply for T

A=TMIN

to T

Symbol Parameter Conditions Typical

Input Resistance, all analog inputs 210 140 kΩ (min)

DIGITAL OUTPUT: PWM1, PWM2, PWM3, XTESTOUT

Logic Low Sink Current LM85CIMQ VOL=0.55V 8 mA (min)

LM85BIMQ V

Logic Low Level LM85CIMQ I

LM85BIMQ I

SMBUS OPEN-DRAIN OUTPUT: SMBDAT

Logic Low Output Voltage I

High Level Output Current V

SMBUS INPUTS: SMBCLK. SMBDAT

HYST

Logic Input High Voltage 2.1 V (min)

Logic Input Low Voltage 0.8 V (max)

Logic Input Hysteresis Voltage 300 mV

DIGITAL INPUTS: ALL

Logic Input High Voltage 2.1 V (min)

Logic Input Low Voltage 0.8 V (max)

Logic Input Threshold Voltage 1.5 V

Logic High Input Current VIN= V+ 0.005 10 µA (max)

Logic Low Input Current VIN= GND −0.005 −10 µA (max)

Digital Input Capacitance 20 pF

; all other limits TA= 25˚C.

MAX

Limits

(Note 7)

(Note 8)

400 kΩ (max)

=0.4V 8 mA (min)

=+3mA 0.4 V (max)

OUT

=+8mA 0.55 V (max)

OUT

=+8mA 0.4 V (max)

OUT

=+4mA 0.4V V (max)

OUT

= V+ 0.1 10 µA (max)

OUT

LM85

Units

(Limits)

AC Electrical Characteristics

The following specifications apply for V+ = 3.0V to 3.6V unless otherwise specified in conditions. Boldface limits apply for T =T

to T

MIN

Symbol Parameter Conditions Typical

TACHOMETER ACCURACY

FAN PWM OUTPUT

SPIKE SMOOTHING FILTER

; all other limits TA= 25˚C.

MAX

Limits

(Note 7)

Fan Count Accuracy

(Note 8)

10 % (max)

(Limits)

Fan Full-Scale Count 65536 (max)

Fan Counter Clock Frequency 90 kHz

Fan Count Conversion Time 0.7 1.4 sec (max)

Frequency Setting Accuracy

10 % (max)

Frequency Range 10

Duty-Cycle Range 0to100 % (max)

Duty-Cycle Resolution (8-bits) 0.390625 %

Spin-Up Time Interval Range 100

4000

Spin-Up Time Interval Accuracy

Time Interval Deviation

10 % (max)

Time Interval Range 35

0.8

Units

Hz Hz

ms ms

sec sec

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AC Electrical Characteristics (Continued)

LM85

The following specifications apply for V+ = 3.0V to 3.6V unless otherwise specified in conditions. Boldface limits apply for T =T

to T

MIN

Symbol Parameter Conditions Typical

; all other limits TA= 25˚C.

MAX

(Note 7)

Limits

(Note 8)

SMBUS TIMING CHARACTERISTICS

SMB

SMBus Operating Frequency 10

100

BUF

SMBus Free Time Between Stop And

4.7 µs (min)

Start Condition

HD_STA

Hold Time After (Repeated) Start

4.0 µs (min)

Condition (after this period, the first clock is generated)

SU:STA

SU:STO

HD:DAT

Repeated Start Condition Setup Time 4.7 µs (min)

Stop Condition Setup Time 4.0 µs (min)

Data Output Hold Time 300 ns (min)

930 ns (max)

SU:DAT

TIMEOUT

LOW

HIGH

Data Input Setup Time 250 ns (min)

Data And Clock Low Time To Reset Of SMBus Interface Logic(Note 14)

25 35

Clock Low Period 4.7 µs (min)

Clock High Period 4.0

POR

Clock/Data Fall Time 300 ns (max)

Clock/Data Rise Time 1000 ns (max)

Time from Power-On-Reset to LM85

V+>2.8V 500 ms (max)

Reset and Operational

Units

(Limits)

kHz (min)

kHz (max)

ms (min)

ms (max)

µs (min)

µs (max)

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Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics. The guaranteed specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test conditions.

Note 2: All voltages are measured with respect to GND, unless otherwise noted.

Note 3: When the input voltage (V

maximum package input current rating limits the number of pins that can safely exceed the power supplies with an input current of 5mA to four.

Note 4: Human body model, 100pF discharged through a 1.5kΩ resistor. Machine model, 200pF discharged directly into each pin.

Note 5: Thermal resistance junction-to-ambient when attached to a printed circuit board with 2 oz. foil is 125˚C/W.

Note 6: See the URL ”http://www.national.com/packaging/“ for other recommendations and methods of soldering surface mount devices.

Note 7: Typicals are at T

Note 8: Limits are guaranteed to National’s AOQL (Average Outgoing Quality Level).

Note 9: The average current can be calculated from the peak current using the following equation:

Quiescent current will not increase substantially with an SMBus transaction.

Note 10: The accuracy of the LM85CIMQAis guaranteed when using the thermal diode of Intel Pentium 4 processors in 423 pin or 478 pin packages or any thermal diode with a typical non-ideality factor of 1.0045. The accuracy of the LM85BIMQA is guaranteed when using the thermal diode of an Intel Pentium 4 processors or any thermal diode with a typical non-ideality of 1.0021 and series resistance of 3.64Ω or 3.86Ω. When using a 2N3904 type transistor as a thermal diode the error band will be typically shifted by -1˚C.

Note 11: Local temperature accuracy does not include the effects of self-heating. The rise in temperature due to self-heating is the product of the internal power dissipation of the LM85 and the thermal resistance. See (Note 5) for the thermal resistance to be used in the self-heating calculation.

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) at any pin exceeds the power supplies (V

= 25˚C and represent most likely parametric norm.

GND or V

V+ ), the current at that pin should be limited to 5mA. The 20mA

Note 12: TUE , total unadjusted error, includes ADC gain, offset, linearity and reference errors. TUE is defined as the "actual Vin" to achieve a given code transition minus the "theoretical Vin" for the same code. Therefore, a positive error indicates that the input voltage is greater than the theoretical input voltage for a given code. If the theoretical input voltage was applied to an LM85 that has positive error, the LM85’s reading would be less than the theoretical.

Note 13: This specification is provided only to indicate how often temperature and voltage data is updated. The LM85 can be read at any time without regard to conversion state (and will yield last conversion result).

Note 14: Holding the SMBDAT and/or SMBCLK lines Low for a time interval greater than t SMBDAT pin to a high impedance state.

will reset the LM85’s SMBus state machine, therefore setting the

TIMEOUT

Functional Description

1.0 SMBUS

The LM85 is compatible with devices that are compliant to the SMBus 2.0 specification. More information on this bus can be found at: http://www.smbus.org/. Compatibility of SMBus2.0 to other buses is discuss in the SMBus 2.0 specification.

1.1 Addressing

LM85 is designed to be used primarily in desktop systems that require only one monitoring device. If only one LM85 is used on the motherboard, the designer should be sure that the Address Enable/PWM3 pin is High during the

first SMBus communication addressing the LM85. Address Enable/PWM3 is an open drain I/O pin that at power-on defaults to the input state. A maximum of 10k pull-up resistance is required to assure that the SMBus address of the device will be locked at 010 1110b, which is the default address of the LM85.

During the first SMBus communication TACH4 and PWM3 can be used to change the SMBus address of the LM85. to 0101101b or 0101100b. LM85 address selection procedure:

A10kΩ pull-down resistor to ground on the Address Enable/PWM3 pin is required. Upon power up, the LM85 will be placed into Address Enable mode and assign itself an SMBus address according to the state of the Address Select input. The LM85 will latch the address during the first valid SMBus transaction in which the first five bits of the targeted address match those of the LM85 address, 0 1011b. This feature eliminates the possibility of a glitch on the SMBus interfering with address selection. When the PWM3/Address Enable pin is not used to change the SMBus address of the LM85, it will remain in a high state until the first communication with the LM85. After the first SMBus transaction is completed PWM3 and TACH4 will return to normal operation.

Address Enable Address Select Board Implementation SMBus Address

0 0 Pulled to ground through a 10 kΩ resistor 010 1100b, 2Ch

0 1 Pulled to 3.3V or ground through a 10 kΩ resistor 010 1101b, 2Dh

1 X Pulled to 3.3V through a 10kΩ resistor 010 1110b, 2Eh

LM85

In this way, up to three LM85 devices can exists on an SMBus at any time. Multiple LM85 devices can be used to monitor additional processors and temperature zones.

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2.0 FAN REGISTER DEVICE SET-UP

The BIOS will follow the following steps to configure the fan registers on the LM85. The registers corresponding to each function are listed. All steps may not be necessary if default values are acceptable. Regardless of all changes made by the BIOS to the fan limit and parameter registers during configuration, the LM85 will continue to operate based on default values until the START bit (bit 0), in the Ready/Lock/Start/Override register (address 40h), is set. Once the fan mode is updated, by setting the START bit to 1, the LM85 will operate using the values that were set by the BIOS in the fan control limit and parameter registers (adress 5Ch through 6Eh).

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Functional Description (Continued)

LM85

1. Set limits and parameters (not necessarily in this order): – [5F-61h] Set PWM frequencies and auto fan control range. – [62-63h] Set spike smoothing and min/off. – [5C-5Eh] Set the fan spin-up delays. – [5C-5Eh] Match each fan with a corresponding thermal zone. – [67-69h] Set the fan temperature limits. – [6A-6Ch] Set the temperature absolute limits. – [64-66h] Set the PWM minimum duty cycle. – [6D-6Eh] Set the temperature Hysteresis values.

2. [40h] Set bit 0 (START) to update fan control and limit register values and start fan control based on these new values.

3. [40h] Set bit 1 (LOCK) to lock the fan limit and parameter registers (optional).

3.0 AUTO FAN CONTROL OPERATING MODE

The LM85 includes the circuitry for automatic fan control. In Auto Fan Mode, the LM85 will automatically adjust the PWM duty cycle of the PWM outputs. PWM outputs are assigned to a thermal zone based on the fan configuration registers. It is possible to have more than one PWM output assigned to a thermal zone. For example, PWM outputs 2 and 3, connected to two chassis fans, may both be controlled by thermal zone 2. At any time, the temperature of a zone exceeds its absolute limit, all PWM outputs will go to 100% duty cycle to provide maximum cooling to the system.

4.0 REGISTER SET

Read/ Write

Bit 7

(MSB)

Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0

(LSB)

Default

Value

20h R 2.5V 7 6 5 4 3 2 1 0 N/A

21h R V

CCP

7 6 5 4 3 2 1 0 N/A

22h R 3.3V 7 6 5 4 3 2 1 0 N/A

23h R 5V 7 6 5 4 3 2 1 0 N/A

24h R 12V 7 6 5 4 3 2 1 0 N/A

25h R Processor (Zone1) Temp 7 6 5 4 3 2 1 0 N/A

26h R Internal (Zone2) Temp 7 6 5 4 3 2 1 0 N/A

27h R Remote (Zone3) Temp 7 6 5 4 3 2 1 0 N/A

28h R Tach1 LSB 7 6 5 4 3 2 LEVEL1 LEVEL0 N/A

29h R Tach1 MSB 15 14 13 12 11 10 9 8 N/A

2Ah R Tach2 LSB 7 6 5 4 3 2 LEVEL1 LEVEL0 N/A

2Bh R Tach2 MSB 15 14 13 12 11 10 9 8 N/A

2Ch R Tach3 LSB 7 6 5 4 3 2 LEVEL1 LEVEL0 N/A

2Dh R Tach3 MSB 15 14 13 12 11 10 9 8 N/A

2Eh R Tach4 LSB 7 6 5 4 3 2 LEVEL1 LEVEL0 N/A

2Fh R Tach4 MSB 15 14 13 12 11 10 9 8 N/A

30h R/W Fan1 Current PWM Duty 7 6 5 4 3 2 1 0 N/A

31h R/W Fan2 Current PWM Duty 7 6 5 4 3 2 1 0 N/A

32h R/W Fan3 Current PWM Duty 7 6 5 4 3 2 1 0 N/A

3Eh R Company ID 7 6 5 4 3 2 1 0 01h

3Fh R Version/Stepping VER3 VER2 VER1 VER0 STP3 STP2 STP1 STP0 60h

40h R/W Ready/Lock/Start/Override RES RES RES RES OVRID READY LOCK START 00h

41h R Interrupt Status Register 1 ERR ZN3 ZN2 ZN1 5V 3.3V V

CCP

2.5V 00h

42h R Interrupt Status Register 2 ERR2 ERR1 FAN4 FAN3 FAN2 FAN1 RES 12V 00h

43h R VID0–4 RES RES RES VID4 VID3 VID2 VID1 VID0 N/A

44h R/W 2.5V Low Limit 7 6 5 4 3 2 1 0 00h

45h R/W 2.5V High Limit 7 6 5 4 3 2 1 0 FFh

46h R/W V

47h R/W V

Low Limit 7 6 5 4 3 2 1 0 00h

CCP

High Limit 7 6 5 4 3 2 1 0 FFh

CCP

48h R/W 3.3V Low Limit 7 6 5 4 3 2 1 0 00h

Lock?

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