Rainbow Electronics ISD4004 User Manual
Single-Chip Voice Record/Playback Devices
8-, 10-, 12-, and 16-Minute Durations
GENERAL DESCRIPTION
The ISD4004 ChipCorder
quality, 3-volt, single-chip record/playback solutions for 8- to 16-minute m essaging appli cations
which are ideal fo r cellular phone s an d other portable products. The CMOS-based devic es include
an on-chip oscillator, antialiasing filter, smoothing
filter, AutoMute™ feature, audio amplifier, and
high density, multilevel Flash storage array. The
ISD4004 series is designed to be used in a microprocessor- or microcontroller-based system. Address and control are accomplished through a
Serial Peripheral Interface (SPI) or Microwire Serial
Interface to minimize pin count.
®
Products provide high-
ISD4004 Series
Recordings are stored in on-chip nonvolatile
memory cells, providing zero-power message
storage. This unique, single-chip solution is made
possible through ISD’s patent ed multilevel storage
technology. Voice and audio signals are stored
directly into memory in their natural form, providing
high-qualit y, solid-state voic e reproduction.
Figure: ISD4004 Series Block Diagram
August 2000
ISD/Winbond · 2727 North First Street, San Jose, CA 95134 · TEL: 408/943-6666 · FAX: 408/544-1787 · http://www.isd.com
ISD4004 Series
FEATURES
• Single-chip voice record/playback solution
• Single +3 volt supply
• Low-power consu m ption
– Operating current:
Play = 15 mA (typical)
I
CC
I
Rec = 25 mA (typical)
CC
– Standby current: 1 µA (typical)
• Single-chip duratio ns of 8, 10, 12, and
16 minutes
• High-quality, natural voice/au dio reproduction
• AutoMute feature pr o vid es background noise
attenuation during peri od s of sil ence
• No algorithm development required
• Microcontroller SPI or Microwire™ Serial
Interface
Table: ISD4004 Series Summary
• Fully addressable to han dle multiple
messages
• Nonvolatile message storage
• Power consumption controlled by SPI
or Microwire control register
• 100-year message retention (typical)
• 100K record cycles (typical)
• On-chip clock source
• Available in die form, PDIP, SOIC, and TSOP
• Extended temper atur e (–20° C to +7 0°C) and
industrial temperature (–40°C to +85°C)
versions available
Part
Number
ISD4004-08M 8.0 8.0 3.4
ISD4004-10M 10.0 6.4 2.7
ISD4004-12M 12.0 5.3 2.3
ISD4004-16M 16.0 4.0 1.7
Duration
(minutes)
Input Sample
Rate (KHz)
Typical Filter Pass
Band (KHz)
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Voice Solutions in Silicon
™
Table of Contents
DETAILED DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Speech/Sound Quality . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Duration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Flash Storage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Microcontroller Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1
Programming . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
PIN DESCRIPTIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Voltage Inputs (V
Ground Inputs (V
Non-Inverting Analog Input (ANA IN+) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Inverting Analog Input (ANA IN–) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Audio Output (AUD OUT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Slave Select (S S
Master Out Slave In (MOSI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Master In Slave Out (MISO) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Serial Clock (SCLK) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3
Interrupt (INT
Row Address Clock (RAC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
External Clock Input (XCLK) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
AutoMute™ Feature (AM CAP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4
) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
, V
CCA
, V
SSA
) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
CCD
) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1
SSD
SERIAL PERIPHERAL INTERFACE (SPI) DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Message Cueing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Power-Up Sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
SPI Port . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7
SPI Control Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
TIMING DIAGRAMS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
DEVICE PHYSICAL DIMENSIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
ORDERING INFORMATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
ISD
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ISD4004 Series
FIGURES, CHARTS, AND TABLES IN THE ISD4004 SERIES DATA SHEET
Figure 1: ISD4004 Series TSOP and PDIP/SOIC Pinouts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Figure 2: ISD4004 Series ANA IN Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Figure 3: SPI Po rt . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Figure 4: SPI Inter face Simplif ied Bloc k Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Figure 5: Timin g Diag ram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 6: 8-Bit Command Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 7: 24-Bit Command Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 8: Pl ayback/Record and Stop Cycle . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 9: Applicat ion Example Using SPI. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 10: Application Example Using Microwire . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 11: Application Example Using SPI Port on Microcontroller . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 12: 28-Lead 8x13.4 mm Plastic Thin Small Outline Package (TSOP) Type I (E) . . . . . . . . 18
Figure 13: 28-Lead 0.600-Inch Plastic Dual Inline Package (PDIP) (P) . . . . . . . . . . . . . . . . . . . . 19
Figure 14: 28-Lead 0.300-Inch Plastic Small Outline Integrated Circuit (SOIC) (S) . . . . . . . . . . . 20
Figure 15: ISD4004 Series Bonding Physical Layout (Unpackaged Die) . . . . . . . . . . . . . . . . . . . 21
Table 1: External Clock Input Clocking Table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Table 2: Opcode Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Table 3: SPI Control Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Table 4: Absolute Maximum Ratings (Packaged Parts) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 5: Operating Conditions (Packaged Parts) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 6: DC Parameters (Packaged Parts) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 7: AC Parameters (Packaged Parts) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 8: Absolute Maximum Ratings (Die) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Table 9: Operating Conditions (Die) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Table 10: DC Parameters (Die) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Table 11: AC Parameters (Die) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Table 12: SPI AC Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Table 13: Plastic Thin Small Outline Package (TSOP) Type I (E) Dimensions . . . . . . . . . . . . . . . . 18
Table 14: Plastic Dual Inline Package (PDIP) (P ) Dime nsions . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Table 15: Plastic Small Outline Integrated Circ uit (SOIC) (S) Dimensions . . . . . . . . . . . . . . . . . . 20
Table 16: ISD4004 Serie s Devic e Pin/Pad Designations, with Respect to Die Cent er (µm) . . . . 22
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Voice Solutions in Silicon™
ISD4004 Series
DETAILED DESCRIPTION
SPEECH/SOUND QUALITY
The ISD4004 ChipCorder series includes devices
offered at 4.0, 5.3, 6.4, and 8.0 KHz sampling f requencies, allowin g the user a choice of speech
quality options. Increasing the duration within a
product series decreases the sampling frequency
and bandwidth, which affects sound quality.
Please refer to the ISD4004 Ser ies Pro duct Summary
table on the second page to compare filter pass
band and product durations.
The speech samples ar e stored directly into on-chip
nonvolatile memory without the digitization and
compression associated with other solutions. Direct analog stor age provides a natural sounding
reproduction of voice, music, tones, and sound
effects not available with most solid-state solutions.
DURATION
To meet end system requirements, the ISD4004 series products are single-chip solutions at 8, 10, 12,
16 minutes.
FLASH STORAGE
One of the benefits of ISD’s ChipCorder technology
is the use of on-chip nonvolatile memory, which provides zero-power message storage. The message
is retained for up to 100 years (typically) without
power. In addition, the device can be re-recorded (typically) over 100,000 times.
MICROCONTROLLER INTERFACE
A four-wire (SCLK, MOSI, MISO, SS) SPI interface is
provided for ISD4004 control and addressing
functions. The ISD4004 is configured to operate as
a peripheral slave device, with a microcontrollerbased SPI bus interface. Read/Write access to all
the internal reg isters occurs through this SPI interface. An interrupt signal (INT
only Status Register are provided for handshake
purposes.
) and internal read-
PROGRAMMING
The ISD4004 series is also ideal for playback-only
applications, where single or multiple message
Playback is controlled through the SPI port. Once
the desired message configuration is created, duplicates can easily be generated via an ISD programmer.
PIN DESCRIPTIONS
VOLTAGE INPUTS (V
To minimize noise, the analog and digital circuits
in the ISD4004 devices use separate power busses.
These +3 V busses are brought out to separate
pins and should be tied together as close to the
supply as possible. In addition, these supplies
should be decoupled as close to the package as
possible.
GROUND INPUTS (V
The ISD4004 series utilizes separate analog and
digital ground busses. The analog ground (V
pins should be tied together as close to the package as possible and connected through a lowimpedance path to power supply ground. The
digital ground (V
through a separate low -imp edance path t o pow er supply ground. Th ese ground paths should b e
large enough to en sure that the impedanc e between the V
3 W. The backside of the die is connected to V
through the substrate resistance. In a chip-onboard design, the die attach area must be connected to V
SSA
or left floating.
SS
, V
CCA
SSA
SSD
pins and the V
)
CCD
, V
)
SSD
) pin should be connected
pin is less than
SSD
SSA
SS
)
ISD
1
ISD4004 Series
Figure 1: ISD4004 Series TSOP and PDIP/SOIC Pinouts
ISD4004
ISD4004
28-PIN TSOP
Figure 2: ISD4004 Series ANA IN Modes
PDIP/SOIC
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Voice Solutions in Silicon
™
ISD4004 Series
NON-INVERTING ANALOG INPUT (ANA IN+)
This pin is the non-inverting ana log input that transfers the signal to the device for recording. The analog input amplifier can be dr iven single ended or
differentially. In the single-ended input mode, a
32 mVp-p (peak-to-peak) maximum sign al sh ou ld
be capacitively conn ect ed t o this pin for opt im al
signal quality. This capacitor value, together with
the 3 KW input impedance of AN A IN+, is selected
to give cutoff at the low frequency end of the
voice passband. In the differential-input mode,
the maximum input signal at ANA IN+ should be
16 mVp-p for optimal signal quality. The circuit
connections for the two modes a re shown in Figure 2 on page 2.
INVERTING ANALOG INPUT (ANA IN–)
This pin is the inverting analog input that transfers
the signal to the device for recording in the differential-input mode. In this differential-input mode,
a 16 mVp-p maximum input signal at ANA IN–
should be capacitively coupled to this pin for optimal signal quality as shown in the ISD4004 Series
ANA IN Modes, Figure 2. This capacitor value
should be equal to the coupling capacitor used
on the ANA IN+ pin. The input impedance at ANA IN–
is nominally 56 KW. In the single-ended mode, ANA
IN– should be capacitively coupled to V
SSA
through a capacitor equal to that used on the
ANA IN+ input.
AUDIO OUTPUT (AUD OUT)
This pin provides the audio output to the user.
It is capable of driving a 5 KW impedance. It is
recommended that this pin be AC coupled.
NOTE The AUDOUT pin is always at 1.2 volts when
the device is powered up. When in playback, the output buffer connected to this
pin can drive a load as small as 5 K
When in record, a resistor c onnects AUDOUT to the internal 1.2 volt analog ground
supply. This resistor is approximately
W, but will vary somewhat according
850 K
to the sample rate of the device. This relatively high impedance allows this pin to
be connected to an audio bus without
loading it down.
W.
SLAVE SELECT (SS)
This input, when LOW, will select the ISD4004
device.
MASTER OUT SLAVE IN (MOSI)
This is the serial input to the ISD4004 device. The
master microcontroller places data on the MOSI
line one half-cycle before the rising clock edge to
be clocked in by the ISD4004 device.
MASTER IN SLAVE OUT (MISO)
This is the serial outp ut of th e ISD400 4 de vice . This
output goes into a high-impedance state if the
device is not selecte d .
SERIAL CLOCK (SCLK)
This is the clock input to the ISD4004. It is generated by the master device (microcontroller) and is
used to synchronize data transfers in and out of
the device through the MISO an d MOSI lines. Dat a
is latched into the IS D4004 on the rising edge of
SCLK and shif ted out of the de vice on the f alling
edge of SCLK.
INTERRUPT (INT)
The ISD4004 interrupt pin goes LOW and stays LOW
when an Overflow (OVF) or End of Message (EOM)
marker is detected. This is an open drain output
pin. Each operati on that ends in an EOM or Ov er flow will generate an interrupt includin g the message cueing cycles. T he interrupt will b e cleared
the next time an SPI cycle is initiated. The interrupt
status can be read by an RINT instruction.
Overflow Flag (OVF)—The Overflow flag indicates that the end of the IS D4004 ’s ana log me mory has been reached during a record or
playback operation.
End of Message (EOM)—The End-of-Message
flag is set only during playback operation whe n an
EOM is found. There are eight EOM flag position
options per row.
ISD
3
ISD4004 Series
ROW ADDRESS CLOCK (RAC)
This is an open dr ain output pin t hat provides a s ignal with a 200 ms pe riod at the 8 KHz sampling fr equency. (This represents a single row of memory
and there are 2400 rows o f memory in the I SD4004
series devices.) This signal stays HIGH for 175 ms
and stays LOW for 25 ms when it reaches the end
of a row.
The RAC pin stays HIGH for 109.38 msec and stays
LOW for 15.63 msec in Message Cueing mode
(see page 5 for a more detailed description of
Message Cueing). Refer to the AC Parameters table for RAC timing information on other sample
rate products.
When a record command is first initiated, the RAC
pin remains HIGH for an extr a T
period. This is
RACLO
due to the need to load sample and hold circui ts
internal to the device. This pin can be used for
message management techni ques.
EXTERNAL CLOCK INPUT (XCLK)
The external cl ock input for t he ISD4004 pr oducts
has an internal pull-down device. These products
are configured at the factory with an internal sampling clock frequency centered to ±1 percen t of
specification. The frequency is then maintained to
a variation ov er the enti re commerc ial tempera ture and operating voltage ranges as defined by
the minimum/maximum limits in the applicable
AC Parameters table. The internal clock has a tolerance, over the extended temperature, industrial
te mp e ra tu r e a nd vo ltag e ran ges as def ined by the
minimum/maximum limits in the applicable AC
Parameters table. A regulated power supply is
recommended for industrial temperature range
parts. If greater precision is required, the device
can be clocked through the XCLK pin in Table 1.
Table 1: External Clock Input Clocking
Tabl e
Part Number Sample Rate Required Clock
ISD4004-08M 8.0 KHz 1024 KHz
ISD4004-10M 6.4 KHz 819.2 KHz
ISD4004-12M 5.3 KHz 682.7 KHz
ISD4004-16M 4.0 KHz 512 KHz
These recommended clock rates should not be
varied because the antialiasing and smoothing filters
are fixed. Thus, aliasing problems can occur if the
sample rate d iff er s f rom the o ne re comme nd ed.
The duty cycle on the input clo ck i s not critical, as
the clock is immediately divided by two internal l y.
If the XCLK is not used, this input should be
connected to ground.
AUTOMUTE™ FEATURE (AM CAP)
This pin is used in controlling the AutoMute feature.
The AutoMute feature attenuates the signal when
it drops below an internally set threshold. This helps
to eliminate noise (with 6 dB of attenuation) when
there is no signal (i.e., during periods of silence). A
1 mF capacitor to ground should be connected to
the AM CAP pin. Thi s capacitor b ecomes a pa rt of
an internal peak detector which senses the signal
amplitude (peak). This peak level is compared to
an internally set threshold to determine the AutoMute trip point . For larg e si gnals t he A utoMu te attenuation is set to 0 dB while 6 dB of attenuation
occurs for silence. The 1 mF capacitor al so affe ct s
the rate at which the AutoMute feature changes
with the signal amplitude (or the attack time). The
Automute feature c an be disabled by connecting
the AM CAP pin to V
CCA
.
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Voice Solutions in Silicon
™
SERIAL PERIPHERAL INTERFACE (SPI) DESCRIPTION
ISD4004 Series
The ISD4004 series operates from an SPI serial interface. The SPI interface operates with the following
protocol.
The data tra nsfer protocol assumes that the microcontroller’s SPI shift registers are clocked on the
falling edge of the SCLK. With the ISD4004, data is
clocked in on the MOSI pin on the rising clock
edge. Data is clocked out on the MISO pin on the
falling clock edge.
1. All serial data transfers begin with the fa lling
edge of SS
is held LOW during all serial communica-
2. SS
tions and held HIGH between instructions.
3. Data is clocked in on the rising clock edge
and data is clocked out on the falling clo ck
edge.
4. Play and Record oper ations are initi ated by
enabling the device by as serti ng the SS
LOW, shifting in an opcode and an address
field to the ISD4004 device (refer to the Opcode Summary on the page 6).
pin.
pin
read interrupt data and start a new operation within the same SPI cycle.
8. An operation begins with the RUN bit set
and ends with the RUN bit reset.
9. All operations begin with the rising edge
of SS
.
MESSAGE CUEING
Message cueing allows the user to skip through
messages, without k nowing the actu al physical lo cation of the message. This operation is used during playback. In this mode, the messages are
skipped 1600 times faster than in normal playback mode. It will stop when an EOM marker is
reached. Then, the internal address counter will
point to the next message.
5. The opcodes and address fields are as follows: <8 control bits> and <16 address
bits>.
6. Each operation that ends in an EOM or
Overflow will generate a n interrup t, includ ing the Message Cuein g cycles. The Inte rrupt will be cleared the next time an SPI
cycle is initiated.
7. As Interrupt data is shifted out of the
ISD4004 MISO pin, control and address
data is simultaneously being shifted into
the MOSI pin. Care should be taken such
that the data shifted in is comp atible with
current system operation. It is possible to
ISD
5
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