12 ORDERING INFORMATION ...................................................................................................... 17
13 REVISION HISTORY .................................................................................................................. 18
Publication Release Feb 9, 2010
- 2 - Revision 0.51
ISD2100 DATASHEET
GENERAL DESCRIPTION
1
The ISD2100 is a digital ChipCorder® featuring digital de-compression, comprehensive memory
management, flash storage, and integrated digital audio signal paths. This family utilizes flash
memory to provide non-volatile audio playback with duration up to 30 seconds (based on 8kHz/4bit
ADPCM) for a single-chip solution.
Unlike the MLS ChipCorder series, this device provides higher sampling frequency and a signal path
with SNR equivalent to 12-bit resolution.
The ISD2100 can take digital audio data via SPI interface. When SPI interface is chosen, the sample
rate of the audio data sent must be one of the ISD2100 supported sam pl e rates.
The ISD2100 has built-in speaker driver output.
FEATURES
2
• Duration
o 30 seconds based on 8kHz/4bit ADPCM (ISD2130)
• Audio Management
o Store pre-recorded audio (Voice Prompts) using high quality digital compression
o Use a simple index based command for playback
o Execute pre-programmed macro scripts (Voice Macros) designed to control the configuration
of the device and play back Voice Prompts sequences.
•Sample Rate o 7 sampling frequencies such as 4, 5.3, 6.4, 8, 12.8, 16 and 32 kHz are available.
•Compression Algorithms
o µ-Law: 6, 7 or 8 bits per sample
o Differential µ-Law: 6, 7 or 8 bits per sample
o PCM: 8, 10 or 12 bits per sample
o Enhanced ADPCM: 2, 3, 4 or 5 bits per sample
o Variable-bit-rate optimized compression. This allows best possible compression given a
metric of SNR and background noise levels.
•Oscillator o Internal oscillator with internal reference: with ±1% deviation at room temperature.
•Output o PWM: Class D speaker driver to direct drive an 8Ω speaker or buzzer
•I/Os
o SPI interface: MISO, MOSI, SCLK, SS B for commands and digital audio data
o 6 general purpose I/O pins that share SPI i nterface.
• One 8-bit Volume Controls set by SPI command.
• Operating Voltage: 2.7-3.6V
• Package: green, 20L-QFN
• Temperature Options:
o Industrial: -40°C to 85°C
Publication Release Feb 9, 2010
- 3 - Revision 0.51
BLOCK DIAGRAM
Digital Signal Path
:
Digital
Filters
Re
-
sampling
Volume Control
PWMControl
De
-
Compression
Flash Memory
Controller
Flash Memory
SPI
&
GPIO
Interface
Memory Management
and Command
Interpreter
SPK
+
SPK
-
SCLK
GPI
1
/
SSB
MISOGPIO
2
/
MOSIGPIO
0
/
INTBGPIO
3
/
RDY
/
BSYBGPIO
4
/
GPIO
5
3
ISD2100 DATASHEET
Figure 3-1 ISD2100 Block Diagram
Publication Release Feb 9, 2010
- 4 - Revision 0.51
PINOUT CONFIGURATION
2
3
4
5
678910
1
11
12
13
14
15
1617181920
V
SSD
NC
MOSI / GPIO0
SSB
SCLK / GPI1
MISO / GPIO2
V
CCD
_PWM
V
SSD
_PWM
SPK+
V
CCD
_PWM
INTB / GPIO3
RDY/BSYB / GPIO4
V
CCD
GPIO5
NC
NC
NC
NC
NC
ISD2130
QFN-20
SPK-
4
ISD2100
ISD2100 DATASHEET
Figure 4-1 ISD2100 20-Lead QFN Pin Configurat i on.
Publication Release Feb 9, 2010
- 5 - Revision 0.51
5
PIN DESCRIPTION
ISD2100 DATASHEET
Pin
Pin Name I/O Function
Number
1 MISO /
GPIO2
O Master-In-Slave-Out. Serial output from the ISD2100 to the host. This
pin is in tri-state when SSB=1.
Can be configured as a general purpose I/ O pin.
2 SCLK / GPI1 I Serial Clock input to the ISD2100 from the host.
Can be configured as a general purpose input pi n.
3 SSB I Slave Select input to the ISD2100 from the host. When SSB is low
device is selected and responds to commands on the SPI interface.
4 MOSI /
GPIO0
5 V
6 V
I Digital Ground.
SSD
_PWM I Digital Power for the PWM Driver.
CCD
I Master-Out-Slave-In. Serial input to the ISD2100 from the host.
Can be configured as a general purpose I/O pin.
7 SPK+ O PWM driver positiv e output. This SPK+ output, together with SPK- pin,
provide a differential output to drive 8Ω speaker or buzzer. During
power down this pin is in tri-state.
8 V
_PWM I Digital Ground for the PWM Driver.
SSD
9 SPK- O PWM driver negativ e output. This SPK- output, together with SPK+
pin, provides a differential output to drive 8Ω speaker or buzzer.
During power down this pin is tri-state.
10 V
11 INTB /
12 RDY/BSYB /
_PWM I Digital Power for the PWM Driver.
CCD
O Active low interrupt request pin. This pin is an open-drain output.
GPIO3
Can be configured as a general purpose I/ O pin.
O An output pin to report the status of data transfer on the SPI interface.
GPIO4
“High” indicates that ISD2100 is ready to accept new SPI commands
or data.
Can be configured as a general purpose I/ O pin.
13 NC This pin should be left unconnected.
14 V
I Digital Power.
CCD
15 GPIO5 I/O General purpose I/O pin.
16 NC This pin should be left unconnected.
17 NC This pin should be left unconnected.
18 NC This pin should be left unconnected.
19 NC This pin should be left unconnected.
20 NC This pin should be left unconnected.
Publication Release Feb 9, 2010
- 6 - Revision 0.51
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