ISD1916
ISD1916
SINGLE-CHIP, MULTIPLE-MESSAGE
VOICE RECORD/PLAYBACK DEVICE
10.6- TO 32-SECONDS DURATION
Publication Release Date: September 11, 2007
- 1 - Revision 0
ISD1916
TABLE OF CONTENTS
1. GENERAL DESCRIPTION ............................................................................................................... 3
2. FEATURES ....................................................................................................................................... 3
3. BLOCK DIAGRAM ............................................................................................................................ 5
4. PIN CONFIGURATION ..................................................................................................................... 6
5. PIN DESCRIPTION .......................................................................................................................... 7
6. FUNCTIONAL DESCRIPTION ......................................................................................................... 9
6.1. Address Trigger ( NORM ) Operation ........................................................................................... 9
6.1.1. Record ( REC ) Operation ........................................................................................................ 9
6.1.2. Edge-triggered Playback ( PlayE ) Operation ........................................................................ 11
6.1.3. Level- triggered Playback ( PlayL )Operation ........................................................................ 11
6.1.4. Playback (Supersedes Record) Operation .......................................................................... 12
6.1.5. XCLK Feature....................................................................................................................... 13
6.2. Direct Trigger ( MODE ) Operation ............................................................................................. 13
6.3. Other Operations ...................................................................................................................... 15
6.3.1. Rosc Operation .................................................................................................................... 15
6.3.2. LED Operation .................................................................................................................... 15
6.3.3. Feed-Through mode Operation ........................................................................................... 15
6.3.4. Power-On Playback Operation ............................................................................................ 15
6.3.5. Automatic Single Message Playback ................................................................................... 16
6.3.6. Power is interrupted Abruptly ............................................................................................... 16
7. ABSOLUTE MAXIMUM RATINGS
7.1 Operating Conditions ................................................................................................................... 17
8. ELECTRICAL CHARACTERISTICS ............................................................................................... 18
8.1. DC Parameters ........................................................................................................................... 18
8.2. AC Parameters ........................................................................................................................... 19
9. TYPICAL APPLICATION CIRCUIT ................................................................................................ 20
10. PACKAGING ................................................................................................................................... 22
10.1 28-Lead 300-Mil Plastic Small Outline Integrated Circuit (SOIC) ........................................... 22
11. ORDERING INFORMATION .......................................................................................................... 23
12. VERSION HISTORY ....................................................................................................................... 24
[1]
.............................................................................................. 17
Publication Release Date: September 11, 2007
- 2 - Revision 0
ISD1916
1. GENERAL DESCRIPTION
Winbond’s ISD1916 ChipCorder® is a new single-chip multiple-message record/playback series with
dual operating modes (address trigger and direct trigger) with wide operating voltage ranging from
2.4V to 5.5V. The sampling frequency can be selected from 4 to 12 kHz via an external resistor, which
also determines the duration from 10.6 to 32 seconds. The device is designed for mostly standalone
applications, and of course, it can be manipulated by a microcontroller, if necessary.
The two operating modes are address trigger and direct trigger. While in address trigger mode, both
record and playback operations are manipulated according to the start address and end address
specified through the start address and end address pins. However, in direct trigger mode, the device
can configure the memory up to as many as eight equal messages, pending upon the fixed message
configuration settings. With the record or playback feature being pre-selected, each message can be
randomly accessed via its message control pin.
The device has a selectable differential microphone input with AGC feature or single-ended analog
input, AnaIn, under feed-through mode. Its differential Class D PWM speaker driver can directly drive
a typical speaker or buzzer.
2. FEATURES
The ISD1916 is a multiple messages record/playback device with two operational modes: address
trigger (
• Supply voltage: 2.4V to 5.5V.
• External resistor, Rosc, selects sampling frequency and duration.
• Mic+/Mic- : differential microphone inputs.
• AGC : automatic gain control for microphone preamp circuit.
•
• When both
• SP+/SP- : Class-D PWM differential speaker drivers.
•
• Automatically power down after each operation cycle.
• Playback takes precedence over the recording operation.
y Temperature option: -40°C to +85°C (Industrial)
y Packaging: available in SOIC only
NORM ) and direct trigger ( MODE ). The analog inputs and the outputs are:
Sampling Frequency 12 kHz 8 kHz 6.4 kHz 5.3 kHz 4 kHz
Rosc 53.3 KΩ 80 KΩ 100 KΩ 120 KΩ 160 KΩ
FT : feed-through the AnaIn signal to the speaker outputs while AnaIn is converted from MIC+.
FT and recording are active, device will record AnaIn signal into memory with AnaIn
signal output to speaker simultaneously.
LED : during recording, LED is on.
Publication Release Date: September 11, 2007
- 3 - Revision 0
ISD1916
2.1. Address trigger operational mode
• While in NORM mode, flexible message duration is defined by start address and end
address.
Utilize four start addresses ( S0 , S1 , S2 & S3 ) and four end addresses ( E0 , E1 , E2 & E3 ) to
•
specific the message duration.
•
REC : Level-hold or Edge-trigger (toggle on-off) recording from start to end addresses.
PLAYE : Edge-trigger playback from start to end addresses and stops at EOM marker, if EOM
•
is prior to end address. Toggle on-off.
• PLAYL : Level-hold playback from start to end addresses. Also, if constantly Low, device will
loop playback from start to end addresses.
2.2. Direct trigger operational mode
• While
adapt various (1 to 8) fixed equal message configurations for random access and pre-defines
the fixed message duration accordingly.
• The control pins are:
• The record or playback operation is pre-defined by the
• Each message can be randomly accessed via its message control pin (
desired operation is facilitated accordingly.
MODE
is active, utilizing, FMC1 , FMC2 &
M1 ~ M8 (message activation) and /PR (record or playback selection).
FMC3
, the device reconfigures some pins to
/PR pin.
M1 ~ M8 ) and the
Publication Release Date: September 11, 2007
- 4 - Revision 0
3. BLOCK DIAGRAM
ISD1916
Rosc
MIC+_
AnaIn
AGC
Address Trigger:
Direct Trigger:
NORM
MODE
Pre-
Amp
LED
LED
Amp
Automatic
Gain Control
(AGC)
FT
FT
Clock Control
Antialiasing
Filter
Device & Address Control
PlayLPlayE
REC
FMC2FMC3
S0 S1 S2 S3 E0 E1 E2 E3
XCLK
M1 M2 M3R/P M8M6 M7FMC1
Non-Volatile
Multi Level Storage
Array
Switch
M4
M5
Smoothing
Filter
Power Conditioning
V
CCAVSSA
V
CCD
V
SSD
V
CCpVSSP1
Amp
V
SP +
SP -
SSP2
Publication Release Date: September 11, 2007
- 5 - Revision 0
4. PIN CONFIGURATION
ISD1916
V
SSD
S0 / M1
S1 / M2
S2 / M3
S3 / M4
PlayL / FMC1
E0 / M5
V
SSA
E1 / M6
E2 / M7
E3 / M8
V
SSP2
SP-
V
CCP
10
11
12
13
14
1
2
3
4
5
6
7
ISD1916
8
9
28
27
26
25
24
23
22
21
20
19
18
17
16
15
V
CCD
NORM / MODE
FT
XCLK / FMC3
REC / R/P
PlayE / FMC2
LED
V
CCA
Rosc
Mic-
Mic+_AnaIn
AGC
V
SSP1
SP+
SOIC
Publication Release Date: September 11, 2007
- 6 - Revision 0
5. PIN DESCRIPTION
[1
]
[1
]
[1
]
[1
]
[1
]
[1
]
[1
]
[1
]
PIN NAME PIN # I / O FUNCTION
V
1 I
SSD
M1
S0 /
M2
S1 /
S2 / M3
S3 / M4
PLAYL / FMC1
E0 / M5
V
8 I
SSA
E1
/ M6
E2 /M7
E3 /M8
V
12 I
SSP2
2 I
3 I
4 I
5 I
6 I
7 I
9 I
10 I
11 I
SP- 13 O
V
14 I
CCP
SP+ 15 O
V
16 I
SSP1
AGC 17 I
MIC+ / AnaIn 18 I
Digital Ground: Ground path for digital circuits.
S0
: In Norm mode, Start Address Bit 0.
M1 : When MODE is active, low active operation on 1
& debounce existed.
S1
: In Norm mode, Start Address Bit 1.
M2 : When MODE is active, low active operation on 2
& debounce existed.
S2
: In Norm mode, Start Address Bit 2.
M3 : When MODE is active, low active operation on 3
& debounce existed.
S3
: In Norm mode, Start Address Bit 3.
M4 : When MODE is active, low active operation on 4
& debounce existed.
PLAYL : In Norm mode, low active input, Level-hold playback start to end
addresses, debounce & internal pull-up existed. Holding
perform looping playback function from start to end addresses with insignificant
dead time between messages regardless of sampling frequencies.
FMC1 : When MODE is active, FMC1 , together with FMC2 & FMC3 , setup
various fixed-message configurations.
E0
: In Norm mode, End Address Bit 0.
M5 : When MODE is active, low active operation on 5
& debounce existed.
Analog Ground: Ground path for analog circuits.
E1
: In Norm mode, End Address Bit 1.
M6 : When MODE is active, low active operation on 6
& debounce existed.
E2
: In Norm mode, End Address Bit 2.
M7 : When MODE is active, low active operation on 7
& debounce existed.
E3
: In Norm mode, End Address Bit 3.
M8
: When
MODE
is active, low active operation on 8
& debounce existed.
Ground: Ground for negative PWM speaker driver.
SP-: Negative signal of the differential Class-D PWM speaker outputs. This output,
together with the SP+, is used to drive an 8Ω speaker directly.
Speaker Power Supply: Power supply for PWM speaker drivers.
SP+: Positive signal of the differential Class-D PWM speaker outputs. This output,
together with the SP-, is used to drive an 8Ω speaker directly.
Ground: Ground for positive PWM speaker driver.
Automatic Gain Control (AGC): The AGC adjusts the gain of the microphone
preamplifier circuitry.
• MIC+ : Non-inverting input of the differential microphone signal.
• AnaIn : When
FT is selected, the MIC+ input is configured to a single-ended
input with 1Vp-p maximum input amplitude and feed-through to the speaker
outputs.
ISD1916
st
Message. Internal pull-up
nd
Message. Internal pull-up
rd
Message. Internal pull-up
th
Message. Internal pull-up
PLAYL Low constantly will
th
Message. Internal pull-up
th
Message. Internal pull-up
th
Message. Internal pull-up
th
Message. Internal pull-up
Publication Release Date: September 11, 2007
- 7 - Revision 0
PIN NAME PIN # I / O FUNCTION
MIC- 19 I
MIC- : Inverting input of the differential microphone signal. While
MIC- pin is disabled and must be floated.
Rosc 20 I
Oscillator Resistor: Connect an external resistor from this pin to V
internal sampling frequency.
V
21 I
CCA
LED
22 O
Analog Power Supply: Power supply for analog circuits.
LED output: During recording, this output is Low. Also, LED pulses Low
momentarily at the end of playback.
PLAYE / FMC2
23 I
PLAYE : In Norm mode, low active input, edge-trigger playback from start to end
addresses & toggle on-off. Debounce & internal pull-up existed.
FMC2 : When MODE is active, FMC2 , together with FMC1 & FMC3 , setup
various fixed-message configurations.
REC / /PR
24 I
REC : In Norm mode, level-hold (after 1 sec holding) or edge-trigger (toggle on-off),
low active, recording from start to end addresses. Debounce & internal pull-up
existed.
/PR ( When MODE is active):
• When /PR is set to Low, level-hold record operation is selected.
• When
/PR is set to High, edge-trigger & toggle on-off playback operation is
selected.
XCLK / FMC3
25 I
External Clock: In Norm mode, low active and level-hold input. As XCLK
activated, Rosc pin accepts external clock input signal, provided resistor at Rosc
must be removed. Connecting this pin to High enables device running on internal
clock via Rosc resistor. If not used, XCLK must be at high level.
When MODE is active, FMC3 , together with FMC1 & FMC2 , setup various fixed-
message configurations.
FT
26 I
Feed-Through : Low active input, Level-hold, debounce & Internal pull-up required.
FT is selected, the MIC+ input is configured to a single-ended input with
When
1Vp-p maximum input amplitude and feed-through to the speaker outputs.
Norm / MODE
27 I Level-hold input.
• Norm : When set to High, the device operates under Address trigger condition.
MODE : When set to Low, the device operates under direct trigger condition. The
•
device reconfigures its pin definitions to fit various fixed-message configurations
utilizing
FMC3
FMC1 ,FMC2
& FMC3 pins as below table.
FMC2 FMC1
0 0 0 1
0 0 1 2
0 1 0 3
0 1 1 4
1 0 0 5
1 0 1 6
1 1 0 7
1 1 1 8
V
Notes:
28 I
CCD
[1]
: Address bits S0 , S1 , S2 , S3 , E0 , E1 , E2 & E3 are used to access the memory location.
Digital Power Supply: Power supply for digital circuits.
ISD1916
FT
is enabled,
to select the
SSA
# of fixed messages
Publication Release Date: September 11, 2007
- 8 - Revision 0
ISD1916
6. FUNCTIONAL DESCRIPTION
There are two operational modes: address trigger ( NORM ) and direct trigger ( MODE ). After a new
condition is selected on
NORM / MODE , the power must be cycled to enable it.
6.1. ADDRESS TRIGGER (
NORM
) OPERATION
The start address bits (S0, S1, S2 & S3) and end address bits (E0, E1, E2 & E3) are used
to access the memory location and they can divide the memory into a maximum of 16 slots. As
an example of I1916, they are defined as follows:
S3
( E3 )
0 0 0 0 0 0
0 0 0 1 8 1.0
0 0 1 0 16 2.0
0 0 1 1 24 3.0
0 1 0 0 32 4.0
0 1 0 1 40 5.0
0 1 1 0 48 6.0
0 1 1 1 56 7.0
1 0 0 0 64 8.0
1 0 0 1 72 9.0
1 0 1 0 80 10.0
1 0 1 1 88 11.0
1 1 0 0 96 12.0
1 1 0 1 104 13.0
1 1 1 0 112 14.0
1 1 1 1 120 15.0
S2
( E2 )
S1
( E1 )
S0
( E0 )
Row # I1916
Duration [s]
REC
6.1.1. Record (
• Low active input, level-hold for level-trigger or falling edge for edge-trigger with debounce required.
• For 8kHz sampling frequency, if
recording is activated. However, if
is initiated.
• For 6.4kHz sampling frequency, if
recording is activated. However, if
recording is initiated.
• Recording begins from the start address to end address and
• Recording ceases whenever
pulse appears while in edge-trigger mode or when end address is reached. Then an EOM marker is
written at the end of message. And
• Then the device will automatically power down.
• This pin has an internal pull-up device.
• Once
REC
illegal.
) Operation
REC is held at Low for a period equal to 1 sec or more, then level
REC is pulsed Low for less than 1 sec, then edge-trigger recording
REC is held at Low for a period equal to 1.25 sec or more, then level
REC is pulsed Low for less than 1.25 sec, then edge-trigger
LED is on.
REC
returns to High in level-hold mode or a subsequent lower going
LED
is off.
is active, input on FT, NORM / MODE , S0 , S1 , S2 , S3 , E0 , E1, E2 or E3 is
Publication Release Date: September 11, 2007
- 9 - Revision 0
Fig. 1: Record–Level ( REC ) function till end address
Norm/Mode
<S3:S0>
<E3:E0>
T
ASet
T
AHold
REC
T
Deb
LED
Mic+/-
or AnaIn
Fig. 2: Record–Level ( REC ) function with start and stop actions
Norm/Mode
<S3:S0>
<E3:E0>
REC
LED
T
ASet
T
Deb
T
AHold
T
Deb
T
ASet
StopStart
T
Settle1
T
Start
T
Deb
AHold
ISD1916
T
Stop1
End Address
T
Mic+/-
Stop1
or AnaIn
End Address
Fig. 3: Record–Edge ( REC ) function with on-off
Norm/Mode
<S3:S0>
<E3:E0>
T
AHold
Start
T
Deb
REC
T
ASet
T
AHold
Start
T
Deb
T
Deb
Stop
T
ASet
T
Settle1
LED
T
Mic+/-
Stop1
or AnaIn
End Address
Publication Release Date: September 11, 2007
- 10 - Revision 0
ISD1916
6.1.2. Edge-triggered Playback (
PlayE ) Operation
• Low active input, edge-trigger, toggle on-off, debounce required.
• Playback begins from the start address to end address or EOM, whichever is occurred first.
• At the end of message,
LED pulses Low momentarily.
• Then device will automatically power down.
• During playback, a subsequent trigger terminates the playback operation. If EOM marker is not encountered,
then
LED will not pulses Low momentarily.
• This pin has an internal pull-up device.
• Once
PlayE is active, input on PlayL , REC , FT , NORM / MODE , S0 , S1 , S2 , S3 , E0 , E1 , E2
or E3 is banned.
Fig. 4 : Playback–Edge ( PlayE ) function
Norm/Mode
<S3:S0>
<E3:E0>
PlayE
LED
Sp+
Sp-
T
ASet
T
Deb
T
Start
AHold
T
ASet
Stop
T
Deb
T
Settle2
T
AHold
Start
T
Deb
T
EOM
End of
Message
6.1.3. Level- triggered Playback (PlayL )Operation
• Low active input, Level-hold, debounce required.
• Once active, playback begins from the start address and stops whenever
an EOM is encountered,
LED
pulses Low momentarily.
PlayL returns to High. When
• Then device will automatically power down.
• This pin has an internal pull-up device.
• Once
PlayL is active, input on PlayE ,
REC, FT
, NORM / MODE , S0 , S1 , S2 , S3 , E0 , E1, E2
or E3 is prohibited.
Fig. 5: Playback–Level ( PlayL ) function
Publication Release Date: September 11, 2007
- 11 - Revision 0
• However, holding
from start address to end address.
Norm/Mode
<S3:S0>
<E3:E0>
PlayL
LED
Sp+
Sp-
ISD1916
T
ASet
T
AHold
T
ASet
StopStart
T
Deb
T
Deb
T
Settle2
Part of
Message
PlayL Low constantly will perform looping playback function, without power down,
T
AHold
Start
T
Deb
T
EOM
End of
Message
Fig. 6: Looping playback function via
PlayL
Norm/Mode
<S3:S0>
<E3:E0>
T
ASet
T
AHold
PlayL
T
Deb
T
EOM
T
EOM
LED
Sp+
Sp-
6.1.4. Playback (Supersedes Record) Operation
• Playback takes precedence over the Recording operation.
• If either
an EOM marker attached, and without power down, playback of the just-recorded message performs
accordingly. Then device powers down.
Fig. 7: An example of Playback supersedes Record
PlayE or PlayL is activated during a recording cycle, the recording immediately ceases with
Publication Release Date: September 11, 2007
- 12 - Revision 0
ISD1916
[1]
Norm/Mode
<S3:S0>
<E3:E0>
Mic+/-
or AnaIn
REC
LED
PlayE
SP+
SP-
T
ASet
T
6.1.5. XCLK Feature
• When precision sampling frequency is required, external clock mode can be activated by setting XCLK
to Low. Under such condition, the resistor at Rosc pin must be removed and the external clock signal
must be applied to the Rosc pin. These conditions must be satisfied prior to any operations.
• However, when internal clock is used,
• The external clock frequencies required for various sampling frequencies are listed in below table.
Sampling Freq [kHz] 12 8 6.4 5.3 4
XCLK [MHz]
Deb
T
AHold
T
EOM
T
T
Settle1
T
Deb
XCLK must be linked to High.
Settle3
3.072 2.048 1.638 1.356 1.024
DIRECT TRIGGER ( MODE ) OPERATION
6.2.
• The direct trigger is selected by the MODE pin. Once chosen, the supply voltage must be reset to
allow the device to construct itself to the appropriate configuration by re-defining the function on the
related control pins. Also, the mode change is only allowed while the device is in power down state and
inhibited during an operation is in progress.
• Once direct trigger is activated,
message configurations
[1]
FMC1, FMC2 & FMC3 are utilized to select various (1 to 8) fixed
. Pending upon the arrangement on FMC1 , FMC2 & FMC3 , each divided
message has approximate equal length of duration, which is related to the number of rows assigned as
in below table.
• The record or playback operation is pre-defined by the
/PR pin. Setting this pin to Low allows record
operation while setting it to High enables playback operation.
• Each message can be randomly accessed via its message control pin (
M1 ~ M8 ) and the desired
operations are facilitated accordingly. Non-configured pins are automatically disabled and must be
floated.
[1]
Notes:
: Number of fixed message arrangement with respect to FMC1 , FMC2 & FMC3 .
FMC3
FMC2
FMC1
# of fixed messages
0 0 0 1
0 0 1 2
0 1 0 3
Publication Release Date: September 11, 2007
- 13 - Revision 0
ISD1916
0 1 1 4
1 0 0 5
1 0 1 6
1 1 0 7
[2]
: Number of memory row arrangement with respect to different number of fixed messages
[3]
: The durations for various fixed message configurations on I1916 device at 8 kHz
1 1 1 8
for ISD1916 (128 Rows). The non-configured Message control pins (Mx) will be disabled.
# of Msg M1 M2 M3 M4 M5 M6 M7 M8
1
2
3
4
5
6
7
8
128
64 64
44 42 42
32 32 32 32
26 26 26 26 24
23 21 21 21 21 21
20 18 18 18 18 18 18
16 16 16 16 16 16 16 16
sampling frequency are shown in below table.
# of Msg M1 M2 M3 M4 M5 M6 M7 M8
1
2
3
4
5
6
7
8
16
8 8
5.5 5.25 5.25
4.0 4.0 4.0 4.0
3.25 3.25 3.25 3.25 3.0
2.875 2.625 2.625 2.625 2.625 2.625
2.50 2.25 2.25 2.25 2.25 2.25 2.25
2.0 2.0 2.0 2.0 2.0 2.0 2.0 2.0
Example of four Fixed-Message Configuration:
Fig. 8: Record Operation under FMC mode
Norm/Mode
FM3
FM2
FM1
R / P
M1 ~ M4
LED
Mic+/-
or AnaIn
Start
T
FSet
Stop
T
T
T
Deb
Settle1
Deb
Start
T
Deb
T
Stop1
End of Duration
Publication Release Date: September 11, 2007
- 14 - Revision 0
Fig. 9: Playback Operation under FMC mode
Norm/Mode
FM3
FM2
FM1
T
R / P
M1 ~ M4
FSet
Start
Stop Start
ISD1916
T
EOM
LED
Sp+
Sp-
T
Deb
T
Settle2
T
Deb
T
Deb
End of Message
6.3. OTHER OPERATIONS
6.3.1. Rosc Operation
• When the R
accordingly.
• When R
OSC
faster or slower.
• If the ground side of R
• The operation will resume when the resistor is connected back to ground.
6.3.2. LED Operation
• LED turns on during recording. Also, LED pulses Low at the end of message. The Low period must
be sufficiently greater than debounce time.
6.3.3. Feed-Through mode Operation
• As FT is held Low, the Mic+ pin will be reconfigured as AnaIn input then the AnaIn signal will be
transmitted to the speaker outputs. Under this mode, Mic- pin is not used (must be floated).
• After
• If
• During an operation, activating the
FT is enabled, If REC is triggered, then AnaIn signal will be recorded into memory while the
Feed-Through path remains on.
FT is already enabled, activating either PlayE or PlayL will first disable the FT path then play the
recorded message. Once playback completes, FT path will be resumed.
varies from 53.3 KΩ to 160 KΩ, the sampling frequency changes from 12 to 4 kHz
OSC
resistor value is changed during playback, the tone of a recorded message will alter either
resistor is floated or tied to VCC, then the current operation will be freezed.
OSC
FT
pin is not allowed.
6.3.4. Power-On Playback Operation
• If PlayE is kept at Low during power turns on, the device plays message once, then powers down.
Publication Release Date: September 11, 2007
- 15 - Revision 0
ISD1916
• If PlayL is held at Low during power turns on and constantly maintained at Low, the device will play the
message repeatedly, with insignificant dead time between messages regardless of sampling
frequencies. This status will sustain unless power is turned off or PlayL somehow returns to High.
6.3.5. Automatic Single Message Playback
• If LED is connected to PlayE , once PlayE is triggered, then the device plays message repeatedly
without power down between the looping playback. However, if
playback, then playback will stop.
6.3.6. Power is interrupted Abruptly
• During the device is in operation, it is strongly recommended that the supply power cannot be
interrupted. Otherwise, it may cause the device to become malfunctioning.
PlayE is triggered again during
Publication Release Date: September 11, 2007
- 16 - Revision 0
7. ABSOLUTE MAXIMUM RATINGS
[1]
ABSOLUTE MAXIMUM RATINGS
CONDITION VALUE
Junction temperature 150°C
Storage temperature range -65°C to +150°C
Voltage applied to any pins (VSS – 0.3V) to (VCC + 0.3V)
Voltage applied to Input pins (current limited to +/-20 mA) (VSS – 1.0V) to (VCC + 1.0V)
Voltage applied to output pins (current limited to +/-20 mA) (VSS – 1.0V) to (VCC + 1.0V)
VCC – VSS -0.3V to +7.0V
[1]
Stresses above those listed may cause permanent damage to the device. Exposure to the
absolute maximum ratings may affect device reliability and performance. Functional operation is
not implied at these conditions.
ISD1916
7.1 OPERATING CONDITIONS
Operating temperature range 0°C to +50°C
Operating voltage (VCC)
Ground voltage (VSS)
[1]
VCC = V
[2]
VSS = V
CCA
SSA
= V
= V
CCD
SSD
OPERATING CONDITIONS
CONDITION VALUE
[1]
+2.4V to +5.5V
[2]
0V
Publication Release Date: September 11, 2007
- 17 - Revision 0
ISD1916
[2]
[1]
[2]
[3]
[3]
Y
[4] [5]
[4] [5]
Y
[4] [5]
8. ELECTRICAL CHARACTERISTICS
8.1. DC PARAMETERS
After design is finalized, need Design engineering’s help to update the actual values on this DC
Parameter table and the timing parameters.
PARAMETER SYMBOL MIN
Input Low Voltage VIL 0.3xVcc V
Input High Voltage VIH 0.7xVcc V
Output Low Voltage VOL 0.3xVcc V I
Output High Voltage VOH 0.7xVcc V I
Standby Current I
Record Current I
Playback Current I
Pull-up device for REC , PlayE ,
PlayL , FT & M1 ~M8 pins
MIC+ Input Resistance R
MIC- Input Resistance R
AnaIn Input Resistance R
MIC Differential Input V
AnaIn Input V
Gain from MIC to SP+/- A
Gain from AnaIn to SP+/- A
Output Load Impedance R
1 10 µA
STB
20 30 mA V
REC
20 30 mA V
PLA
R
PU1
18 KΩ
MICP
18 KΩ
MICN
42 KΩ
ANAIN
15 300 mV Peak-to-peak
IN1
1 V Peak-to-peak
IN2
6 40 dB
MSP
0 dB
ASP
8 Ω Speaker load
SPK
Speaker Output Power Pout 670 mW
Speaker Output Voltage V
V
OUT1
Total Harmonic Distortion THD 1 %
[1]
Notes:
Typical values @ VCC = 5.5V, TA = 25° and sampling frequency (Fs) at 8 kHz, unless stated.
[2]
Not all specifications are 100 percent tested. All Min/Max limits are guaranteed by Winbond via design,
electrical testing and/or characterization.
[3]
LED output during recording.
[4]
V
, V
CCD
and V
CCA
[5]
All required control pins must be at appropriate status. External components are biased under a separated
are connected together. Also, V
CCP
power supply.
TYP
600
MAX
UNITS CONDITIONS
= 4.0 mA
OL
= -1.6 mA
OH
CC
CC
kΩ
VIN = 15~300 mVp-p,
AGC = 4.7 µF,
V
CC
V
CC
V
DD
313 mW
117 mW
49 mW
V R
DD
V
DD
VDD= 3 V
VDD= 2.4 V
SPK
Typical buzzer
15 mV p-p 1 kHz sine
wave, Cmessage
weighted
, V
, V
SSA
SSD
SSP1
and V
are linked together.
SSP2
= 5.5V
= 5.5V, no load
= 2.4V~5.5V
= 2.4V~5.5V
= 5.5 V 1Vp-p,
= 4.4 V
= 8Ω Speaker,
1 kHz sine
wave at
AnaIn. R
= 8 Ω
SPK
Publication Release Date: September 11, 2007
- 18 - Revision 0
ISD1916
[1]
[2]
[2]
[3]
[3]
Y
[3]
[3] [4]
[3] [4]
[3] [4]
[3] [4]
[3] [4]
[3] [4]
8.2. AC PARAMETERS
CHARACTERISTIC
Sampling Frequency Fs 4
Record Duration T
Playback Duration T
Debounce Time T
Address Setup Time T
Address Hold Time T
FMC Setup Time T
Record Settle Time T
Play Settle Time T
Delay from Record to Play T
Record Stop Time T
LED Pulse Low Time T
Notes:
[1]
Conditions are VCC = 5.5V, TA = 25°C and sampling frequency (FS) at 8kHz, unless specified.
[2]
Not all specifications are 100 percent tested. All Min/Max limits are guaranteed by Winbond via design,
electrical testing and/or characterization.
[3]
When different FS is applied, the value will change accordingly. Also, stability of internal oscillator may
vary as much as +
[4]
k = 1000.
SYMBOL MIN
TYP MAX
UNIT
S
10.6 32 sec
REC
10.6 32 sec
PLA
225k/F
Deb
msec
12 kHz
s
30 nsec
ASet
225k/F
AHold
msec
s
30 nsec
FSet
32k/Fs msec
Settle1
256k/F
Settle2
msec
s
128k/F
Settle3
msec
s
30 nsec
Stop1
256k/F
EOM
msec
s
10% over the operating temperature and voltage ranges.
CONDITIONS
Publication Release Date: September 11, 2007
- 19 - Revision 0
ISD1916
9. TYPICAL APPLICATION CIRCUIT
The following typical application examples on ISD1916 series are for references only. They make
no representation or warranty that such applications shall be suitable for the use specified. It’s
customer’s obligation to verify the design in its own system for the functionalities, voice quality,
current consumption, and etc.
In addition, the below notes apply to the following application examples:
* The suggested values are for references only. Depending on system requirements, they can
be adjusted for functionalities, voice quality and degree of performance.
It is important to have a separate path for each ground and power back to the related terminals to
minimize the noise. Besides, the power supplies should be decoupled as close to the device as
possible.
Also, it is crucial to follow good audio design practices in layout and power supply decoupling. See
recommendations in Application Notes from our websites.
Example #1: Operations via start and end addresses under address trigger mode (
NORM )
NORM
LED
XCLK
V
CCD
V
SSD
V
CCA
V
SSA
V
CCP
V
SSP1
V
SSP2
SP+
SP-
1 KΩ
µ
0.1 F
0.1 F
V
CCA
0.1 F
10 F*
D1
µ
µ
µ
Speaker
Vcc Gnd
V
CCA
V
10 F*
10 F*
V
CCP
µ
10 F*
CCD
V
CCP
µ
µ
V
CCD
µ
0.1 F
To switches or
address I/Os
V
CC
4.7 kΩ∗
Ω∗4.7 k
4.7 k
Ω∗
µ
4.7 F*
µ
0.1 F*
µ
0.1 F*
4.7 F*
µ
Rosc*
REC
PLAYE
PLAYL
S3
S2
S1
S0
E3
ISD1916
E2
E1
E0
FT
Mic+_AnaIn
Mic-
AGC
Rosc
Publication Release Date: September 11, 2007
- 20 - Revision 0
ISD1916
Example #2: Fixed Message Configuration Operations under direct trigger mode (
V
4.7 kΩ∗
CC
R/P
M1
M2
M3
M4
M5
M6
V
CC
µ
4.7 F*
Ω∗4.7 k
µ
0.1 F*
µ
0.1 F*
µ
4.7 k
Ω∗
4.7 F*
Rosc*
M7
M8
ISD14B20
FT
Mic+_AnaIn
Mic-
AGC
Rosc
LED
MODE
FMC3
FMC2
FMC1
V
CCD
V
SSD
V
CCA
V
SSA
V
CCP
V
SSP1
V
SSP2
SP+
SP-
0.1 F
1 k Ω
µ
µ
0.1 F
V
CCA
µ
0.1 F
10 F*
D1
V
µ
Speaker
CCD
0.1 F
µ
10 F*
µ
10 F
V
CCP
µ
10 F*
µ
MODE )
Vcc Gnd
V
CCA
V
CCD
V
CCP
Good Audio Design Practices
Winbond’s ChipCorder are very high-quality single-chip voice recording and playback devices. To
ensure the highest quality voice reproduction, it is important that good audio design practices on
layout and power supply decoupling are followed. See Application Information links below for details.
Good Audio Design Practices
http://www.winbond-usa.com/products/isd_products/chipcorder/applicationinfo/apin11.pdf
Single-Chip Board Layout Diagrams
http://www.winbond-usa.com/products/isd_products/chipcorder/applicationinfo/apin12.pdf
It is strongly recommended that before any design or layout project starts, the designer should contact
Winbond Sales Rep for the most update technical information and layout advice.
Publication Release Date: September 11, 2007
- 21 - Revision 0
10. PACKAGING
10.1 28-LEAD 300-MIL PLASTIC SMALL OUTLINE INTEGRATED CIRCUIT (SOIC)
ISD1916
D
27
26
2
25
24
45 67
3
232221 20 19 18 171615
9101112 13
8
14
28
1
A
B
E
Plastic Small Outline Integrated Circuit (SOIC) Dimensions
INCHES MILLIMETERS
F
H
G
C
Min Nom Max Min Nom Max
A
B
C
D
E
F
G
H
Lead coplanarity to be within 0.004 inches.
Note:
0.701 0.706 0.711 17.81 17.93 18.06
0.097 0.101 0.104 2.46 2.56 2.64
0.292 0.296 0.299 7.42 7.52 7.59
0.005 0.009 0.0115 0.127 0.22 0.29
0.014 0.016 0.019 0.35 0.41 0.48
0.050 1.27
0.400 0.406 0.410 10.16 10.31 10.41
0.024 0.032 0.040 0.61 0.81 1.02
Publication Release Date: September 11, 2007
- 22 - Revision 0
11. ORDERING INFORMATION
Product Number Descriptor Key
ISD1916
I19 xxxxxx
Product Name:
I = ISD
Product Series:
19 = 1900
Duration:
16
: 10.6 – 32 secs
When ordering ISD1916 devices, please refer to the above ordering scheme. Contact the local Winbond
Sales Representatives for any questions and the availability.
For the latest product information, please contact the Winbond Sales/Rep or
access Winbond’s worldwide web site at http://www.winbond-usa.com
Package Type:
S = Small Outline Integrated Circuit
(SOIC) Package
Tape & Reel:
Blank = None
R = Tape & Reel
Temperature:
I = Industrial (-40°C to +85°C)
Lead-Free:
Y = Lead-Free
Publication Release Date: September 11, 2007
- 23 - Revision 0
12. VERSION HISTORY
VERSION DATE DESCRIPTION
0 Aug 11, 2007 Initial revision
ISD1916
Publication Release Date: September 11, 2007
- 24 - Revision 0
ISD1916
prop
Winbond products are not designed, intended, authorized or warranted for use as components in systems or equipment
intended for surgical implantation, atomic energy control instruments, airplane or spaceship instruments, transportation
instruments, traffic signal instruments, combustion control instruments, or for other applications intended to support or
sustain life. Furthermore, Winbond products are not intended for applications wherein failure of Winbond products could
result or lead to a situation wherein personal injury, death or severe property or environmental damage could occur.
Winbond customers using or selling these products for use in such applications do so at their own risk and agree to fully
indemnify Winbond for any damages resulting from such improper use or sales.
The contents of this document are provided only as a guide for the applications of Winbond products. Winbond makes no
representation or warranties with respect to the accuracy or completeness of the contents of this publication and
reserves the right to discontinue or make changes to specifications and product descriptions at any time without notice.
No license, whether express or implied, to any intellectual property or other right of Winbond or others is granted by this
publication. Except as set forth in Winbond's Standard Terms and Conditions of Sale, Winbond assumes no liability
whatsoever and disclaims any express or implied warranty of merchantability, fitness for a particular purpose or
infringement of any Intellectual property.
The contents of this document are provided “AS IS”, and Winbond assumes no liability whatsoever and disclaims any
express or implied warranty of merchantability, fitness for a particular purpose or infringement of any Intellectual
property. In no event, shall Winbond be liable for any damages whatsoever (including, without limitation, damages for
loss of profits, business interruption, loss of information) arising out of the use of or inability to use the contents of this
documents, even if Winbond has been advised of the possibility of such damages.
Application examples and alternative uses of any integrated circuit contained in this publication are for illustration only
and Winbond makes no representation or warranty that such applications shall be suitable for the use specified.
The 100-year retention and 100K record cycle projections are based upon accelerated reliability tests, as published in
the Winbond Reliability Report, and are neither warranted nor guaranteed by Winbond. This product incorporates
SuperFlash
Information contained in this ISD
published by ISD
This datasheet and any future addendum to this datasheet is(are) the complete and controlling ISD
product specifications. In the event any inconsistencies exist between the information in this and other product
documentation, or in the event that other product documentation contains information in addition to the information in
this, the information contained herein supersedes and governs such other information in its entirety. This datasheet is
subject to change without notice.
Copyright
Winbond Electronics Corporation. SuperFlash
are
®
.
®
®
prior to August, 1998.
©
2005, Winbond Electronics Corporation. All rights reserved. ChipCorder® and ISD® are trademarks of
erties of their respective owners.
ChipCorder® datasheet supersedes all data for the ISD ChipCorder products
®
ChipCorder®
®
is the trademark of Silicon Storage Technology, Inc. All other trademarks
Please note that all data and specifications are subject to change without notice.
All the trademarks of products and companies mentioned in this datasheet belong to their respective owners.
Publication Release Date: September 11, 2007
- 25 - Revision 0
Loading...