Rainbow Electronics ISD14B20 User Manual

ISD14B20
ISD14B20

SINGLE-CHIP, MULTIPLE-MESSAGE

10.6- TO 32-SECONDS DURATION

Publication Release Date: October 9, 2007
- 1 - Revision 0
ISD14B20
TABLE OF CONTENTS
1. GENERAL DESCRIPTION ............................................................................................................... 3
2. FEATURES....................................................................................................................................... 3
3. BLOCK DIAGRAM ............................................................................................................................ 5
4. PAD DESCRIPTION ......................................................................................................................... 6
5. FUNCTIONAL DESCRIPTION ......................................................................................................... 8
5.1. Address Trigger (
NORM
) Operation ........................................................................................... 8
5.1.1. Record (
5.1.2. Edge-triggered Playback ( PlayE ) Operation ........................................................................ 10
5.1.3. Level- triggered Playback ( PlayL )Operation ........................................................................ 10
5.1.4. Playback (Supersedes Record) Operation .......................................................................... 11
5.1.5. XCLK Feature....................................................................................................................... 12
5.2. Direct Trigger (
5.3. Other Operations...................................................................................................................... 14
5.3.1. Rosc Operation .................................................................................................................... 14
LED
5.3.2.
5.3.3. Feed-Through mode Operation ........................................................................................... 15
5.3.4. Power-On Playback Operation ............................................................................................ 15
5.3.5. Automatic Single Message Playback................................................................................... 15
5.3.6. Power is interrupted Abruptly............................................................................................... 15
6. ABSOLUTE MAXIMUM RATINGS
6.1 Operating Conditions ................................................................................................................... 16
7. ELECTRICAL CHARACTERISTICS............................................................................................... 17
7.1. DC Parameters ........................................................................................................................... 17
7.2. AC Parameters ........................................................................................................................... 18
8. TYPICAL APPLICATION CIRCUIT ................................................................................................ 19
9. PACKAGING................................................................................................................................... 21
9.1 Die Information .......................................................................................................................... 21
10. ORDERING INFORMATION .......................................................................................................... 22
11. VERSION HISTORY....................................................................................................................... 23
REC
) Operation ........................................................................................................ 8
) Operation............................................................................................. 12
MODE
Operation...................................................................................................................... 15
[1]
.............................................................................................. 16
Publication Release Date: October 9, 2007
- 2 - Revision 0
ISD14B20

1. GENERAL DESCRIPTION

Winbond’s ISD14B20 ChipCorder® is a new single-chip multiple-message record/playback series with dual operating modes (address trigger and direct trigger) with wide operating voltage ranging from 2.4V to 5.5V. The sampling frequency can be selected from 4 to 12 kHz via an external resistor, which also determines the duration from 10.6 to 32 seconds. The device is designed for mostly standalone applications, and of course, it can be manipulated by a microcontroller, if necessary.
The two operating modes are address trigger and direct trigger. While in address trigger mode, both record and playback operations are manipulated according to the start address and end address specified through the start address and end address pins. However, in direct trigger mode, the device can configure the memory up to as many as eight equal messages, pending upon the fixed message configuration settings. With the record or playback feature being pre-selected, each message can be randomly accessed via its message control pin.
The device has a selectable differential microphone input with AGC feature or single-ended analog input, AnaIn, under feed-through mode. Its differential Class D PWM speaker driver can directly drive a typical speaker or buzzer.

2. FEATURES

The ISD14B20 is a multiple messages record/playback device with two operational modes: address trigger ( ) and direct trigger (
Supply voltage: 2.4V to 5.5V.
External resistor, Rosc, selects sampling frequency and duration.
Mic+/Mic- : differential microphone inputs.
AGC : automatic gain control for microphone preamp circuit.
When both
SP+/SP- : Class-D PWM differential speaker drivers.
Automatically power down after each operation cycle.
Playback takes precedence over the recording operation.
y Temperature option: 0°C to +50°C (die)
y Packaging: die only
NORM
Sampling Frequency 12 kHz 8 kHz 6.4 kHz 5.3 kHz 4 kHz Rosc 53.3 K 80 K 100 K 120 K 160 K
FT
: feed-through the AnaIn signal to the speaker outputs while AnaIn is converted from MIC+.
FT
and recording are active, device will record AnaIn signal into memory with AnaIn
signal output to speaker simultaneously.
LED
: during recording, LED is on.
). The analog inputs and the outputs are:
MODE
Publication Release Date: October 9, 2007
- 3 - Revision 0
2.1. Address trigger operational mode
ISD14B20
While in mode, flexible message duration is defined by start address and end
NORM
address.
Utilize four start addresses ( , , & ) and four end addresses ( , , & ) to
S0 S1 S2 S3 E0 E1 E2 E3
specific the message duration.
REC
: Level-hold or Edge-trigger (toggle on-off) recording from start to end addresses.
PLAYE
: Edge-trigger playback from start to end addresses and stops at EOM marker, if EOM
is prior to end address. Toggle on-off.
PLAYL
loop playback from start to end addresses.
: Level-hold playback from start to end addresses. Also, if constantly Low, device will
2.2. Direct trigger operational mode
While
is active, utilizing, FMC1, &
MODE
FMC2
adapt various (1 to 8) fixed equal message configurations for random access and pre-defines the fixed message duration accordingly.
The control pins are:
M1
~M8 (message activation) and
The record or playback operation is pre-defined by the
Each message can be randomly accessed via its message control pin (
desired operation is facilitated accordingly.
FMC3
, the device reconfigures some pins to
/PR
(record or playback selection).
/PR
pin.
M1
~M8) and the
Publication Release Date: October 9, 2007
- 4 - Revision 0

3. BLOCK DIAGRAM

ISD14B20
Rosc
MIC+_
AnaIn
AGC
Address Trigger:
Direct Trigger:
NORM
MODE
Pre-
Amp
LED
LED
Amp
Automatic
Gain Control
(AGC)
FT
FT
Clock Control
Antialiasing
Filter
Device & Address Control
PlayLPlayE
REC
FMC2FMC3
S0 S1 S2 S3 E0 E1 E2 E3
XCLK
M1 M2 M3R/P M8M6 M7FMC1
Non-Volatile
Multi Level Storage
Array
Switch
M4
M5
Smoothing
Filter
Power Conditioning
V
CCAVSSA
V
CCD
V
SSD
V
CCpVSSP1
Amp
V
SP +
SP -
SSP2
Publication Release Date: October 9, 2007
- 5 - Revision 0

4. PAD DESCRIPTION

PAD NAME I / O FUNCTION
V
I
SSD
S0
/M1
S1
/M2
S2 /
M3
S3
M4
/
PLAYL
/ FMC1
E0
/M5
V
SSA
E1/
M6
E2
/M7
E3
/
M8
V
I
SSP2
SP- O
V
I
CCP
SP+ O
V
I
SSP1
AGC I
MIC+ / AnaIn I
Digital Ground: Ground path for digital circuits.
I
I
I
I
[1]
S0
: In Norm mode, Start Address Bit 0.
M1
: When
& debounce existed.
[1]
S1
: In Norm mode, Start Address Bit 1.
M2
: When
& debounce existed.
[1]
S2
: In Norm mode, Start Address Bit 2.
: When
M3
& debounce existed.
[1]
S3
: In Norm mode, Start Address Bit 3.
M4
: When
is active, low active operation on 1
MODE
is active, low active operation on 2
MODE
is active, low active operation on 3
MODE
is active, low active operation on 4
MODE
& debounce existed.
I
PLAYL
: In Norm mode, low active input, Level-hold playback start to end
addresses, debounce & internal pull-up existed. Holding perform looping playback function from start to end addresses with insignificant dead time between messages regardless of sampling frequencies.
FMC1 : When
various fixed-message configurations.
I
[1]
E0
: In Norm mode, End Address Bit 0.
: When
M5
MODE
is active, , together with FMC2 & , setup
MODE
FMC1
is active, low active operation on 5
& debounce existed.
I
Analog Ground: Ground path for analog circuits.
I
I
I
[1]
E1
: In Norm mode, End Address Bit 1.
: When
M6
& debounce existed.
[1]
E2
: In Norm mode, End Address Bit 2.
M7
: When
& debounce existed.
[1]
E3
: In Norm mode, End Address Bit 3.
: When
M8
is active, low active operation on 6
MODE
is active, low active operation on 7
MODE
is active, low active operation on 8
MODE
& debounce existed.
Ground: Ground for negative PWM speaker driver. SP-: Negative signal of the differential Class-D PWM speaker outputs. This output,
together with the SP+, is used to drive an 8 speaker directly.
Speaker Power Supply: Power supply for PWM speaker drivers. SP+: Positive signal of the differential Class-D PWM speaker outputs. This output,
together with the SP-, is used to drive an 8 speaker directly.
Ground: Ground for positive PWM speaker driver. Automatic Gain Control (AGC): The AGC adjusts the gain of the microphone
preamplifier circuitry.
MIC+ : Non-inverting input of the differential microphone signal.
AnaIn : When
FT
is selected, the MIC+ input is configured to a single-ended input with 1Vp-p maximum input amplitude and feed-through to the speaker outputs.
ISD14B20
st
Message. Internal pull-up
nd
Message. Internal pull-up
rd
Message. Internal pull-up
th
Message. Internal pull-up
PLAYL
Low constantly will
FMC3
th
Message. Internal pull-up
th
Message. Internal pull-up
th
Message. Internal pull-up
th
Message. Internal pull-up
Publication Release Date: October 9, 2007
- 6 - Revision 0
PAD NAME I / O FUNCTION
MIC- I
MIC- : Inverting input of the differential microphone signal. While MIC- pin is disabled and must be floated.
Rosc I
Oscillator Resistor: Connect an external resistor from this pin to V internal sampling frequency.
V
I
CCA
LED
Analog Power Supply: Power supply for analog circuits.
O
LED output: During recording, this output is Low. Also, momentarily at the end of playback.
I
PLAYE
/ FMC2
PLAYE
: In Norm mode, low active input, edge-trigger playback from start to end
addresses & toggle on-off. Debounce & internal pull-up existed.
FMC2 : When
is active, , together with & , setup
MODE
FMC2 FMC1
various fixed-message configurations.
REC//PR
I
REC
: In Norm mode, level-hold (after 1 sec holding) or edge-trigger (toggle on-off), low active, recording from start to end addresses. Debounce & internal pull-up existed.
/PR
( When
When
When
/PR
/PR
is active):
MODE
is set to Low, level-hold record operation is selected.
is set to High, edge-trigger & toggle on-off playback operation is
selected.
XCLK
FMC3
/
I
External Clock: In Norm mode, low active and level-hold input. As activated, Rosc pin accepts external clock input signal, provided resistor at Rosc must be removed. Connecting this pin to High enables device running on internal
clock via Rosc resistor. If not used, When
MODE
is active,
FMC3
XCLK
, together with & FMC2 , setup various fixed-
message configurations.
I
FT
Feed-Through : Low active input, Level-hold, debounce & Internal pull-up required.
FT
When
is selected, the MIC+ input is configured to a single-ended input with
1Vp-p maximum input amplitude and feed-through to the speaker outputs.
Norm /
MODE
I Level-hold input.
Norm : When set to High, the device operates under Address trigger condition.
: When set to Low, the device operates under direct trigger condition. The
MODE
device reconfigures its pin definitions to fit various fixed-message configurations utilizing ,FMC2 & pins as below table. FMC1
FMC3
FMC2 FMC1
FMC3
0 0 0 1 0 0 1 2 0 1 0 3 0 1 1 4 1 0 0 5 1 0 1 6 1 1 0 7 1 1 1 8
Digital Power Supply: Power supply for digital circuits.
Notes:
V
I
CCD
[1]
: Address bits , , , , , , & E3 are used to access the memory location.
S0 S1 S2 S3 E0 E1 E2
must be at high level.
FMC1
# of fixed messages
ISD14B20
FT
is enabled,
to select the
SSA
LED
pulses Low
FMC3
XCLK
Publication Release Date: October 9, 2007
- 7 - Revision 0

5. FUNCTIONAL DESCRIPTION

ISD14B20
There are two operational modes: address trigger ( ) and direct trigger ( condition is selected on /

5.1. ADDRESS TRIGGER ( ) OPERATION

The start address bits ( , , & ) and end address bits ( , , & ) are used
NORM
NORM
S0 S1 S2 S3 E0 E1 E2 E3
, the power must be cycled to enable it.
MODE
NORM
). After a new
MODE
to access the memory location and they can divide the memory into a maximum of 16 slots. As an example of I14B20, they are defined as follows:
S3
E3
( )
0 0 0 0 0 0 0 0 0 1 8 1.25 0 0 1 0 16 2.50 0 0 1 1 24 3.75 0 1 0 0 32 5.00 0 1 0 1 40 6.25 0 1 1 0 48 7.50 0 1 1 1 56 8.75 1 0 0 0 64 10.00 1 0 0 1 72 11.25 1 0 1 0 80 12.50 1 0 1 1 88 13.75 1 1 0 0 96 15.00 1 1 0 1 104 16.25 1 1 1 0 112 17.50 1 1 1 1 120 18.75
S2
E2
( )
S1
(E1)
S0
(E0)
Row # 14B20
Duration [s]
5.1.1. Record (
REC
) Operation
Low active input, level-hold for level-trigger or falling edge for edge-trigger with debounce required.
For 8kHz sampling frequency, if
recording is activated. However, if
REC
is held at Low for a period equal to 1 sec or more, then level
REC
is pulsed Low for less than 1 sec, then edge-trigger recording
is initiated.
For 6.4kHz sampling frequency, if
level recording is activated. However, if
REC
is held at Low for a period equal to 1.25 sec or more, then
REC
is pulsed Low for less than 1.25 sec, then edge-trigger
recording is initiated.
Recording begins from the start address to end address and
Recording ceases whenever
REC
returns to High in level-hold mode or a subsequent lower going
LED
is on.
pulse appears while in edge-trigger mode or when end address is reached. Then an EOM marker is
written at the end of message. And
LED
is off.
Then the device will automatically power down.
This pin has an internal pull-up device.
Once
REC
is active, input on FT, /
NORM
S0 S1 S2 S3 E0
, , , , , , , or is
MODE
E1 E2
E3
illegal.
Publication Release Date: October 9, 2007
- 8 - Revision 0
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