Features
·
Operating voltage V
-
Read: 2.0V~5.5V
-
Write: 2.4V~5.5V
·
Low power consumption
-
Operating: 5mA max.
-
Standby: 10mA max.
·
User selectable internal organization
-
4K(HT93LC66): 512´8or256´16
·
3-wire Serial Interface
·
Write cycle time: 5ms max.
CC
General Description
The HT93LC66 is a 4K-bit low voltage nonvolatile, serial
electrically erasable programmable read only memory de
vice using the CMOS floating gate process. Its 4096 bits of
memory are organized into 256 words of 16 bits each
when the ORG pin is connected to VCC or organized into
512 words of 8 bits each when it is tied to VSS. The device
HT93LC66
CMOS 4K 3-Wire Serial EEPROM
·
Automatic erase-before-write operation
·
Word/chip erase and write operation
·
Write operation with built-in timer
·
Software controlled write protection
·
10-year data retention after 100K rewrite cycles
·
106rewrite cycles per word
·
Commercial temperature range (0°Cto+70°C)
·
8-pin DIP/SOP package
is optimized for use in many industrial and commercial ap
plications where low power and low voltage operation are
essential. By popular microcontroller, the versatile serial
interface including chip select (CS), serial clock (SK), data
input (DI) and data output (DO) can be easily controlled.
-
Block Diagram
Pin Assignment
CS
SK
ORG
DI
C ontrol
Logic
and
Clock
G enerator
Data
R egister
CS
1
SK
2
3
DI
4
DO
HT93LC66
8 D IP -A /S O P -A
Address
R egister
VCC
Address
D ecoder
VSS
M e m o ry C e ll
Array
4K: (512
VCC
8
NC
7
6
ORG
5
VSS
8 or 256 ´ 16)
´
O utput
B u ffe r
NC
1
VCC
2
3
CS
4
SK DI
8
7
6
5
DO
ORG
VSS
DO
HT93LC66
8 S O P -B
Rev. 1.20 1 October 29, 2001
HT93LC66
Pin Description
Pin Name I/O Description
CS I Chip select input
SK I Serial clock input
DI I Serial data input
DO O Serial data output
VSS
ORG I
NC
VCC
Absolute Maximum Ratings
Operation Temperature (Commercial)..........................................................................................................0°Cto70°C
Applied V
Applied Voltage on any Pin with Respect to VSS
Supply READ Voltage ....................................................................................................................................2V to 5.5V
Voltage with Respect to VSS..................................................................................................-0.3V to 6.0V
CC
Negative power supply, ground
¾
Internal Organization
When ORG is connected to VDD or ORG is floated, the (´16) memory organization is se
lected. When ORG is tied to VSS, the (´8) memory organization is selected. There is an in
ternal pull-up resistor on the ORG pin. (HT93LC66-A)
No connection
¾
Positive power supply
¾
..................................................................................................VSS
-0.3V to VCC+0.3V
-
-
Note: These are stress ratings only. Stresses exceeding the range specified under ²Absolute Maximum Ratings² may
cause substantial damage to the device. Functional operation of this device at other conditions beyond those
listed in the specification is not implied and prolonged exposure to extreme conditions may affect device reliability.
D.C. Characteristics
Symbol Parameter
V
I
I
I
I
I
V
V
V
V
C
C
CC1
CC2
STB
LI
LO
Operating Voltage
CC
Operating Current (TTL) 5V DO unload, SK=1MHz
Operating Current (CMOS)
Standby Current (CMOS) 5V CS=SK=DI=0V
Input Leakage Current 5V
Output Leakage Current 5V
Input Low Voltage
IL
IH
OL
OH
IN
OUT
Input High Voltage
Output Low Voltage
Output High Voltage
Input Capacitance
Output Capacitance
2~5.5V DO unload, SK=250kHz
2~5.5V
2~5.5V
2~5.5V
2~5.5V
Test Conditions
V
CC
¾
Conditions
Read 2.0
Write 2.4
5V DO unload, SK=1MHz
V
IN=VSS~VCC
, CS=0V
¾
5V
V
OUT=VSS~VCC
¾
5V
¾
¾
I
5V
5V
¾
¾
=2.1mA
OL
=10mA ¾¾
I
OL
=-400mA
I
OH
=-10mAV
I
OH
=0V, f=250kHz
V
IN
=0V, f=250kHz
V
OUT
Min. Typ. Max. Unit
5.5 V
¾
5.5 V
¾
¾¾
¾¾
¾¾
¾¾
0
0
0
0
2
0.9V
CC
¾
¾
¾
¾
¾
¾
¾¾
5mA
5mA
5mA
10
1
1
0.8 V
0.1V
CC
V
CC
V
CC
0.4 V
0.2 V
2.4
-0.2 ¾¾
CC
¾¾
¾¾
¾¾
5pF
5pF
mA
mA
mA
V
V
V
V
V
Rev. 1.20 2 October 29, 2001
A.C. Characteristics
Symbol Parameter
f
SK
t
SKH
t
SKL
t
CSS
t
CSH
t
CDS
t
DIS
t
DIH
t
PD1
t
PD0
t
SV
t
HV
t
PR
* For Read Operating Only
Clock Frequency 0 2000 0 500 0 250 kHz
SK High Time 250
SK Low Time 250
CS Setup Time 50
CS Hold Time 0
CS Deselect Time 250
DI Setup Time 100
DI Hold Time 100
DO Delay to ²1²¾
DO Delay to ²0²¾
Status Valid Time
DO Disable Time 100
Write Cycle Time
V
=5V±10% VCC=3V±10%
V
CC
CC
=2V*
Min. Max. Min. Max. Min. Max.
¾
¾
¾
¾
¾
¾
¾
250
250
¾
250
¾
¾
5
1000
1000
200
0
250
200
200
¾
¾
¾
400
¾
¾
¾
¾
¾
¾
¾
¾
1000
1000
250
¾
5
2000
2000
200
0
1000
400
400
¾
¾
¾
¾
¾
¾
¾
¾
¾
2000 ns
2000 ns
¾¾
400
¾
¾¾
HT93LC66
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ms
A.C. test conditions
Input rise and fall time: 5ns (1V to 2V)
Input and output timing reference levels: 1.5V
Output load circuit: See Figure right
t
CS
SK
DI
DO
CSS
t
SKH
t
DIS
t
DIH
V a lid D a t a V a lid D a t a
t
PD0
Hi-Z
t
SKL
t
PD1
t
DO
*lncluding scope and jig
t
CDS
CSH
VCC =1.952V
800
W
100pF*
Rev. 1.20 3 October 29, 2001