The DS28EA00 is a digital thermometer with 9-bit
(0.5 °C) to 12-bit (1/16 °C) resolution and alarm
function with nonvolatile (NV), user-programmable
upper and lower trigger points. Each DS28EA00 has
its unique 64-bit registration number that is factoryprogrammed into the chip. Data is transferred serially
through the 1-Wire
®
protocol, which requires only one
data line and a ground for communication. The
improved 1-Wire front end with hysteresis and glitch
filter enables the DS28EA00 to perform reliably in
large 1-Wire networks. Unlike other 1-Wire thermometers, the DS28EA00 has two additional pins to
implement a sequence detect function. This feature
allows the user to discover the registration numbers
according to the physical device location in a chain,
e.g., to measure the temperature in a storage tower
at different height. If the sequence detect function is
not needed, these pins can be used as generalpurpose input or output. The DS28EA00 can derive
the power for its operation directly from the data line
(“parasite power”), eliminating the need for an
external power supply.
APPLICATIONS
Data Communication Equipment
Process Temperature Monitoring
HVAC Systems
TYPICAL OPERATING CIRCUIT
V
DD
1-Wire
Master
PX.
(Micro-
controller)
Schematic shows PIOs wired for sequence detect function.
Commands, Registers, and Modes are capitalized for
clarity.
1-Wire is a registered trademark of Dallas Semiconductor.
Note: Some revisions of this device may incorporate deviations from published specifications known as errata. Multiple revisions of any device
may be simultaneously available through various sales channels. For information about device errata, click here: www.maxim-ic.com/errata
1 of 29
#1 #2
VDD
IO
DS28EA00
PIOB PIOA
GND
IO
PIOB PIOA
VDD
DS28EA00
GND
#3
VDD
IO
DS28EA00
PIOB PIOA
GND
SPECIAL FEATURES
Digital Thermometer Measures Temperatures
from -40°C to +85°C
Thermometer Resolution is User-Selectable
from 9 to 12 Bits
Unique 1-Wire Interface Requires Only One
Port Pin for Communication
Each Device has a Unique 64-Bit Factory-
Lasered Registration Number
ROM Multidrop Capability Simplifies
Distributed Temperature-Sensing
Applications
Improved 1-Wire Interface with Hysteresis
and Glitch Filter
User-Definable Nonvolatile (NV) Alarm
Threshold Settings/User Bytes
Alarm Search Command to Quickly Identify
Devices Whose Temperature is Outside of
Programmed Limits
Standard and Overdrive 1-Wire Speed
Two General-Purpose Programmable IO (PIO)
Pins
Chain Function Sharing the PIO Pins to
Detect Physical Sequence of Devices in
Network
Operating Range: 3.0V to 5.5V, -40°C to +85°C
Can be Powered from Data Line
8-Pin µSOP Package
ORDERING INFORMATION
PART TEMP RANGE PACKAGE
DS28EA00U+ -40 to +85°C 8-pin µSOP
DS28EA00U+T -40 to +85°C Tape & Reel
+ Denotes lead-free package.
PIN CONFIGURATION
IO
NC
NC
GND
+
8
1
7
2
6
3
5
4
8 pin µSOP
Package Outline Drawing 21-0036
V
DD
PIOB
PIOA
NC
.
012907
DS28EA00 1-Wire Digital Thermometer with Sequence Detect and PIO
ABSOLUTE MAXIMUM RATINGS
IO Voltage to GND -0.5V, +6V
IO Sink Current 20mA
Maximum PIOA or PIOB Pin Current 20mA
Maximum Current Through GND Pin 40mA
Operating Temperature Range -40°C to +85°C
Junction Temperature +150°C
Storage Temperature Range -40°C to +85°C
Soldering Temperature See IPC/JEDEC J-STD-020
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only,
and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is
not implied. Exposure to the absolute maximum rating conditions for extended periods may affect device.
ELECTRICAL CHARACTERISTICS
(T
= -40°C to +85°C; see Note 1)
A
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
Power Supply
Supply Voltage V
Supply Current (Note 5) I
Standby Current I
DD
DD
DDS
(Note 2) 3.0 5.5 V
VDD = 5.5V 1.5 mA
VDD = 5.5V 1.5 µA
IO Pin General Data
1-Wire Pullup Voltage
(Note 2)
1-Wire Pullup Resistance R
V
PUP
PUP
Local power 3.0 V
Parasite power 3.0 5.5
(Notes 2, 3)
Input Capacitance CIO (Notes 4, 5) 1000 pF
Input Load Current I
High-to-Low Switching
Note 1: Specifications at TA = -40°C are guaranteed by design only and not production-tested.
Note 2: System requirement.
Note 3: Maximum allowable pullup resistance is a function of the number of 1-Wire devices in the system and 1-Wire recovery times. The
Note 4: Value is 25pF max. with local power. Maximum value represents the internal parasite capacitance when V
Note 5: Guaranteed by design, characterization, and/or simulation only. Not production tested.
Note 6: V
Note 7: Voltage below which, during a falling edge on IO, a logic '0' is detected.
Note 8: The voltage on IO needs to be less than or equal to V
Note 9: Voltage above which, during a rising edge on IO, a logic '1' is detected.
Note 10: After V
Note 11: The I-V characteristic is linear for voltages less than 1V.
Note 12: Applies to a single parasitically powered DS28EA00 attached to a 1-Wire line. These values also apply to networks of multiple
Note 13: The earliest recognition of a negative edge is possible at t
Note 14: Defines maximum possible bit rate. Equal to 1/(t
Note 15: Interval during the negative edge on IO at the beginning of a Presence-Detect pulse between the time at which the voltage is
Note 16: Interval after t
Note 17:
specified value here applies to parasitically powered systems with only one device and with the minimum 1-Wire recovery
times. For more heavily loaded systems, local power or an active pullup such as that found in the DS2482-x00, DS2480B, or
DS2490 may be required. If longer t
= 2.2kΩ, 2.5µs after V
R
PUP
, VTH, and V
TL
HY
are a function of the internal supply voltage, which is itself a function VDD, V
has been applied the parasite capacitance will not affect normal communications.
PUP
capacitive loading on IO. Lower V
, and VHY.
V
TH
is crossed during a rising edge on IO, the voltage on IO has to drop by at least VHY to be detected as logic '0'.
TH
is used, higher R
REC
, V
, higher R
DD
PUP
values may be tolerable.
PUP
, shorter t
PUP
at all times the master drives the line to a logic '0'.
ILMAX
, and heavier capacitive loading all lead to lower values of VTL,
REC
PUP
PUP
, R
, 1-Wire timing, and
PUP
is first applied. If
DS28EA00 with local supply.
after VTH has been reached on the preceding rising edge.
REH
+ t
W0L(min)
80% of V
limit is t
and the time at which the voltage is 20% of V
PUP
during which a bus master is guaranteed to sample a logic '0' on IO if there is a DS28EA00 present. Minimum
RSTL
PDH(max)
+ t
; maximum limit is t
FPD(max)
PDH(min)
+ t
PDL(min)
ε in Figure 14 represents the time required for the pullup circuitry to pull the voltage on IO up from V
duration for the master to pull the line low is t
W1Lmax
+ tF - ε and t
REC(min)
.
PUP
.
).
+ tF - ε respectively.
W0Lmax
to VTH. The actual maximum
IL
3 of 29
DS28EA00 1-Wire Digital Thermometer with Sequence Detect and PIO
Note 18:
Note 19: This load current is caused by the internal weak pullup, which asserts a logic '1' to the PIOB and PIOA pins. The logical state of
Note 20: Current drawn from IO during EEPROM programming or temperature conversion interval in parasite powered mode. The pullup
Note 21: The t
Note 22: Write-cycle endurance is degraded as T
Note 23: Not 100% production-tested; guaranteed by reliability monitor sampling.
Note 24: Data retention is degraded as T
Note 25: Guaranteed by 100% production test at elevated temperature for a shorter time; equivalence of this production test to data sheet
Note 26: The t
Note 27: Drift data is preliminary and based on a 1000-hour stress test performed on another device with comparable design and
δ in Figure 14 represents the time required for the pullup circuitry to pull the voltage on IO up from V
of the bus master. The actual maximum duration for the master to pull the line low is t
PIOB must not change during the execution of the Conditional Read ROM command.
circuit on IO during the programming or temperature conversion interval should be such that the voltage at IO is greater than or
equal to V
programming or temperature conversions may need to be added. The bypass must be activated within 10µs from the beginning
of the t
PROG
PROG
Scratchpad sequence. Interval ends once the device's self-timed EEPROM programming cycle is complete and the current
drawn by the device has returned from I
limit at operating temperature range is established by reliability testing.
CONV
Temperature sequence. Interval ends once the device's self-timed temperature conversion cycle is complete and the current
drawn by the device has returned from I
fabricated in the same manufacturing process. This test was performed at greater than +85°C with V
drift results for this device are pending the completion of a new 1000-hour stress test.
. If V
PUP(min)
or t
interval begins t
interval begins t
PUP
interval, respectively.
CONV
in the system is close to V
after the trailing rising edge on IO for the last time slot of the command byte for a valid Copy
REHmax
to IL (parasite power) or I
PROG
increases.
A
increases.
A
after the trailing rising edge on IO for the last time slot of the command byte for a valid Convert
REHmax
to IL (parasite power) or I
CONV
then a low impedance bypass of R
PUP(min)
(local power).
DDS
(local power).
DDS
RLmax
+ tF
PUP
to the input high threshold
IL
, which can be activated during
= 5.5V. Confirmed thermal
DD
PIN DESCRIPTION
PIN NAME FUNCTION
1 IO
4 GND
2, 3, 5
6
7
8
N.C. No Connection
PIOA
(DONE\)
PIOB
(EN\)
V
Power Supply Pin. Must be tied to GND for operation in parasite power mode.
DD
1-Wire Bus Interface and Parasitic Power Supply. Open-drain, requires external pullup
resistor.
Ground Supply
Open-Drain PIOA Channel and Chain Output. For sequence detection, PIOA must be
connected to PIOB of the next device in the chain; leave open or tie to GND for the last
device in the chain.
Open-Drain PIOB Channel and Chain Input. For sequence detection, PIOB of the first
device in the chain must be tied to GND.
4 of 29
DS28EA00 1-Wire Digital Thermometer with Sequence Detect and PIO
(
(
(ON\
)
OVERVIEW
The block diagram in Figure 1 shows the relationships between the major function blocks of the DS28EA00. The
device has three main data components: 1) 64-bit Registration Number, 2) 64-bit scratchpad, and 3) alarm and
configuration registers. The 1-Wire ROM Function control unit processes the ROM function commands that allow
the device to function in a networked environment. The device function control unit implements the device-specific
control functions, such as read/write, temperature conversion, setting the chain state for sequence detection, and
PIO access. The CRC generator assists the master verifying data integrity when reading temperatures and
memory data. In the sequence detect process, PIOB functions as an input, while PIOA provides the connection to
the next device. The power supply sensor allows the master to remotely read whether the DS28EA00 has local
power available.
Figure 2 shows the hierarchical structure of the 1-Wire protocol. The bus master must first provide one of the eight
ROM function commands: 1) Read ROM, 2) Match ROM, 3) Search ROM, 4) Conditional (“Alarm”) Search ROM,
5) Conditional Read ROM, 6) Skip ROM, 7) Overdrive-Skip ROM or 8) Overdrive-Match ROM. Upon completion of
an Overdrive ROM command byte executed at standard speed, the device enters Overdrive mode, where all
subsequent communication occurs at a higher speed. The protocol required for these ROM function commands is
described in Figure 12. After a ROM function command is successfully executed, the device-specific control
functions become accessible and the master may provide any one of the nine available commands. The protocol
for these control function commands is described in Figure 10. All data is read and written least significant bit
first.
Figure 1. DS28EA00 Block Diagram
Internal VDD
VDD
IO
64-Bit
Registration #
PIOB
EN\)
8-Bit CRC
Generator
Alarm and Config
Registers
Power Supply
Sensor
1-Wire ROM
Function Control
Device Function
Control
64-Bit Scratchpad
RCO
PIOA
DONE\)
Temperature
Sensor
5 of 29
DS28EA00 1-Wire Digital Thermometer with Sequence Detect and PIO
64-BIT REGISTRATION NUMBER
Each DS28EA00 contains a unique Registration Number that is 64 bits long. The first 8 bits are a 1-Wire family
code. The next 48 bits are a unique serial number. The last 8 bits are a CRC of the first 56 bits. See Figure 3 for
details. The 1-Wire CRC is generated using a polynomial generator consisting of a shift register and XOR gates as
shown in Figure 4. The polynomial is X
Redundancy Check (CRC) is available in Application Note 27.
The shift register bits are initialized to 0. Then starting with the least significant bit of the family code, one bit at a
time is shifted in. After the 8th bit of the family code has been entered, then the 48-bit serial number is entered.
After the last byte of the serial number has been entered, the shift register contains the CRC value. Shifting in the 8
bits of CRC returns the shift register to all 0s.
Figure 2. Hierachical Structure for 1-Wire Protocol
8
+ X5 + X4 + 1. Additional information about the Dallas 1-Wire Cyclic
state
(none)
64-bit Reg. #, OD-Flag
64-bit Reg. #, OD-Flag
Scratchpad
Scratchpad
Temperature Alarm and Configuration
Registers
Scratchpad, Temperature Alarm
Registers
V
pin voltage
DD
Scratchpad, Temperature Alarm and
Configuration Registers
PIO pins
PIO pins
Chain state, PIOA pin state
Figure 3. 64-Bit Registration Number
MSB LSB
8-Bit
CRC Code
MSB LSB MSB LSB MSB LSB
48-Bit Serial Number
8-Bit Family
Code (42h)
6 of 29
DS28EA00 1-Wire Digital Thermometer with Sequence Detect and PIO
Figure 4. 1-Wire CRC Generator
Polynomial = X8 + X5 + X4 + 1
STAGE
0
X
st
1
STAGE
1
X
nd
2
2
X
rd
3
STAGE
STAGE
3
X
th
4
STAGE
4
X
th
5
5
X
th
6
STAGE
INPUT DATA
6
X
th
7
STAGE
STAGE
7
X
th
8
8
X
Memory Description
The memory of the DS28EA00 is shown in Figure 5. It consists of an 8-byte scratchpad and 3 bytes of backup
EEPROM. The first two bytes form the temperature readout register, which is updated after a temperature
conversion and is read-only. The next 3 bytes are user-writeable; they contain the Temperature High (TH) and the
Temperature Low (TL) alarm register and a configuration register. The remaining 3 bytes are “reserved”. They
power up with constant data and cannot be written by the user. The TH, TL, and configuration register data in the scratchpad control the resolution of a temperature conversion and decide whether a temperature is considered as
“alarming”. TH, TL, and configuration can be copied to the EEPROM to become nonvolatile (NV). The scratchpad
is automatically loaded with EEPROM data when the DS28EA00 powers up.
Figure 5. Memory Map
BYTE
ADDRESS
0 Temperature LSB (50h) N/A
1 Temperature MSB (05h) N/A
SCRATCHPAD (POWER-UP STATE)BACKUP EEPROM
2 TH Register or User Byte 1* <--------> TH Register or User Byte 1
3 TL Register or User Byte 2* <--------> TL Register or User Byte 2
4 Configuration Register* <--------> Configuration Register
5 Reserved (FFh) N/A
6 Reserved (0Ch) N/A
7 Reserved (10h) N/A
*Power-up state depends on value(s) stored in EEPROM.
Register Detailed Description
Temperature Readout Register
ADDR bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0
0 23 2
2
2
1 S S S S S 26 2
1
2
0
2
-1
2
-2
2
-3
2
5
2
-4
4
LS Byte
MS Byte
7 of 29
DS28EA00 1-Wire Digital Thermometer with Sequence Detect and PIO
The temperature reading is in °C using a 16-bit sign-extended two’s complement format. Table 1 shows examples
of temperature and the corresponding data for 12-bit resolution. With two’s complement, the sign bit is set if the
value is negative. If the device is configured for 12-bit resolution, all bits in the LS byte are valid; for a reduced
resolution, bit 0 (11 bit mode), bits 0 to 1 (10 bit mode), and bits 0 to 2 (9 bit mode) are undefined.
Table 1. Temperature/Data Relationship
TEMPERATURE
DIGITAL OUTPUT
(BINARY)
DIGITAL OUTPUT
(HEX)
+85°C* 0000 0101 0101 0000 0550h
+25.0625°C 0000 0001 1001 0001 0191h
+10.125°C 0000 0000 1010 0010 00A2h
+0.5°C 0000 0000 0000 1000 0008h
0°C 0000 0000 0000 0000 0000h
-0.5°C 1111 1111 1111 1000 FFF8h
-10.125°C 1111 1111 0101 1110 FF5Eh
-25.0625°C 1111 1110 0110 1111 FE6Fh
-40°C 1111 1101 1000 0000 FD80h
*The power-on reset value of the temperature readout register is +85°C.
Temperature Alarm Registers
ADDR bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0
2 S 26 2
3 S 26 2
5
2
5
2
4
2
4
2
3
2
3
2
2
2
2
2
1
2
1
2
0
0
High Alarm (TH)
Low Alarm (TL)
The result of a temperature conversion is automatically compared to the values in the alarm registers to determine
whether an alarm condition exists. Alarm thresholds are represented as two’s complement number. With 8 bits
available for sign and value, alarm thresholds can be set in increments of 1°C. An alarm condition exists if a
temperature conversion results in a value that is either higher than or equal to the value stored in the TH register
or lower than or equal to the value stored in the TL register. If a temperature alarm condition exists, the device
will respond to the Conditional Search command. The alarm condition is cleared if a subsequent temperature
conversion results in a temperature reading within the boundaries defined by th e data in the TH and TL registers.
Configuration Register
ADDR b7 b6 b5 b4 b3 b2 b1 b0
4 0 R1 R0 1 1 1 1 1
The functional assignments of the individual bits are explained in the table below. Bits 0 to 4 and bit 7 have no
function; they cannot be changed by the user. As a factory default, the device operates in 12-bit resolution.
BIT DESCRIPTION BIT(S) DEFINITION
R0, R1: Temperature
Converter Resolution
b5, b6
These bits control the resolution of the temperature
converter. The codes are as follows:
R1 R0
0 0 9 bits
0 1 10 bits
1 0 11 bits
1 1 12 bits
8 of 29
DS28EA00 1-Wire Digital Thermometer with Sequence Detect and PIO
PIO Structure
Each PIO consists of an open-drain pulldown transistor and an input path to read the pin state. The transistor is
controlled by the PIO Output Latch, as shown in Figure 6. The Device Function Control unit connects the PIOs
logically to the 1-Wire interface. PIOA has a pullup path to internal V
to facilitate the sequence detect function
DD
(see Figure 1) in conjunction with the Chain command; PIOB is truely an open-drain structure. The power-on
default state of the PIO output transistors is off; high-impedance on-chip resistors (not shown in the graphic) pull
the PIO pins to internal V
DD
.
Figure 6. PIO Simplified Logic Diagram
PIO Pin
State
PIO Output
Latch State.
PIO Pin
PIO Data
PIO Clock
CLOCK
QD
Q
PIO Output Latch
Chain Function
The chain function is a feature that allows the 1-Wire master to discover the physical sequence of devices that are
wired as a linear network (“chain”). This is particularly convenient for devices that are installed at equal spacing
along a long cable, e.g., to measure temperatures at different locations inside a storage tower or tank. Without
chain function, the master needs a lookup table to correlate registration number to the physical location.
The chain function requires two pins, an input (EN\) to enable a device to respond during the discovery and an
output (DONE\) to inform the next device in the chain that the discovery of its neighbor is done. The two general
purpose ports of the DS28EA00 are re-used for the chain function. PIOB functions as EN\ input and PIOA
generates the DONE\ signal, which is connected to the EN\ input of the next device, as shown in the typical
operating circuit on page 1. The EN\ input of the first device in the chain needs to be hardwired to GND or logic ‘0’
must be applied for the duration of the sequence discovery process. Besides the two pins, the sequence discovery
relies on the Conditional Read ROM command.
For the chain function and normal PIO operation to coexist, the DS28EA00 distinguishes three chain states, OFF,
ON, and DONE. The transition from one chain state to another is controlled through the Chain command. Table 2
summarizes the chain states and the specific behavior of the PIO pins.
Table 2. Chain States
CHAIN STATE
DEVICE BEHAVIOR
PIOB (EN\) PIOA (DONE\) Conditional Read ROM
OFF (default)
ON
DONE
PIO (high
impedance)
EN\ input Pullup on Recognized if EN\ is ‘0’
No function
PIO (high
impedance)
Pulldown on (DO\
logic ‘0’)
Not recognized
Not recognized
The power-on default chain state is OFF, where PIOA and PIOB are solely controlled through the PIO Access
Read and Write commands. In the chain ON state PIOA is pulled high to the device’s internal V
supply through a
DD
~40kΩ resistor, applying a logic ‘1’ to the PIOB (EN\) pin of the next device. Only in the ON state does a
DS28EA00 respond to the Conditional Read ROM command, provided its EN\ is at logic ‘0’. After a device’s ROM
9 of 29
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